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Unit 5 Review

RAM and ROM are both random-access memories because any address can be accessed in equal time for read or write operations in RAM, and read operations in ROM. RAM is volatile and has read/write capability while ROM is non-volatile and only allows read operations. Hexadecimal numbers represent specific memory addresses from 0 to 256 in binary form. A logic diagram for a 512x8-bit static RAM shows address and control inputs and 8-bit data outputs. A 64k x 8 memory has a 256 row by 256 column memory array organized into 8-bit words. A DRAM with 12 address lines has a capacity of 4096 bytes or 4kB.

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0% found this document useful (0 votes)
231 views

Unit 5 Review

RAM and ROM are both random-access memories because any address can be accessed in equal time for read or write operations in RAM, and read operations in ROM. RAM is volatile and has read/write capability while ROM is non-volatile and only allows read operations. Hexadecimal numbers represent specific memory addresses from 0 to 256 in binary form. A logic diagram for a 512x8-bit static RAM shows address and control inputs and 8-bit data outputs. A 64k x 8 memory has a 256 row by 256 column memory array organized into 8-bit words. A DRAM with 12 address lines has a capacity of 4096 bytes or 4kB.

Uploaded by

Alice Holmes
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Unit 5 Review

2. Explain why RAMs and ROMs are both random-access memories.

RAM is a type of memory where all addresses are accessible in an equal amount of time and can be
selected in any order for a read or write operation. All RAMs have both read and write capability. They
lose stored data when the power is turned off, making them volatile memories.

ROM is memory where date is stored permanently or semipermanently. Data can be read from a ROM
but there is no write operation. The ROM is a random-access memory like the RAM, but normally RAM
means random-access read/write memory. ROMs keep stored data when the power is turned off, which
makes them nonvolatile memories.

4. What memory address (0 through 256) is represented by each of the following hexadecimal numbers:

Binary Mem Address

(a) 0A16 0000 1010 10

(b) 3F16 0011 1111 64

(c) CD16 1100 1101 128

6. Draw a basic logic diagram for a 512 × 8-bit static RAM, showing all the inputs and outputs.

A0
A1
A2 512X8 bit
A3 static RAM
A4
A5 I/O0
A6 I/O1
A7 I/O2
A8 I/O3
I/O4
A9
I/O5
A10
I/O6
A11 Chip Select I/O7
A12
I/O8
A13
A14
A15 Write
Read
Output Enable
8. Redraw the block diagram in Figure 12–11 for a 64k × 8 memory.

Memory array
256 rows x
256 colums x
8bits

Memory array
256 rows x
256
rows
256 colums x
8bits

8 bits
256 columns

10. What is the capacity of a DRAM that has twelve address lines?

212 = 4096 bytes or 4 kB


12. Determine the truth table for the ROM in Figure 12–89. (Section 12-3)

Enable inputs Select Inputs Outputs

G1 G2A’ G2B’ C B A O3 O2 O1 O0
1 0 0 0 0 0 0 1 0 0
1 0 0 0 0 1 1 1 1 1
1 0 0 0 1 0 1 0 1 1
1 0 0 0 1 1 1 0 0 1
1 0 0 1 0 0 1 1 1 0
1 0 0 1 0 1 1 0 0 0
1 0 0 1 1 0 0 0 1 1
1 0 0 1 1 1 0 1 0 1

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