Signed Integer Representation

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Signed Integer Representations

There are a number of standard techniques to represent signed integers. Two of the most
common techniques are sign magnitude and twos complement.

Sign Magnitude: In sign magnitude the left most bit is used for a + (0) or – (1) sign. This
presupposes that a fixed number of bits is used to represent an integer.

For example: Using an 8-bit sign magnitude representation where the bits are numbered right to
left 0 to 7, the left most bit, bit 7, is the sign bit. The standard convention is to use 0 for a plus
and a 1 for s minus. Thus +12 would be written as

+12 = 00001100

while -12 would be written as

-12 = 10001100

There is one problem with sign magnitude representation: both 00000000 and 10000000
represent zero. Thus we have respectively +0 (plus zero) and -0 (minus zero). Having two signed
zeros with sign magnitude representation is somewhat awkward to work with.

Binary Addition:

Before discussing the second method of representing signed binary integers, let’s review the
eight binary addition rules: the first four are without a carry in, the second four are with a carry
in.

+1 +1 +1 +1 <- carry in
0 0 1 1 0 0 1 1
+0 +1 +0 +1 +0 +1 +0 +1
-- -- -- -- -- -- -- --
0 1 1 10 1 10 10 11

Note that 4 of the above rules have a carry out which is propagated to the column on the left as a
carry in.
Two’s Complement: Like sign magnitude, the left most bit is used as the sign bit with 0
indicating plus and 1 indicating minus. However, what is different is that a negative “weight” or
value is assigned to this bit.

For example: Using an 8-bit twos complement representation, bit number 7 would have a weight
of -128 while the other seven bits would have weights (from left to right) of 64, 32, 16, 8, 4, 2,
and 1 respectively. Thus +12 would be written as

+12 = 00001100

While -12 would be written as

-12 = 11110100

Huh? It’s like this. 11110100 = − 128 + 64 + 32 + 16 + 4 = − 12 .

This is useful since we can easily convert any twos complement representation to signed decimal
using the same sum the powers of two technique that we use to convert any binary representation
to decimal. Just remember to use a negative value for the sign bit.

However, there is an easier way to negate a number: complement and add 1. By complement we
mean make each 0 bit a 1 and each 1 bit a 0.

00001100
11110011

Now add 1; that is


11110011
+ 1
11110100

This technique also works on negative representations For example if we complement 11110100

11110100
00001011

And add 1
00001011
+ 1
00001100

we’re back to +12.


A Four-Bit Two’s Complement Number Line

-8 -7 – 6 -5 -4 -3 -2 -1 0 +1 +2 +3 +4 +5 +6 +7
1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111

Here we line up the four bit twos complement integers from most negative on the left (-8) to
most positive on the right (+7). Note that the weight of the left most sign bit is -8. If you look
closely, there is a pattern to this arrangement.

One advantage of twos complement representation is that binary addition works for twos
complement integers whether the numbers are positive or negative. For example

1101 -3 1101 -3 0010 +2 0010 +2


+1110 +-2 +0101 ++5 +1011 +-5 +0011 ++3
----- --- ----- --- ----- --- ----- ---
1011 -5 0010 +2 1101 -3 0101 +5

Note: Any carry out of the left most column is thrown away.

Since it’s easy to negate a twos complement integer (complement and add 1), subtraction is done
by adding a negative number; for example 2 – 5 = 2 + (-5) = -3 (see above)

Overflow: There is one problem. Since the range of range of four bit twos complement integers
is limited to values between -8 and +7, it’s possible to generate a result outside of this range; for
example both 5 + 4 = 9 and -4 + -6 = -10 generate values which are outside this range. This is
called an overflow condition. It is fairly easy to detect (the carry in to the sign bit does not equal
the carry out of the sign bit) and can only occur if two numbers of the same sign are added
together.

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