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Msqs

The document contains multiple choice questions from chapters 1-6 of an electronics textbook. It covers topics like analog vs digital signals, binary number systems, logic gates, Boolean algebra, adders, comparators, decoders, encoders, multiplexers and parity. The questions test understanding of core concepts in digital electronics and basic circuit analysis.

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Yusra Mehmood
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316 views

Msqs

The document contains multiple choice questions from chapters 1-6 of an electronics textbook. It covers topics like analog vs digital signals, binary number systems, logic gates, Boolean algebra, adders, comparators, decoders, encoders, multiplexers and parity. The questions test understanding of core concepts in digital electronics and basic circuit analysis.

Uploaded by

Yusra Mehmood
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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Chapter 1 [mcqs]

Answers are at the end of the chapter.


1. A quantity having continuous values is
(a) a digital quantity
(b) an analog quantity
(c) a binary quantity
(d) a natural quantity

2. The term bit means


(a) a small amount of data
(b) a I or a 0
(c) binary digit
(d) both answers (b) and (c)

3.The time interval on the leading edge of a pulse between 10% and 90% of the amplitude is the
(a) lise time
(b) fall time
(c) pulse width
(d) period
4. A pulse in a certain waveform occurs every 10 ms. The frequency is
(a) 1 kHz
(b) I Hz
(c) 100 Hz
(d) 10 Hz

5. In a certain digital waveform, the period is twice the pulse width. The duty cycle is
(a) 100% (b)200% (c)50%

6. An inverter
(a) performs the NOT operation
(b) changes a HIGH to a LOW
(c) changes a LOW to a HIGH
(d) does all of the above

7. The output of an AND gate is HIGH when


(a) any input is HIGH
(b) all inputs are HIGH
(c) no inputs are HIGH
(d) both answers (a) and (b)

8. The output of an OR gate is HIGH when


(a) any input is HIGH
(b) all inputs are HIGH
(c) no inputs are HIGH
(d) both answers (a) and (b)

9. The device used to convert a binary number to a 7-segment display fonnat is the
(a) multiplexer (b) encoder (c) decoder (d) register

10. An example of a data storage device is


(a) the logic gate (b) the flip-flop (c) the comparator
(d) the register (e) both answers (b) and (d)

11. A fixed-function IC package containing four AND gates is an example of


(a) MSI (b) SMT (c) SOIC (d) SSI

12. An LSI device has a circuit complexity of from


(aj 10 to 100 equivalent gates (b) more than 100 to 10,000 equivalent gates
(c) 2000 to 5000 equivalent gates (d) more than 10.000 to 100,000 equivalent gates

13. VHDL is a
(a) logic device (b) PLD programming language (c) computer language (d) very high density
logic

14. A CPLD is a
(a) controlled program logic device (b) complex programmable logic driver (c) complex
programmable logic device (d) central processing logic device

15. An FPGA is a
(a) field programmable gate array (c) field programmable generic array (b) fast programmable
gate array (d) flash process gate application

Chapter 2 [mcqs]
Answers are at the end of the chapter.
1. 2 x L 0 1 + 8 x I on is equaJ to
(a) 10 (b) 280 (c) 2.8 (d) 28

2. The binary number 1101 is equal to the decimal number


(a) 13 (b) 49 (c) 1I (d) 3

3. The binary number 1l0l1l01 is equal to the decimal number


(a) 121 (b) 221 (c) 441 (d) 256

4. The decimal number 17 is equal to the binary number


(a) 10010 (b) 11000 (c) 10001 (d) 01001

5. The decimal number 175 is equal to the binary number


(a) 11001111 (b) 10101110 (c) 10101111 (d) 11101111

6. The sum of 11010 + 011 L I equals


(a) 101001 (b) 101010 (c) 110101 (d) 101000

7. The difference of llO - 010 equals


(a) 001 (b) 010 (c) 101 (d) 100

8. The l's complement of 10] L 1001 is


(a) 010001] I (b) 01000110 (c) 11000110
9. The 2's complement of 11001000 is
(a) 00110111 (b) 00110001 (c) 01001000 (d) 10101010 (d) 00111000

10. The decimal number + 122 is expressed in the 2's complement form as
(a) 01111010 (b) II J 11010 (c) 01000101 (d) 10000101

11. The decimal number -34 is expressed in the 2's complement form as
(a) 010 III 10 (b) LOIOOOIO (c) 11011110 (d) 01011101

12. A single-precision floating-point binary number has a total of


(a) 8 bits (b) 16 bits (c) 24 bits (d) 32 bits

Chapter 4 [mcqs]
Answers are at the end of the chapter.
1. The complement of a variable is always
(a) 0 (b) I (c) equal to the variable (d) the inverse of the variable

2. The Boolean expression A + B + C is


(a) a sum telID (b) a literal term (c) a product term (d) a complemented term

3. The Boolean expression ABCD is


(a) a sum term (b) a product tem (c) a literal term (d) always I

4. The domain of the expression ABCD + AB + CD + B is


(a) A and D (b) B only (c) A, B, C, and D (d) none of these

5. According to the commutative law of addition,


(a)AB = BA (b) A = A + A (c) A + (B + C) = (A + B) + C (d) A + B = B + A

6. According to the associative law of multiplication,


(a) B = BB (d) B + B(B + 0) (b) A(BC) = (AB)C (c) A + B = B + A

7. According to the distributive law,


(a)A(B + C) = AB + AC (b) A(BC) = ABC (c)A(A + I) = A (d)A+AB=A

8. Which one of the following is not a valid rule of Boolean algebra?


(a) A + I = I (b) A = A (d) A + 0 = A (c)AA =A

9. Which of the following rules states that if one input of an AND gate is always I, the
output is
equal to the other input?
(a) A + I = I (b) A + A = A (c) A . A = A (d) A . I = A

10. According to DeMorgan's theorems, the following equality(s) is (are) correct:


(a) AB = A + B (c)A+B+C=ABC (b) XYZ = X + Y + Z (d) all ofthese

11. The Boolean expression X = AB + CD represents


(a) two ORs ANDed together (b) a 4-input AND gate (c) two ANDs ORed together (d) an
exclusive-OR
12. An exanlple of a sum-of-products expression is
(a) A + B( C + D) (c) (A + B + C)(A + B + C) (b) AB + AC + ABC (d) both answers (a) and
(b)

13. An example of a product-of-sums expression is


(a)A(B + C) + AC (c) A + B + BC (b) (A + B) (A + B + C) (d) both answers (a) and (b)

14. An example of a standard SOP expression is


(a) AB + ABC + ABD (c)AB + AB + AB (b) ABC + ACD (d)ABCD + AB + A

15. A 3-variable Kamaugh map has


(a) eight cells (b) three cells (c) sixteen cells (d) four cells

16. In a 4-variable Kamaugh map, a 2-variable product term is produced by


(a) a 2-cell group of I s (b) an 8-cell group of Is (c) a 4-cell group of Is (d) a 4-cell group
of Os

17. On a Karnaugh map, grouping the Os produces


(a) a product-of-sums expression (b) a sum-of-products expression (c) a "don't care"
condition (d) AND-OR logic

18. A 5-variable Kamaugh map has


(a) sixteen cells (b) thirty-two cells (c) sixty-four cells

19. An SPLD that has a programmable AND an"ay and a fixed OR aJTay is a
(a) PROM (b) PLA (c) PAL (d) GAL

20. VHDL is a type of


(a) programmable logic (b) a type of architecture (c) programmable array (d) a type of
variable

21. In VHDL, a port is


(a) a type of entity (c) an input or output (b) hardware description language (d) logical
mathematics

Chapter 6 [mcqs]
Answers are at the end of the chapter.
1. A half-adder is characterized by
(a) two inputs and two outputs (b) three inputs and two outputs (c) two inputs
and three outputs (d) two inputs and one output

2. A full-adder is characterized by
(a) two inputs and two outputs (b) three inputs and two outputs
(c) two inputs and three outputs (d) two inputs and one output

3. The inputs to a full-adder are A = I, B = I, C;n = O. The outputs are


(a) L = I. Caul = I
(b) L = 1. Caul = 0
(c) L = 0, C out = 1
(d) L = 0, CaUL = 0

(c) L = 0, C out = 1 (d) L = 0, CaUL = 0 4. A 4-bit parallel adder can add


(a) two 4-bit binary numbers (c) four bits at a time (d) four bits in sequence
5. To expand a 4-bit parallel adder to an 8-bit parallel adder, you must
(a) use four 4-bit adders with no interconnections
(b) use two 4-bit adders and connect the sum outputs of one to the bit inputs of
the other
(c) use eight 4-bit adders with no interconnections
(d) use two 4-bit adders with the carry output of one connected to the carry input
of the
other

6. If a 74HC85 magnitude comparator has A = 1011 and B = 1001 on its inputs,


the outputs are
(b) three inputs and two outputs
(d) two inputs and one output
(a) A> B = 0, A < B = I, A = B = 0 (b) A> B = I, A < B = 0, A = B = 0
(c) A > B = I, A < B = I, A = B = 0 (d) A > B = 0, A < B = 0, A = B = 1
7. If a l-of-16 decoder with active-LOW outputs exhibits a LOW on the decimal 12
output. what
are the inputs?
(a) A,AzAtAO = 1010
(c) A:02AJAo = 1100
(b) A:0zAtAO = 1110
(d) A:0.0tAo = 0100
8. A BCD-to-7 segment decoder has 0 I 00 on its inputs. The active outputs are
(a) a, c,j; g
(b) b, c,j; g
(c) b, c, e,f
(d) b, d, e, g
9. If an octal-to-binary priority encoder has its 0, 2. 5, and 6 inputs at the active
level, the active-
HIGH binary output is
(a) 110 (b) 010 lC) 101 (d) 000
10. In generaL a multiplexer has
(a) one data input, several data outputs, and selection inputs
(b) one data input, one data output, and one selection input
(c) several data inputs, several data outputs, and selection inputs
(d) several data inputs, one data output, and selection inputs
11. Data selectors are basically the same as
(a) decoders (b) demultiplexers (c) multiplexers (d) encoders
12. Which of the following codes exhibit even parity?
(a) 10011000 (b) 01111000 (c) 11111111
(d) 11010101 (e) all (f) both answers (b) and (c)

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