VISVODAYA ENGINEERING COLLEGE: KAVALI

DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

II B.Tech (I - Sem) BRANCH: COMMON TO CSE, AIML and IOT

SUBJECT: DIGITAL ELECTRONICS AND MICROPROCESSORS (20A04304T)
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MID – 1 BIT BANK

Unit-1
.1. The binary equivalent of (128)10 is [ C ]
[A] (1100 1101)2 [B] (1011 0110)2 [C] (1000 0000)2 [D](0101 1011)2

2. Example for Alphanumeric code is ________ [ B ]

[A] BCD [B] ASCII [C] Hamming [D] 8-4-2-1

3. What is the maxterm corresponding to decimal number 12? [ C ]

[A] A+B+C+D [B] A’+B’+C’+D’ [C] A’+B’+C+D [D] A+B+C’+D’

4. Convert (48)10 into Execess-3 code [A ]

[A] (0111 1011)Ex-3 [B] (0101 1101)Ex-3 [C] (0110 1010)Ex-3 [D] (1011 0111)Ex-3

5. Convert (10110)2 into Gray code [D ]

[A] (11001)gray [B] (11100) gray [C] (10001) gray [D] (11101) gray

6. According to Boolean rules A+A’=____ [ C ]

[A] A’ [B] A [C] 1 [D] 0

7. Represent -9 in Signed magnitude form? [ B ]

[A] 0 1100 [B] 1 1001 [C] 1 1101 [D] 1 1010

8. which of the logic gate has only one input [C ]

[A] OR [B] Ex-OR [C] NOT [D] AND

9. In K- Map group adjacent 4 one’s are called

[A] Pair [B] Quad [C] Octet [D] None [B ]

10. Four variable K-map contains _____ squares in the map [A ]

[A] 16 [B] 10 [C] 8 [D] 12

11. ____________can be defined as the method or format which is used for denoting a numerical value. [A ]
(A) Number system (B) Electronic system (C) Micro system (D) None

12. Which gates are called as Universal gates? [ A ]

[A] NAND, NOR [B] NOT [C] AND,OR [D] None
13. The ______of a number system is defined as the number of different digits which can occur in each position in
the number system. [A ]
(A) Radix or base (B) positional (C) roman (D) None

14. The combination of binary bits that represent numbers, alphabets and special characters are called____[C ]
(A) Block codes (B) Control codes (C) Binary Codes (D) both a & c

15. What is the Decimal equivalent of (721)8 [ C ]

[A] 561 [B] 11100010000 [C] 465 [D] 721

16. Which is the example of De-Morgan’s theorem? [ A ]

[A] (AB)’=A’+B’ [B] A’+B’ = (A+B)’ [C] (AB)’=A’ [D] A+B=A’+B’

17. What is the 1’s complement of 1011000? [ B ]

[A] 1100010 [B] 0100111 [C] 01010111 [D] 0101110

18. The _______ gate output becomes logic 1 state, only when each one of its inputs at logic 1 state [D ]
[A] OR [B] Ex-OR [C] NOT [D] AND

19. ___ is a product term in which all the variables appear exactly once, either complemented or uncomplemented
[A] Minterm [B] Maxterm [C] sumterm [D] None [A ]

20. In K-map the minterms are arranged not in a binary sequence, but in a sequence similar to the _____ [D ]
[A] BCD Code [B] ASCII [C] 5-4-2-1 [D] Gray code

21. The Binary equivalent of (ACD)16 is [ B ]

[A] (110011010011)2 [B] (101011001101)2 [C] (101101100110)2 [D](010110011011)2

22. Example for self complementing code is ________ [ C ]

[A] BCD [B] Binary [C] 5-2-1-1 [D] 8-4-2-1

23. What is radix or base of Hexadecimal System [A ]

2[A] 16 [B] 8 [C] 10 [D] 2

24. How many binary bits are required to represent BCD digit [C ]
[A] 6 [B] 3 [C] 4 [D] 2

25. What is the hexadecimal equivalent of (3254) 8 [D ]

[A] (A13)16 [B] (A15)16 [C] (4BC)16 [D] (6AC)16

26. Which is the example of De-Morgan’s theorem? [ A ]

[A] (A+B)’=A’B’ [B] A’+B’ = (A+B)’ [C] (AB)’=A’ [D] A+B=A’+B’

27. What is the 2’s complement of 1011000? [ C ]

[A] 1100010 [B] 0100111 [C] 0101000 [D] 0101110
28. The _______ gate output becomes logic 1 state, when only one input at logic 1 state [A ]
[A] OR [B] Ex-OR [C] NOT [D] AND

29. ___ is a Sumterm in which all the variables appear exactly once, either complemented or uncomplemented
[A] Minterm [B] Maxterm [C] Product term [D] None [B ]

30. In K-map the minterms are arranged not in a binary sequence, but in a sequence similar to the _____ [D ]
[A] BCD Code [B] ASCII [C] 5-4-2-1 [D] Gray code

Unit-2

1. The output of a ___________circuit depends on its present inputs. [A ]

[A] Mechanical [B] Sequential [C] Combinational [D] both a & b

2. If the inputs A=1 and B=1then the output of Half Subtractor is (Difference & Barrow) [D ]
[A] 0,1 [B] 1,0 [C] 1,1 [D] 0,0

3. If the inputs A=1, B=0 and C=0 then the output of Full Adder is (Sum & Carry) [B ]
[A] 0,1 [B] 1,0 [C] 1,1 [D] 0,0

4. In adder/ Subtractor the control input M=0, then the circuit acts [A ]
[A] Adder [B] Subtractor [C] both a & b [D] Half Subtractor

5. Serial adder requires ____________ full adders [C ]

[A] 2n [B] n [C] 1 [D] 2+n

6. A Multiplexer has ____ inputs and _____ outputs [C ]

[A] 2n & n [B] n & 2n n
[C] 2 & 1 [D] n & 1

7. A De-multiplexer has ____ inputs and _____ outputs [B ]

[A] 2n & n [B] 1 & 2n n
[C] 2 & 1 [D] n & 1

8. How many 4-to-1 multiplexers required to implement 18-to-1 Mux [D ]

[A] 5 [B] 4 [C] 3 [D] 2

9. Expand PAL______________ [A ]
[A] Programmable Array Logic [B] Programmable Logic Array
[C] Programmable Read only Memory [D] None

10. PLA has a _____ AND array and _______ OR array. [B ]

[A] Fixed & Fixed [B] both programmable [C] Fixed & programmable [D] programmable & Fixed

11. The output of a ___________circuit depends on its present inputs and past history of inputs [B ]
[A] Mechanical [B] Sequential [C] Combinational [D] both a & b
12. If the inputs A=1 and B=1then the output of Half Adder is (Sum & Carry) [C ]
[A] 0,1 [B] 1,0 [C] 1,1 [D] 0,0

13. If the inputs A=0, B=1 and C=1 then the output of Full Subtractor is (Difference & Barrow) [A ]
[A] 0,1 [B] 1,0 [C] 1,1 [D] 0,0

14. A ___is a combinational circuit that subtracts one bit from the other and produces the difference & B [D ]
[A] Full Adder [B] Half Adder [C] both a & b [D] Half Subtractor

15. Serial adder requires ____________ full adders [C ]

[A] 2n [B] n [C] 1 [D] 2+n

16. A Encoder has ____ inputs and _____ outputs [A ]

[A] 2n & n [B] n & 2n n
[C] 2 & 1 [D] n & 1

17. A Decoder has ____ inputs and _____ outputs [B ]

[A] 2n & n [B] n & 2n n
[C] 2 & 1 [D] n & 1

18. How many 8-to-1 multiplexers required to implement 16-to-1 Mux [D ]

[A] 5 [B] 4 [C] 3 [D] 2

19. Expand PLA______________ [B ]

[A] Programmable Array Logic [B] Programmable Logic Array
[C] Programmable Read only Memory [D] None

20. PAL has a _____ AND array and _______ OR array. [C ]

[A] Fixed & Fixed [B] both programmable [C] Fixed & programmable [D] programmable & Fixed

21. The output of a ___________circuit depends on its present inputs only [C ]

[A] Mechanical [B] Sequential [C] Combinational [D] both a & b

22. A _____is a combinational circuit that adds two binary bits and produces two outputs sum and carry bits.
[A] Full Adder [B] Half Adder [C] Half Subtractor [D] both a & b [B ]

23. A digital circuit that adds 3 binary bits is known as ______________ [A ]

[A] Full Adder [B] Half Adder [C] both a & b [D] Half Subtractor

24. A ______is a combinational circuit that subtracts one bit from the other and produces the difference [D ]
[A] Full Adder [B] Half Adder [C] both a & b [D] Half Subtractor

25. Addition of n-bit numbers requires a chain of ______full adders [B ]

[A] 2n [B] n [C] 2n [D] 2+n

26. A binary ______ has n inputs and 2n outputs. Only one output is active at any one time, corresponding to
the input value. [C ]
[A] Encoder [B] multiplexer [C] Decoder [D] Demux
27. If a device output code has fewer bits than the input code has, the device is usually called an ______ [A ]
[A] Encoder [B] multiplexer [C] Decoder [D] Demux

28. A _______ is a combinational circuit that uses several data inputs to generate a single output [B ]
[A] Encoder [B] multiplexer [C] Decoder [D] Demux

29. The demultiplexer is also called______________ [D ]

[A] Encoder [B] Data Selector [C] Decoder [D] Data Distributor

30. PLA has a _____ AND array and _______ OR array. [B ]

[A] Fixed & Fixed [B] both programmable [C] Fixed & programmable [D] programmable & Fixed