TIL306, TIL307

NUMERIC DISPLAYS WITH LOGIC

SLBS001 – D1034, JUNE 1982 – REVISED SEPTEMBER 1992

SOLID-STATE DISPLAYS WITH INTEGRAL TTL MSI CIRCUIT CHIP FOR USE
IN ALL SYSTEMS WHERE THE DATA TO BE DISPLAYED IS THE PULSE COUNT
• 6,9-mm (0.270-Inch) Character Height • Wide Viewing Angle
• High Luminous Intensity • Internal TTL MSI Chip and Counter, Latch,
• TIL306 Has Left Decimal Decoder, and Driver
• TIL307 Has Right Decimal • Constant-Current Drive for Light-Emitting
• Easy System Interface
Diodes

mechanical data
These assemblies consist of display chips and a TTL MSI chip mounted on a header with a red molded plastic
body. Multiple displays may be mounted on 11,43-mm (0.450-inch) centers.

PIN ASSIGNMENTS
Pin 1 QB Pin 9 PCEI
Pin 2 QC Pin 10 SCEI
Pin 3 QD Pin 11 RBO 3,56 (0.140)
Pin 4 QA Pin 12 CLR 2,79 (0.110)
Pin 5 LS Pin 13 DP
Pin 6 RBI Pin 14 BI
Pin 7 MAX-COUNT Pin 15 CLK
Pin 8 GND Pin16 VCC Seating Plane
(see Note A)
4,32 (0.170) MIN

0,56 (0.022)
0,46 (0.018)
CL of Pin 1
4,42 (0.174) DIA All Pins
7,87 (0.310)
7,62 (0.300) 1,52 (0.060)
3,81 (0.150) Decimal Point 1,02 (0.040)
TIL307

CL of Pin 1

1
2,54 (0.100) 4,45 (0.175)
6,45 (0.254) 3,94 (0.155)
4 Places

10°

0,66 (0.026) 26,67 (1.050)

0,66 (0.026) 2,54 (0.100) T.P. 25,65 (1.010)
3,81 (0.150) 14 Places
3,81 (0.150)
(see Note C)

Logic Chip

Decimal Point
TIL306
TIL306 TIL307
A A
F B F B
G G
E C E C
TOP VIEW D.P.
D.P. 10,67 (0.420)
D D
9,65 (0.380)
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Lead dimensions are not controlled above the seating plane.
B. Centerlines of character segments and decimal points are shown as dashed lines. Associated dimensions are nominal.
C. The true-position pin spacing is 2,54 mm (0.100 inch) between centerlines. Each centerline is located with 0,26 mm (0.010 inch) of
its true longitudinal position relative to pins 1 and 16.

PRODUCTION DATA information is current as of publication date. Copyright  1992, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

 SLBS001–D1034, JUNE 1982–REVISED SEPTEMBER 1992

NUMERIC DISPLAYS WITH LOGIC

TL306, TL307
2

logic diagram
Latch Outputs

MAX-COUNT QA QC VCC
QB QD

Count To Logic Chip

SCEI
Enable PCEI
Inputs QA
T
CLK
QA

QB
T
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

QB
a

QC f b
g
T
QC

e c
d

QD
T
dp
QD

CLR TL306 has left decimal.

DP TL307 has right decimal.
BI

RBI RBO
LS

Synchronous BCD counter, 4-bit latch, decoder/driver, seven-segment LED display with decimal point
 TIL306, TIL307
NUMERIC DISPLAYS WITH LOGIC
SLBS001 – D1034, JUNE 1982 – REVISED SEPTEMBER 1992

description
These internally-driven seven-segment light-emitting-diode (LED) displays contain a BCD counter, a four-bit
latch, and a decoder/LED driver in a single 16-pin package. A description of the functions of the inputs and
outputs of these devices are in the terminal function table.
The TTL MSI circuits contain the equivalent of 86 gates on a single chip. Logic inputs and outputs are completely
TTL/DTL compatible. The buffered inputs are implemented with relatively large resistors in series with the bases
of the input transistors to lower drive-current requirements to one-half of that required for a standard Series
54/74 TTL input. The serial-carry input, actually two internal loads, is rated as one standard series 54/74 load.
The logic outputs, except RBO, are active pullup, and the latch outputs QA, QB, QC, and QD are each capable
of driving three standard Series 54/74 loads at a low logic level or six loads at a high logic level while the
maximum-count output is capable of driving five Series 54/74 loads at a low logic level or ten loads at a high
logic level. The RBO node with passive pull-up serves as a ripple-blanking output with the capability to drive
three Series 54/74 loads.
The LED driver outputs are designed specifically to maintain a relatively constant on-level current of
approximately 7 mA through each LED segment and decimal point. All inputs are diode clamped to minimize
transmission-line effects, thereby simplifying system design. Maximum clock frequency is typically 18 MHz and
power dissipation is typically 600 mW with all segments on.
The display format is as follows:

The displays may be interconnected to produce an n-digit display with the following features:
• Ripple-blanking input and output for blanking leading or trailing zeroes
• Floating-decimal-point logic capability
• Overriding blanking for suppressing entire display or pulse modulation of LED brightness
• Dual count-enable inputs for parallel lookahead and serial ripple logic to build high-speed fully
synchronous, multidigit counter systems with no external logic, minimizing total propagation delay from
the clock to the last latch output
• Provision for ripple-count cascading between packages
• Positive-edge-triggered synchronous BCD counter
• Parallel BCD data outputs available to drive logic processors or remote slaved displays simultaneously
with data being displayed
• Latch strobe input allows counter to operate while a previous data point is displayed
• Reset-to-zero capability with clear input.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

TIL306, TIL307
NUMERIC DISPLAYS WITH LOGIC
SLBS001 – D1034, JUNE 1982 – REVISED SEPTEMBER 1992

Terminal Functions
PIN
DESCRIPTION
NAME NO.
BLANKING Input (BI) 14 When high, will blank (turn off) the entire display and force RBO low. Must be low for normal display. May
be pulsed to implement intensity control of the display.
CLEAR Input (CLR) 12 When low, resets and holds counter at 0. Must be high for normal counting.
CLOCK Input (CLK) 15 Each positive-going transition will increment the counter provided that the circuit is in the normal counting
mode (serial and parallel count enable inputs low, clear input high).
DECIMAL POINT 13 Must be high to display decimal point. The decimal point is not displayed when this input is low or when the
Input (DP) display is blanked.
LATCH Outputs (QA, 4, 1, 2, 3 The BCD data that drives the decoder can be stored in the 4-bit latch and is available at these outputs for
QB, QC, QD) driving other logic and/or processors. The binary weights of the outputs are: QA = 1, QB = 2, QC = 4,
QD = 8.
LATCH STROBE 5 When low, data in latches follow the data in the counter. When high, the data in the latches are held constant,
Input (LS) and the counter may be operated independently.
MAX-COUNT Output 7 Will go low when the counter is at 9 and serial count enable input is low. Will return high when the counter
changes to 0 and will remain high during counts 1 through 8. Will remain high (inhibited) as long as serial
count enable input is high.
PARALLEL Count 9 Must be low for normal counting mode. When high, counter will be inhibited. Logic level must not be changed
Enable Input (PCEI) when the clock is low.
RIPPLE-BLANKING 6 When the data in the latches is BCD 0, a low input will blank the entire display and force the RBO low. This
Input (RBI) input has no effect if the data in the latches is other than 0.
RIPPLE-BLANKING 11 Supplies ripple-blanking information for the ripple-blanking input of the next decade. Provides a low if BI is
Output (RBO) high, or if RBI is low and the data in the latches is BCD 0; otherwise, this output is high. This pin has a resistive
pullup circuit suitable for performing a wire-AND function with any open-collector output. Whenever this pin
is low, the entire display will be blanked; therefore, this pin may be used as an active-low blanking input.
SERIAL Count 10 Must be low for normal counting mode, also must be low to enable maximum count output to go low. When
Enable Input (SCEI) high, counter will be inhibited and maximum count output will be driven high. Logic level must not be changed
when the clock is low.

absolute maximum ratings over operating case temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1): Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Nonrepetitive peak, tw ≤ 100 ms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating case temperature range, TC (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 85°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 25°C to 85°C
NOTES: 1. Voltage values are with respect to network ground terminal.
2. Case temperature is the surface temperature of the plastic measured directly over the integrated circuit. Forced-air cooling may be
required to maintain this temperature.

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TIL306, TIL307
NUMERIC DISPLAYS WITH LOGIC
SLBS001 – D1034, JUNE 1982 – REVISED SEPTEMBER 1992

recommended operating conditions

MIN NOM MAX UNIT
Supply voltage, VCC 4.75 5 5.25 V
QA, QB, QC, QD, RBO 3
Low logic level
MAX-COUNT Output 5
Normalilzed
N lil d fan-out
f t from
f each
h output,
t t N
RBO 3
(to Series 54/74 integrated circuits)
High logic level QA, QB, QC, QD 6
MAX-COUNT Output 10
High logic level 25
Clock pulse duration,
duration tw(clock)
( l k) ns
Low logic level 55
Clear pulse duration, tw(clear) 25 ns
Latch strobe pulse duration, tw(latch strobe) 45 ns
PCEI/SCEI↑ before CLOCK↑ 30
Setup time,
time tsu ns
CLEAR↑ before CLOCK↑ 60
Operating case temperature, TC 0 70 °C

electrical characteristics at 25°C case temperature

PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
VIK Input clamp voltage VCC = 4.75 V, II = – 12 mA – 1.5 V
RBO VCC = 4.75 V, IOH = – 120 µA
VOH High-level output voltage QA, QB, QC, QD VCC = 4.75 V, IOH = – 240 µA 2.4 V
MAX-COUNT Output VCC = 4.75 V, IOH = – 400 µA
Low-level output voltage
g QA, QB, QC, QD, RBO VCC = 4.75 V, IOL = 4.8 mA
VOL 04
0.4 V
(see Note 3) MAX-COUNT Output VCC = 4.75 V, IOL = 8 mA
II Input current at maximum input voltage VCC = 5.25 V, VI = 5.5 V 1 mA
SCEI 40 µA
IIH High-level input current RBO node VCC = 5.25 V, VI = 2.4 V – 0.12 – 0.5 mA
Other inputs 20 µA
SCEI – 1.6
IIL Low-level input current RBO node VCC = 5.25 V, VI = 0.4 V – 1.5 – 2.4 mA
Other inputs – 0.8
QA, QB, QC, QD –9 – 27.5
IOS Short circuit output current
Short-circuit VCC = 5.25
5 25 V mA
MAX-COUNT Output – 15 – 55
ICC Supply current VCC = 5.25 V, See Note 4 120 200 mA
Luminous intensity
y Figure 700 1200 µcd
Iv VCC = 5 V
(see Note 5) DP Input 40 70 µcd
λp Wavelength at peak emission VCC = 5 V, See Note 4 660 nm
∆λ Spectral bandwidth VCC = 5 V, See Note 4 20 nm
† All typical values are at VCC = 5 V.
NOTES: 3. This parameter is measured with the display blanked (BI = 5 V).
4. These parameters are measured with all LED segments and the decimal point on.
5. Luminous intensity is measured with a light sensor and filter combination that approximates the CIE (International Commission on
Illumination) eye-response curve.

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TIL306, TIL307
NUMERIC DISPLAYS WITH LOGIC
SLBS001 – D1034, JUNE 1982 – REVISED SEPTEMBER 1992

switching characteristics, VCC = 5 V, TC = 25°C

FROM TO
PARAMETER† TEST CONDITIONS MIN TYP MAX UNIT
(INPUT) (OUTPUT)
fmax 12 18 MHz
tPLH 12
SERIAL lookahead MAX COUNT Output
MAX-COUNT ns
tPHL CL = 15 pF,, RL = 560 Ω,, 23
tPLH See Figure 1 26
CLK Input MAX COUNT Output
MAX-COUNT ns
tPHL 29
tPLH 28
CLK Input QA, QB, QC, QD CL = 15 pF,
F 1 2 kΩ,
RL = 1.2 kΩ ns
tPHL 38
See Figure 1
tPHL CLR Input QA, QB, QC, QD 57 ns
† fmax ≡ Maximum clock frequency
tPLH ≡ Propagation delay time, low-to-high-level output
tPHL ≡ Propagation delay time, high-to-low-level output

PARAMETER MEASUREMENT INFORMATION

Output VCC

RL

From Output
Under Test

CL = 15 pF

NOTES: A. CL includes probe and jig capacitance.

B. All diodes are 1N3064.

Figure 1. Load Circuit

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TIL306, TIL307
NUMERIC DISPLAYS WITH LOGIC
SLBS001 – D1034, JUNE 1982 – REVISED SEPTEMBER 1992

TYPICAL CHARACTERISTICS
RELATIVE LUMINOUS INTENSITY
vs
RELATIVE SPECTRAL CHARACTERISTICS CASE TEMPERATURE
1 4

Luminous Intensity Relative to Value at TC = 25 °C

VCC = 5 V VCC = 5 V
0.9
TC = 25°C
0.8 2
Relative Luminous Intensity

0.7
1
0.6
0.7
0.5

0.4 0.4

0.3

0.2 0.2

0.1

0 0.1
600 620 640 660 680 700 0 10 20 30 40 50 60 70
λ – Wavelength – nm TC – Case Temperature – °C

Figure 2 Figure 3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

 PACKAGE OPTION ADDENDUM
www.ti.com 23-Apr-2005

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
TIL306 OBSOLETE 16 TBD Call TI Call TI
TIL307 OBSOLETE 16 TBD Call TI Call TI
TIL307 OBSOLETE 16 TBD Call TI Call TI
TIL307 OBSOLETE 16 TBD Call TI Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.

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Addendum-Page 1
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