1.

Any signed negative binary number is recognised by its ________

A) MSB
B) LSB
C) Byte
D) Nibble
Answer A
2. The parameter through which 16 distinct values can be represented is
known as ________
a) Bit
b) Byte
c) Word
d) Nibble
Answer: c
3. If the decimal number is a fraction then its binary equivalent is obtained by
________ the number continuously by 2.
A) Dividing
B) Multiplying
C) Adding
D) Subtracting
Answer: c
4. representation of octal number (532.2)8 in decimal is ________
a) (346.25)10
b) (532.864)10
c) (340.67)10
d) (531.668)10
Answer: a

Explanation: Octal to Decimal conversion is obtained by multiplying 8 to the

power of base index along with the value at that index position.
(532.2)8 = 5 * 82 + 3 * 81 + 2 * 80 + 2 * 8-1 = (346.25)10
5. The decimal equivalent of the binary number (1011.011)2 is ________
a) (11.375)10
b) (10.123)10
 c) (11.175)10
d) (9.23)10
Answer: a
Explanation: Binary to Decimal conversion is obtained by multiplying 2 to the
power of base index along with the value at that index position.
=1 * 23 + 0 * 22 + 1 * 21 +1*20 + 0 * 2-1 +1 * 2-2 + 1 * 2-3
 = (11.375)10
Hence, (1011.011)2 = (11.375)10
6. An important drawback of binary system is ________
a) It requires very large string of 1’s and 0’s to represent a decimal number
b) It requires sparingly small string of 1’s and 0’s to represent a decimal
number
c) It requires large string of 1’s and small string of 0’s to represent a decimal
number
d) It requires small string of 1’s and large string of 0’s to represent a
decimal number
Answer: a
7. The decimal equivalent of the octal number (645)8 is ______
a) (450)10
b) (451)10
c) (421)10
d) (501)10
Answer: c

The decimal equivalent of the octal number (645)8 is

= 6×8^2+4×8^1+5×8^0
= (421)10.
8. The largest two digit hexadecimal number is ________
a) (FE)16
b) (FD)16
c) (FF)16
d) (EF)16
Answer: c
9. Representation of hexadecimal number (6DE)H in decimal:
a) 6 * 162 + 13 * 161 + 14 * 160
 b) 6 * 162 + 12 * 161 + 13 * 160
c) 6 * 162 + 11 * 161 + 14 * 160
d) 6 * 162 + 14 * 161 + 15 * 160
Answer: a
10.The quantity of double word is ________
a) 16 bits
b) 32 bits
c) 4 bits
d) 8 bits
Answer: b
11.The given hexadecimal number (1E.53)16 is equivalent to ____________
a) (35.684)8
b) (36.246)8
c) (34.340)8
d) (35.599)8

Answer: b
Explanation: octal equivalent is obtained.
(1E.53)16 = (0001 1110.0101 0011)2
= (00011110.01010011)2
Now put additional zeros to extreme left and right in order to make the
Grouping of 3bits possible
= 000011110.01010010
= (011 110.010 100 110)2
= (36.246)8.

12.The octal number (651.124)8 is equivalent to ______

a) (1A9.2A)16
b) (1B0.10)16
c) (1A8.A3)16
d) (1B0.B0)16
Answer: a
Explanation: First, the octal number is converted to it’s equivalent binary form, by
writing the binary equivalent of each digit in form of 3 bits. Then, the binary
equivalent bits are grouped in terms of 4 bits and then for each of the 4-bits, the
respective digit is written. Thus, the hexadecimal equivalent is obtained.
(651.124)8 = (110 101 001.001 010 100)2
= (110101001.001010100)2
= (0001 1010 1001.0010 1010)2
= (1A9.2A)16.
13.The octal equivalent of the decimal number (417)10 is _____
a) (641)8
b) (619)8
c) (640)8
d) (598)8
Answer: a
Explanation: Octal equivalent of decimal number is obtained by dividing the
number by 8 and collecting the remainders in reverse order.
8 | 417|
8 | 52 | — 1
8 | 6 |–4
|0 |6
So, (417)10 = (641)8.

14.Convert the hexadecimal number (1E2)16 to decimal.

a) 480
b) 483
c) 482
d) 484
Answer: c
Explanation: Hexadecimal to Decimal conversion is obtained by
multiplying 16 to the power of base index along with the value at that
index position.
(1E2)16 = 1 * 162 + 14 * 161 + 2 * 160 (Since, E = 14)
= 256 + 224 + 2
= (482)10.
15.(170)10 is equivalent to ____________
a) (FD)16
b) (DF)16
 c) (AA)16
d) (AF)16
Answer: c
Explanation:
Hexadecimal equivalent of decimal number is obtained by
dividing the number by 16 and collecting the remainders
in reverse order.
16 | 170|
16 | 10 |– 10
| 0 | 10
Hence, (170)10 = (AA)16.
16. Convert (214)8 into decimal.
a) (140)10
b) (141)10
c) (142)10
d) (130)10
Answer: a
Explanation: Octal to Decimal conversion is obtained by multiplying 8 to the
power of base index along with the value at that index position.
(214)8 = 2 * 8v + 1 * 81 + 4 * 80
= 128 + 8 + 4 = (140)10.
17. Convert (0.345)10 into an octal number.
a) (0.16050)8
b) (0.26050)8
c) (0.19450)8
d) (0.24040)8

Answer: b
Explanation: Converting decimal fraction into octal number is achieved by
multiplying the fraction part by 8 everytime and collecting the integer part of the
result, unless the result is 1.
0.345*8 = 2.76 2
0.760*8 = 6.08 6
00.08*8 = 0.64 0
0.640*8 = 5.12 5
0.120*8 = 0.96 0
So, (0.345)10 = (0.26050)8.
18.Convert the binary number (01011.1011)2 into decimal.
a) (11.6875)10
b) (11.5874)10
c) (10.9876)10
d) (10.7893)10
Answer: a
Explanation: Binary to Decimal conversion is obtained by multiplying 2 to the
power of base index along with the value at that index position.
(01011)2 = 0 * 24 + 1 * 23 + 0 * 22 + 1 * 21 + 1 * 20 = 11
(1011)2 = 1 * 2-1 + 0 * 2-2 + 1 * 2-3 + 1 * 2-4 = 0.6875
So, (01011.1011)2 = (11.6875)10.
19.Octal to binary conversion: (24)8 =?
a) (111101)2
b) (010100)2
c) (111100)2
d) (101010)2
Answer: b
Explanation: Each digit of the octal number is expressed in terms of group of 3
bits. Thus, the binary equivalent of the octal number is obtained.
(24)8 = (010100)2
20.Convert binary to octal: (110110001010)2 =?
a) (5512)8
b) (6612)8
c) (4532)8
d) (6745)8
Answer: b
Explanation: The binary equivalent is segregated into groups of 3 bits,
starting from left. And then for each group, the respective digit is
written. Thus, the octal equivalent is obtained.
(110110001010)2 = (6612)8.
21.. In boolean algebra, the OR operation is performed by which properties?
a) Associative properties
b) Commutative properties
 c) Distributive properties
d) All of the Mentioned

Answer: d

22. In boolean algebra, the OR operation is performed by which properties?

a) Associative properties
b) Commutative properties
c) Distributive properties
d) All of the Mentioned
Answer: a
Explanation: The expression for Absorption Law is given by: A+AB = A.
Proof: A + AB = A(1+B) = A (Since 1 + B = 1 as per 1’s Property).

23. According to boolean law: A + 1 = ?

a) 1
b) A
c) 0
d) A’
Answer: a
Explanation: A + 1 = 1, as per 1’s Property.

24. The involution of A is equal to _________

a) A
b) A’
c) 1
d) 0
Answer: a
Explanation: The involution of A means double inversion of A (i.e. A”) and is
equal to A.
Proof: ((A)’)’ = A

25. A(A + B) = ?
a) AB
b) 1
 c) (1 + AB)
d) A
Answer: d
Explanation: A(A + B) = AA + AB (By Distributive Property) = A + AB (A.A = A
By Commutative Property) = A(1 + B) = A*1 (1 + B = 1 by 1’s Property) = A.
26.DeMorgan’s theorem states that _________
a) (AB)’ = A’ + B’
b) (A + B)’ = A’ * B
c) A’ + B’ = A’B’
d) (AB)’ = A’ + B
Answer: a
Explanation: The DeMorgan’s law states that (AB)’ = A’ + B’ & (A + B)’ =
A’ * B’, as per the Dual Property.
27.(A + B)(A’ * B’) = ?
a) 1
b) 0
c) AB
d) AB’
Answer: b
Explanation: The DeMorgan’s law states that (AB)’ = A’ + B’ & (A + B)’ = A’ *
B’, as per the Dual Property.
28. of the expression A’B + CD’ is _________
a) (A’ + B)(C’ + D)
b) (A + B’)(C’ + D)
c) (A’ + B)(C’ + D)
d) (A + B’)(C + D’)
Answer: b
Explanation: (A’B + CD’)’ = (A’B)'(CD’)’ (By DeMorgan’s Theorem) = (A” + B’)
(C’ + D”) (By DeMorgan’s Theorem) = (A + B’)(C’ + D).
29. Simplify Y = AB’ + (A’ + B)C.
a) AB’ + C
b) AB + AC
c) A’B + AC’
d) AB + A
Answer: a
Explanation: Y = AB’ + (A’ + B)C = AB’ + (AB’)’
= (AB’ + C)( AB’ + AB’) = (AB’ + C).1
 = (AB’ + C).
30. The boolean function A + BC is a reduced form of ____________
a) AB + BC
b) (A + B)(A + C)
c) A’B + AB’C
d) (A + C)B
Answer: b
Explanation: (A + B)(A + C) = AA + AC + AB + BC = A + AC + AB + BC (By
Commutative Property) = A(1 + C + B) + BC = A + BC (1 + B + C =1 By 1’s
Property).
31. A single transistor can be used to build which of the following digital logic
gates?
a) AND gates
b) OR gates
c) NOT gates
d) NAND gates
Answer: c

32.How many truth table entries are necessary for a four-input circuit?
a) 4
b) 8
c) 12
d) 16
Answer: d
Explanation: For 4 inputs: 24 = 16 truth table entries are necessary.
33.Which input values will cause an AND logic gate to produce a HIGH output?
a) At least one input is HIGH
b) At least one input is LOW
c) All inputs are HIGH
d) All inputs are LOW
Answer: c
34.The basic logic gate whose output is the complement of the input is the
___________
a) OR gate
b) AND gate
 c) INVERTER gate
d) XOR gate
Answer: c

35.The binary number 10101 is equivalent to decimal number …………..

19

12

27

21

Answer : 4

36.The universal gate is ………………

1. NAND gate
2. OR gate
3. AND gate
4. None of the above

Answer : 1

37. The inverter is ……………

1. NOT gate
2. OR gate
3. AND gate
4. None of the above

Answer : 1

38. The inputs of a NAND gate are connected together. The resulting circuit is
………….

1. OR gate
2. AND gate
 3. NOT gate
4. None of the above

Answer : 3

39. The NOR gate is OR gate followed by ………………

1. AND gate
2. NAND gate
3. NOT gate
4. None of the above

Answer : 3

40. The NAND gate is AND gate followed by …………………

1. NOT gate
2. OR gate
3. AND gate
4. None of the above

Answer : 1

41. Digital circuit can be made by the repeated use of ………………

1. OR gates
2. NOT gates
3. NAND gates
4. None of the above

Answer : 3

42. The only function of NOT gate is to ……………..

1. Stop signal
2. Invert input signal
3. Act as a universal gate
4. None of the above
Answer : 2

43. When an input signal 1 is applied to a NOT gate, the output is ………………

a. 0
b. 1
c. Either 0 & 1
d. None of the above

Answer : a

44. In Boolean algebra, the bar sign (-) indicates ………………..

1. OR operation
2. AND operation
3. NOT operation
4. None of the above

Answer : 3

45. An OR gate has 4 inputs. One input is high and the other three are low. The
output is …….

1. Low
2. High
3. alternately high and low
4. may be high or low depending on relative magnitude of inputs

Answer : 2

Explanation: In OR any input high means high output.

46. Decimal number 10 is equal to binary number ……………

1. 1110
2. 1010
3. 1001
4. 1000
Answer : 2

Explanation: 1010 = 8 + 2 = 10 in decimal.

47. Both OR and AND gates can have only two inputs.

1. True
2. False

Answer : 2

Explanation:  Any number of inputs are possible.

48. For the gate in the given figure the output will be ………..

1)0

2)1

3) A

4)Ā

Answer : 4

Explanation:  If A = 0, Y = 1 and A = 1, Y = 0 Therefore Y = Ā.

49. The number of digits in octal system is ………

A. 8
B. 7
C. 9
D. 10

Answer : A
50. The circuit of the given figure realizes the function …………

Answer : 1

Explanation:
51. Q1: The following truth table corresponds to the logic gate

Input Output

A B X

0 0 0

0 1 1

1 1 1

1 0 1

A. NAND
B. OR
C. AND
D. XOR

Answer: (b) OR
52: Boolean Algebra is essentially based on

A. Truth
B. Logic
C. Symbol
D. Numbers

Answer: (b) Logic

53: The logic behind NOR gate is that it gives

A. HIgh output when both the inputs are low

B. Low output when both the inputs are low
C. HIgh output when both the inputs are high
 D. None of the above

Answer: (a) HIgh output when both the inputs are low
54: A logic gate is an electronic circuit which

A. Makes logic decisions

B. Allows electrons flow only in one direction
C. Woks binary algebra
D. Alternates between 0 and 1 values

Answer: (a) Makes logic decisions

55: How many NAND gates are used to form an AND gate?

A. 1
B. 2
C. 3
D. 4

Answer: (b) 2
56: Which logic gate is represented by the following combination of logic gates?

a. OR
b. NAND
c. AND
d. NOR

Answer: (b) NAND

57: The output of OR gate is 1

a. If both inputs are zero

 b. If either or both inputs are 1
c. Only if both inputs are 1
d. If either input is zero

Answer: (b) If either or both inputs are 1

58: Which of the following logic gate is a universal gate?

a. OR
b. NOT
c. AND
d. NOR

Answer: (d) NOR

59: A gate in which all the inputs must be low to get a high output is

a. NAND gate
b. Inverter
c. NOR gate
d. AND gate

Answer: (b) and (c) Inverter and NOR gate

60: The outputs of a NAND gate is 0

a. If both inputs are 0

b. If one input is 0 and the other input is 1
c. If both inputs are 1
d. If both inputs are 1 or one of the inputs is 1 and the other one is 0

Answer: (c) If both inputs are 1

61. Latches constructed with NOR and NAND gates tend to remain in the latched
condition due to which configuration feature?
a) Low input voltages
b) Synchronous operation
c) Gate impedance
d) Cross coupling
Answer: d
62. . The truth table for an S-R flip-flop has how many VALID entries?
a) 1
b) 2
c) 3
d) 4
Answer: c
Explanation: The SR flip-flop actually has three inputs, Set, Reset and its current
state. The Invalid or Undefined State occurs at both S and R being at 1.
63. When both inputs of a J-K flip-flop cycle, the output will ___________
a) Be invalid
b) Change
c) Not change
d) Toggle
Answer: c
Explanation: After one cycle the value of each input comes to the same value. Eg:
Assume J=0 and K=1. After 1 cycle, it becomes as J=0->1->0(1 cycle complete) and
K=1->0->1(1 cycle complete). The J & K flip-flop has 4 stable states: Latch, Reset,
Set and Toggle.
64. Which of the following is correct for a gated D-type flip-flop?
a) The Q output is either SET or RESET as soon as the D input goes HIGH or LOW
b) The output complement follows the input when enabled
c) Only one of the inputs can be HIGH at a time
d) The output toggles if one of the inputs is held HIGH
Answer: a
Explanation: In D flip flop, when the clock is high then the output depends on the
input otherwise reminds previous output. In a state of clock high, when D is high
the output Q also high, if D is ‘0’ then output is also zero. Like SR flip-flop, the D-
flip-flop also have an invalid state at both inputs being 1
65. .A basic S-R flip-flop can be constructed by cross-coupling of which basic logic
gates?
a) AND or OR gates
b) XOR or XNOR gates
c) NOR or NAND gates
d) AND or NOR gates
Answer: c
66. What is a trigger pulse?
a) A pulse that starts a cycle of operation
b) A pulse that reverses the cycle of operation
c) A pulse that prevents a cycle of operation
d) A pulse that enhances a cycle of operation
Answer: a
67. In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is
____________
a) No change
b) Set
c) Reset
d) Forbidden
Answer: a
68. How is a J-K flip-flop made to toggle?
a) J = 0, K = 0
b) J = 1, K = 0
c) J = 0, K = 1
d) J = 1, K = 1
Answer: d
69. In J-K flip-flop, “no change” condition appears when ___________
a) J = 1, K = 1
b) J = 1, K = 0
c) J = 0, K = 1
d) J = 0, K = 0
Answer: d
70. The output of latches will remain in set/reset untill ___________
a) The trigger pulse is given to change the state
b) Any pulse given to go into previous state
c) They don’t get any pulse more
d) The pulse is edge-triggered
Answer: a