Synchronizing The Sg1525A PWM

PS-7-SG1525
SYNCHRONIZING THE SG1525A PWM

1. Synchronizing One Device to an External Clock
A. Program the SG1525A oscillator with RT and CT to free run at a frequency 10% slower than the external
clock frequency.
B. Drive the SG1525A SYNC terminal (pin 3) with the external clock. Input impedance is 2 kΩ. The clock
amplitude should be greater than 2 V and less than 5 V. Pulse width should be at least 300 ns. For reliable
triggering, but it should not exceed the free-running oscillator clock pulse width by more than 200 ns.
2. Synchronizing Multiple Devices to an External Clock
Two different methods are recommended, depending on the distance between the various SG1525A PWMs. Use
method A if the ICs are within 3 inches of each other and on the same printed circuit board. Otherwise, use
method B.
A. Designate one of the SG1525A PWMs as the master unit and select RT ,CT and RD to free-run 10% slower
than the external sync frequency. Connect all pins together and all OSC pins together, leaving RT pins and
DISCHARGE pins open on the slave units. Drive the SYNC pin of the master with a clock pulse as
described in Section 1 B above.
B. Program each of the separate devices with RT, CT, and RD to free-run 10% slower than the external sync
frequency. Drive each of the SYNC pins with the clock described in Section 1 B. (This arrangement avoids
routing a high impedance line [CT] around a noisy environment.)
3. Synchronizing One Slave Unit to a Master SG1525A
As in Section 2, two methods are advised, depending on the distance between the master unit and the slave. Use
method A for short distances and method B otherwise
A. Program the master unit for desired frequency with RT, CT and RD. Connect the CT pin of the master to the
CT pin of the slave, and the OSC pin of the master to the OSC pin of the slave. Leave RT and
DISCHARGE pins of the slave open.
B. Program the master unit for desired frequency. Program the slave unit to free-run 10% slower than the
master. This is best done by choosing CT and RD to be the same as the master, and by increasing the
value of RT Drive the SYNC pin of the slave with the OSC pin of the master.
4. Synchronizing Multiple SG1525A to a Master SG1525A
Again, different techniques are recommended depending on the physical and electrical distances between the
various PWM circuits. If all of the devices are separated by no more than 3 inches each, and on the same pc
board, then the "cluster" technique described in section 3 A (i.e sharing a master unit's CT and OSC waveforms
with adjacent slave units) will give good results.
If one or more of the devices are remote from the master so that the CT node cannot be distributed without the
possibility of noise pick-up, then each remote unit must be synchronized as described in Section 3 B above. Note
that it is possible to cluster remote units to decrease the required number of timing components. In other words, if
two or more units are close together at one remote location, one of them can be programmed for the required
10% slower free-run frequency, and it’s CT and OSC waveforms can be shared with its neighbours.
This description covers all the possibilities normally encountered.

Note: It is always good engineering practice to ground any unused sync pins to eliminate the possibility of noise
pick-up.
August 2015 Rev. 2 www.microsemi.com 1
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PS-7-SG1525 -02/08.15

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PS-7-SG1525

SYNCHRONIZING THE SG1525A PWM

2. Synchronizing Multiple Devices to an External Clock

3. Synchronizing One Slave Unit to a Master SG1525A

4. Synchronizing Multiple SG1525A to a Master SG1525A

This description covers all the possibilities normally encountered.

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