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ACPL-P314 and ACPL-W314: Data Sheet

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0% found this document useful (0 votes)
81 views17 pages

ACPL-P314 and ACPL-W314: Data Sheet

Uploaded by

Sandeep S
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ACPL-P314 and ACPL-W314

0.6-Amp Output Current IGBT Gate Driver Optocoupler

Data Sheet

Description Features
The ACPL-P314/W314 consists of a GaAsP LED optically  High-speed response
coupled to an integrated circuit with a power output stage.  Ultra high CMR
These optocouplers are ideally suited for driving power IGBTs  Bootstrappable supply current
and MOSFETs used in motor control inverter applications. The
 Available in Stretched SO-6 package
high operating voltage range of the output stage provides the
drive voltages required by gate-controlled devices. The voltage  Package clearance/creepage at 8 mm (ACPL-W314)
and current supplied by this optocoupler makes it ideally  Safety approval:
suited for directly driving small or medium power IGBTs. — UL1577 recognized with 3750 Vrms for 1 minute for
ACPL-P314 and 5000 Vrms for 1 minute for
ACPL-W314
Applications
— CSA Approved
 Isolated IGBT/Power MOSFET gate drive — IEC/EN/DIN EN 60747-5-5 Approved
 AC and brushless DC motor drives — VIORM = 891 Vpeak for ACPL-P314
 Industrial inverters — VIORM = 1140 Vpeak for ACPL-W314
 Inverter for home appliances
 Induction cooker Specifications
 Switching power supplies (SPSs)
 0.6-A maximum peak output current
 0.4-A minimum peak output current
 0.7-μs maximum propagation delay over temperature
range
 ICC(max) = 3-mA maximum supply current
 25 kV/μs minimum common mode rejection (CMR) at
VCM = 1500V
 Wide VCC operating range: 10V to 30V over temperature
range
 Wide operating temperature range: –40°C to 100°C

CAUTION It is advised that normal static precautions be taken in handling and assembly of
this component to prevent damage and/or degradation which may be induced
by ESD. The components featured in this data sheet are not to be used in military
or aerospace applications or environments.

Broadcom
-1-
ACPL-P314 and ACPL-W314 Data Sheet

Functional Diagram
ANODE 1 6 VCC

N.C. 2 5 VO

CATHODE 3 4 VEE
SHIELD

NOTE A 0.1-μF bypass capacitor must be connected between pins VCC and VEE.

Truth Table
LED VO
OFF LOW
ON HIGH

Ordering Information
ACPL-P314 is UL Recognized with 3750 Vrms for 1 minute per UL1577. ACPL-W314 is UL Recognized with 5000 Vrms for 1 minute
per UL1577.

Option
UL 5000 Vrms / IEC/EN/DIN EN
Part Number RoHS Package Surface Mount Tape and Reel Quantity
1 Minute Rating 60747-5-5
Compliant
ACPL-P314 -000E Stretched SO-6 X 100 per tube
-500E X X 1000 per reel
-060E X X 100 per tube
-560E X X X 1000 per reel
ACPL-W314 -000E Stretched SO-6 X X 100 per tube
-500E X X X 1000 per reel
-060E X X X 100 per tube
-560E X X X X 1000 per reel

To order, choose a part number from the part number column and combine with the desired option from the option column to
form an order entry.
Example 1:
ACPL-P314-560E to order product of Stretched SO-6 Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN
60747-5-5 Safety Approval in RoHS compliant.
Example 2:
ACPL-P314-000E to order product of Stretched SO-6 Surface Mount package in tube packaging and RoHS compliant.
Option data sheets are available. Contact your Broadcom sales representative or authorized distributor for information.

NOTE The notation #XXX is used for existing products, while (new) products launched since July 15, 2001 and RoHS
compliant option will use -XXXE.

Broadcom
-2-
ACPL-P314 and ACPL-W314 Data Sheet

Package Outline Drawings

ACPL-P314 Stretched SO-6 Package

*4.580 +– 0.254
0 Land Pattern Recommendation
0.381 ±0.127 1.27 (0.050) BSG
(0.015 ±0.005) (0.180 +– 0.010
0.000 ) 0.76 (0.03)

1.27 (0.05)

2.16
10.7 (0.085)
(0.421)
7.62 (0.300)
6.81 (0.268) 1.590 ±0.127 3.180 ±0.127
(0.063 ±0.005)
0.45 (0.018) (0.125 ±0.005)
45°
7° 7°

0.20 ±0.10 7° 0.254 ±0.050


(0.008 ±0.004) (0.010 ±0.002) Floating Lead Protusions max. 0.25 (0.01)
Dimensions in Millimeters (Inches)
1 ±0.250 5° NOM.
(0.040 ±0.010) Lead Coplanarity = 0.1 mm (0.004 Inches)
9.7 ±0.250
* Total Package Length (inclusive of mold flash)
(0.382 ±0.010)
4.834 ± 0.254 (0.190 ± 0.010)

Broadcom
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ACPL-P314 and ACPL-W314 Data Sheet

ACPL-W314 Stretched SO-6 Package

*4.580 +– 0.254
0
(0.180 +– 0.010
0.000 )
1.27 (0.050) BSG Land Pattern Recommendation
0.381 ±0.127
(0.015 ±0.005) 0.76 (0.03)

1 6
2 5
3 4
1.27 (0.05)

1.905
7.62 (0.300) 12.65 (0.075)
6.807 +– 0.127
0 (0.5)
( 0.268 +– 0.005
0.000 )
1.590 ±0.127 3.180 ±0.127
7° (0.063 ±0.005) (0.125 ±0.005)
45°
0.45 (0.018) 7°

0.20 ±0.10
(0.008 ±0.004)

7° 0.254 ±0.050 7°
0.750 ±0.250 (0.010 ±0.002)
(0.0295 ±0.010)
35° NOM. Floating Lead Protusions max. 0.25 (0.01)
11.500 ±0.25 Dimensions in Millimeters (Inches)
(0.453 ±0.010) Lead Coplanarity = 0.1 mm (0.004 Inches)
* Total Package Length (inclusive of mold flash)
4.834 ± 0.254 (0.190 ± 0.010)

Recommended Pb-Free IR Profile


Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-halide flux should be used.

Regulatory Information
The ACPL-P314/W314 is approved by the following organizations.

IEC/EN/DIN EN 60747-5-5 Approval under IEC 60747-5-5:2007.


(Option 060 only)
UL Approval under UL 1577 component recognition program up to VISO = 3750 VRMS for the ACPL-P314 and
VISO = 5000 VRMS for the ACPL-W314, File E55361.
CSA Approval under CSA Component Acceptance Notice #5, File CA 88324.

Broadcom
-4-
ACPL-P314 and ACPL-W314 Data Sheet

IEC/EN/DIN EN 60747-5-5 Insulation Related Characteristicsa (ACPL-P314/W314


Option 060)
Description Symbol ACPL-W314 ACPL-P314 Unit
Installation Classification per DIN VDE 0110/1.89, Table 1
For Rated Mains Voltage ≤ 150 Vrms I-IV I-IV
For Rated Mains Voltage ≤ 300 Vrms I-IV I-IV
For Rated Mains Voltage ≤ 450 Vrms I-IV I-III
For Rated Mains Voltage ≤ 600 Vrms I-IV I-III
For Rated Mains Voltage ≤ 1000 Vrms I-III
Climatic Classification 55/100/21 55/100/21
Pollution Degree (DIN VDE 0110/1.89) 2 2
Maximum Working Insulation Voltage VIORM 1140 891 Vpeak

Input to Output Test Voltage, Method ba VPR 2137 1670 Vpeak


VIORM × 1.875 = VPR, 100% Production Test with tm = 1s, Partial Discharge < 5 pC

Input to Output Test Voltage, Method aa VPR 1824 1426 Vpeak


VIORM × 1.6 = VPR, Type and Sample Test, tm = 10s, Partial Discharge < 5 pC
Highest Allowable Overvoltage* (Transient Overvoltage, tini = 60s) VIOTM 8000 6000 Vpeak
Safety Limiting Values (maximum values allowed in the event of a failure)
Case Temperature TS 175 175 °C
Input Currentb IS,INPUT 230 230 mA
600 600 mW
Output Powerb PS,OUTPUT
Insulation Resistance at TS, VIO = 500 V RS ≤109 ≤109 Ω

a. Refer to IEC/EN/DIN EN 60747-5-5 Optoisolator Safety Standard section of the Broadcom Regulatory Guide to Isolation Circuits, AV02-2041EN, for a detailed
description of Method a and Method b partial discharge test profiles.
b. Refer to the following figure for dependence of PS and IS on ambient temperature:

800
PS (mW)
700
OUTPUT POWER – PS, INPUT CURRENT – IS

IS (mA)
600

500

400

300

200

100

0
0 25 50 75 100 125 150 175 200
TS – CASE TEMPERATURE – °C

Broadcom
-5-
ACPL-P314 and ACPL-W314 Data Sheet

Insulation and Safety-Related Specifications


ACPL-
Parameter Symbol Unit Conditions
P314 W314
Minimum External Air Gap (External Clearance) L(101) 7.0 8.0 mm Measured from input terminals to output
terminals, shortest distance through air.
Minimum External Tracking (External L(102) 8.0 8.0 mm Measured from input terminals to output
Creepage) terminals, shortest distance path along body.
Minimum Internal Plastic Gap (Internal 0.08 0.08 mm Through insulation distance conductor to
Clearance) conductor, usually the straight line distance
thickness between the emitter and detector.
Minimum Internal Tracking (Internal Creepage) N/A N/A mm Measured from input terminals to output
terminals, along internal cavity.
Tracking Resistance (Comparative Tracking CTI >175 >175 V DIN IEC 112/VDE 0303 Part 1.
Index)
Isolation Group IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1).

NOTE All Broadcom data sheets report the creepage and clearance inherent to the optocoupler component itself. These
dimensions are needed as a starting point for the equipment designer when determining the circuit insulation
requirements. However, once mounted on a printed circuit board, minimum creepage and clearance requirements
must be met as specified for individual equipment standards. For creepage, the shortest distance path along the
surface of a printed circuit board between the solder fillets of the input and output leads must be considered (the
recommended land pattern does not necessarily meet the minimum creepage of the device). There are
recommended techniques such as grooves and ribs that may be used on a printed circuit board to achieve desired
creepage and clearances. Creepage and clearance distances will also change depending on factors, such as
pollution degree and insulation level.

Broadcom
-6-
ACPL-P314 and ACPL-W314 Data Sheet

Absolute Maximum Ratings


Parameter Symbol Min. Max. Unit Note
Storage Temperature TS –55 125 °C
Operating Temperature TA –40 100 °C
Average Input Current IF(AVG) — 25 mA a

Peak Transient Input Current (<1 μs pulse width, 300 pps) IF(TRAN) — 1.0 A
Reverse Input Voltage VR — 5 V
High Peak Output Current IOH(PEAK) — 0.6 A b

Low Peak Output Current IOL(PEAK) — 0.6 A b

Supply Voltage VCC – VEE –0.5 35 V


Output Voltage VO(PEAK) –0.5 VCC V
Output Power Dissipation PO — 250 mW c

Input Power Dissipation PI — 45 mW d

Lead Solder Temperature 260°C for 10s., 1.6 mm below seating plane
Solder Reflow Temperature Profile See Package Outline Drawings section.
a. Derate linearly above 70°C free air temperature at a rate of 0.3 mA/°C.
b. Maximum pulse width = 10 ms, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with IO peak minimum
= 0.4A. See Applications Information section for additional details on limiting IOL peak.
c. Derate linearly above 85°C, free air temperature at the rate of 4.0 mW/°C.
d. Input power dissipation does not require derating.

Recommended Operating Conditions


Parameter Symbol Min. Max. Unit Note
Power Supply VCC – VEE 10 30 V
Input Current (ON) IF(ON) 8 12 mA
Input Voltage (OFF) VF(OFF) –3.6 0.8 V
Operating Temperature TA –40 100 °C

Broadcom
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ACPL-P314 and ACPL-W314 Data Sheet

Electrical Specifications (DC)


Over recommended operating conditions unless otherwise specified.

Parameter Symbol Min. Typ. Max. Unit Test Conditions Figure Note
High Level Output Current IOH 0.2 — — A VO = VCC – 4 2 a

0.4 0.5 — A VO = VCC – 10 3 b

Low Level Output Current IOL 0.2 0.4 — A VO = VEE + 2.5 5 a

0.4 0.5 — A VO = VEE + 10 6 b

High Level Output Voltage VOH VCC – 4 VCC – 1.8 — V IO = –100 mA 1 c, d

Low Level Output Voltage VOL — 0.4 1 V IO = 100 mA 4


High Level Supply Current ICCH — 0.7 3 mA IF = 10 mA 7, 8 e

Low Level Supply Current ICCL — 1.2 3 mA IF = 0 mA 7, 8 e

Threshold Input Current Low to High IFLH — 7 mA IO = 0 mA, VO > 5V 9, 15


Threshold Input Voltage High to Low VFHL 0.8 — — V IO = 0 mA, VO > 5V
Input Forward Voltage VF 1.2 1.5 1.8 V IF = 10 mA 16
Temperature Coefficient of Input Forward ΔVF/ΔTA — –1.6 — mV/°C IF = 10 mA
Voltage
Input Reverse Breakdown Voltage BVR 5 — — V IR = 10 μA
Input Capacitance CIN — 60 — pF f = 1 MHz, VF = 0V

a. Maximum pulse width = 50 ms, maximum duty cycle = 0.5%.


b. Maximum pulse width = 10 ms, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with IO peak minimum
= 0.4A. See the Applications section for additional details on limiting IOL peak.
c. In this test, VOH is measured with a DC load current. When driving capacitive load, VOH approaches VCC as IOH approaches zero amps.
d. Maximum pulse width = 1 ms, maximum duty cycle = 20%.
e. The power supply current increases when operating frequency and Qg of the driven IGBT increases.

Broadcom
-8-
ACPL-P314 and ACPL-W314 Data Sheet

Switching Specifications (AC)


Over recommended operating conditions unless otherwise specified.

Parameter Symbol Min. Typ. Max. Unit Test Conditions Figure Note
Propagation Delay Time to High Output Level tPLH 0.1 0.2 0.7 μs Rg = 47Ω, 10, 11, a
Cg = 3 nF, 12, 13,
f = 10 kHz, 14, 17
Propagation Delay Time to Low Output Level tPHL 0.1 0.3 0.7 μs Duty Cycle = 50%, a
IF = 8 mA,
Propagation Delay Difference Between Any PDD –0.5 — 0.5 μs VCC = 30V b
Two Parts or Channels
Rise Time tR — 50 — ns
Fall Time tF — 50 — ns
Output High Level Common Mode Transient |CMH| 25 — — kV/μs TA = 25°C, 18 c
Immunity VCM = 1500V
Output Low Level Common Mode Transient |CML| 25 — — kV/μs 18 d
Immunity
a. This load condition approximates the gate load of a 1200V/25A IGBT.
b. PDD is the difference between tPHL and tPLH between any two parts or channels under the same test conditions.
c. Common mode transient immunity in the high state is the maximum tolerable |dVCM/dt| of the common mode pulse VCM to ensure that the output remains
in the high state (that is, VO > 6.0V).
d. Common mode transient immunity in a low state is the maximum tolerable |dVCM/dt| of the common mode pulse, VCM, to ensure that the output remains in
a low state (that is, VO < 1.0V).

Package Characteristics
Parameter Symbol Min. Typ. Max. Unit Test Conditions Figure Note
Input-Output Momentary ACPL-P314 VISO 3750 — — Vrms TA = 25°C, a, b
Withstand Voltage RH < 50% for 1 min.
ACPL-W314 5000 — — b, c

Input-Output Resistance RI-O — 1012 — VI-O = 500V b

Input-Output Capacitance CI-O — 0.6 — pF Freq = 1 MHz

a. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 4500 Vrms for 1 second (leakage detection current limit
II-O < 5 μA). This test is performed before 100% production test for partial discharge (method B) shown in the IEC/EN/DIN EN 60747-5-5 Insulation Related
Characteristicsa (ACPL-P314/W314 Option 060) table, if applicable.
b. The device is considered a two-terminal device: pins on input side shorted together and pins on output side shorted together.
c. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000 Vrms for 1 second (leakage detection current limit
II-O < 5A). This test is performed before 100% production test for partial discharge (method B) shown in the IEC/EN/DIN EN 60747-5-5 Insulation Related
Characteristicsa (ACPL-P314/W314 Option 060) table, if applicable.

Broadcom
-9-
ACPL-P314 and ACPL-W314 Data Sheet

Figure 1 VOH vs. Temperature Figure 2 IOH vs. Teperature

0 0.40
(VOH-VCC) – HIGH OUTPUT VOLTAGE DROP – V

-0.5 0.38

IOH – OUTPUT HIGH CURRENT – A


-1.0 0.36

-1.5 0.34

-2.0 0.32

-2.5 0.30
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
TA – TEMPERATURE – °C TA – TEMPERATURE – °C

Figure 3 VOH vs. IOH Figure 4 VOL vs. Temperature

0.44

0.43
VOL – OUTPUT LOW VOLTAGE – V

0.42

0.41

0.40

0.39
-50 -25 0 25 50 75 100 125
TA – TEMPERATURE – °C

Figure 5 IOL vs. Temperature Figure 6 VOL vs. IOL

0.470 25

0.465
20
VOL – OUTPUT LOW VOLTAGE – V
IOL – OUTPUT LOW CURRENT – A

0.460
15
0.455
10
0.450

5
0.445

0.440 0
-50 -25 0 25 50 75 100 125 0 100 200 300 400 500 600 700
TA – TEMPERATURE – °C IOL – OUTPUT LOW CURRENT – mA

Broadcom
- 10 -
ACPL-P314 and ACPL-W314 Data Sheet

Figure 7 ICC vs. Temperature Figure 8 ICC vs. VCC

1.4 1.2

1.2 1.0

ICC – SUPPLY CURRENT – mA


ICC – SUPPLY CURRENT – mA

1.0
0.8
0.8
0.6
0.6
0.4
0.4
ICCL ICCL
0.2
0.2 ICCH
ICCH
0 0
-50 -25 0 25 50 75 100 125 10 15 20 25 30
TA – TEMPERATURE – °C VCC – SUPPLY VOLTAGE – V

Figure 9 IFLH vs. Temperature Figure 10 Propagation Delay vs. VCC

3.5 400
IFLH – LOW TO HIGH CURRENT THRESHOLD – mA

3.0
TP – PROPAGATION DELAY – ns

300

2.5 200

2.0 100
TPLH
TPHL
1.5 0
-50 -25 0 25 50 75 100 125 10 15 20 25 30
TA – TEMPERATURE – °C VCC – SUPPLY VOLTAGE – V

Figure 11 Propagation Delay vs. IF Figure 12 Propagation Delay vs. Temperature

400 500

400
TP – PROPAGATION DELAY – ns
TP – PROPAGATION DELAY – ns

300

300
200
200

100
100 TPLH
TPHL
0 0
6 9 12 15 18 -50 -25 0 25 50 75 100 125
IF – FORWARD LED CURRENT – mA TA – TEMPERATURE – °C

Broadcom
- 11 -
ACPL-P314 and ACPL-W314 Data Sheet

Figure 13 Propagation Delay vs. Rg Figure 14 Propagation Delay vs. Cg

400 400
TP – PROPAGATION DELAY – ns

350

TP – PROPAGATION DELAY – ns
300

TPLH
300 200
TPHL

250 100
TPLH
TPHL
200 0
0 50 100 150 200 0 20 40 60 80 100
Rg – SERIES LOAD RESISTANCE – W Cg – LOAD CAPACITANCE – nF

Figure 15 Transfer Characteristics Figure 16 Input Current vs. Forward Voltage

35 25

30
20
25
IF – FORWARD CURRENT – mA
VO – OUTPUT VOLTAGE – V

20 15
15

10 10

5
5
0

-5 0
0 1 2 3 4 5 6 1.2 1.4 1.6 1.8
IF – FORWARD LED CURRENT – mA VF – FORWARD VOLTAGE – V

Figure 17 Propagation Delay Test Circuit and Waveforms

IF = 7 to 16 mA
IF

1 6 tr tf
500 : 0.1 PF
+ VO + VCC = 15 90%
- 2 5 - to 30 V
10 KHz 47: 50%
50% DUTY 3 nF
CYCLE 3 4 VOUT 10%

tPLH tPHL

Broadcom
- 12 -
ACPL-P314 and ACPL-W314 Data Sheet

Figure 18 CMR Test Circuit and Waveforms


IF VCM
A GV VCM
=
1 6 Gt 't
B 0.1 PF
VO 0V
+ +
5V - 2 5 -
't
VCC = 30V

3 4 VOH
VO

SWITCH AT A: IF = 10 mA
+
-

VCM = 1000V VO VOL

SWITCH AT B: IF = 0 mA

Applications Information Selecting the Gate Resistor (Rg)


Step 1: Calculate Rg minimum from the IOL peak specification.
Eliminating Negative IGBT Gate Drive The IGBT and Rg in Figure 19 can be analyzed as a simple RC
circuit with a voltage supplied by the ACPL-P314/W314.
To keep the IGBT firmly off, the ACPL-P314/W314 has a very low
maximum VOL specification of 1.0V. Minimizing Rg and the lead V CC  V OL
inductance from the ACPL-P314/W314 to the IGBT gate and Rg =
I OLPEAK
emitter (possibly by mounting the ACPL-P314/W314 on a small
PC board directly above the IGBT) can eliminate the need for 24  5
=
negative IGBT gate drive in many applications as shown in 0.6
Figure 19. Care should be taken with such a PC board design to = 32 :
avoid routing the IGBT collector or emitter traces close to the
ACPL-P314/W314 input as this can result in unwanted coupling The VOL value of 5V in the previous equation is the VOL at the
of transient signals into the input of ACPL-P314/W314 and peak current of 0.6A. (See Figure 6).
degrade performance. (If the IGBT drain must be routed near
the ACPL-P314/W314 input, then the LED should be reverse
biased when in the off state, to prevent the transient signals
coupled from the IGBT drain from turning on the
ACPL-P314/W314.)

Figure 19 Recommended LED Drive and Application Circuit for ACPL-P314/W314


+5 V
270 : + HVDC
ACPL-P314/W314
1 6 VCC = 24V
0.1 PF +
- Rg
CONTROL Q1
INPUT
2 5
3-PHASE
74XXX AC
OPEN 3 4
COLLECTOR

Q2
- HVDC

Broadcom
- 13 -
ACPL-P314 and ACPL-W314 Data Sheet

Step 2: Check the ACPL-P314/W314 power dissipation and LED Drive Circuit Considerations for Ultra High
increase Rg if necessary. The ACPL-P314/W314 total power CMR Performance
dissipation (PT) is equal to the sum of the emitter power (PE)
and the output power (PO). Without a detector shield, the dominant cause of optocoupler
CMR failure is capacitive coupling from the input side of the
PT = P E + PO optocoupler, through the package, to the detector IC as shown
P E = I F · V F · DutyCycle in Figure 21. The ACPL-P314/W314 improves CMR performance
P O = P O(BIAS) + P O(SWITCHING) = I CC · V CC + E SW (R g ; Q g ) · f by using a detector IC with an optically transparent Faraday
shield, which diverts the capacitively coupled current away
= (I CCBIAS + K ICC · Q g · f ) · VCC + E SW (R g ; Q g ) · f
from the sensitive IC circuitry. However, this shield does not
eliminate the capacitive coupling between the LED and
where KICC · Qg · f is the increase in ICC due to switching and optocoupler pins 5–8 as shown in Figure 22. This capacitive
KICC is a constant of 0.001 mA/(nC*kHz). For the circuit in coupling causes perturbations in the LED current during
Figure 19 with IF (worst case) = 10 mA, Rg = 32Ω, Max Duty common mode transients and becomes the major source of
Cycle = 80%, Qg = 100 nC, f = 20 kHz, and TAMAX = 85°C: CMR failures for a shielded optocoupler. The main design
objective of a high CMR LED drive circuit becomes keeping the
P E = 10 mA · 1.8V · 0.8 = 14 mW LED in the proper state (on or off ) during common mode
P O = (3 mA + (0.001 mA/nC · kHz) · 20 kHz · 100 nC) · 24V + transients. For example, the recommended application circuit
0.4 PJ · 20 kHz = 128 mW < 250 mW ( P O(MAX) @85 qC) (Figure 19) can achieve 10 kV/μs CMR while minimizing
component complexity.
The value of 3 mA for ICC in the previous equation is the max. Techniques to keep the LED in the proper state are discussed in
ICC over entire operating temperature range. the next two sections.
Since PO for this case is less than PO(MAX), Rg = 32Ω is alright for Figure 21 Optocoupler Input to Output Capacitance Model for
the power dissipation. Unshielded Optocouplers

Figure 20 Energy Dissipated in the ACPL-P314/W314 and for Each CLEDP


1 6
IGBT Switching Cycle

4.0 2 5
Qg = 50 nC
3.5
Qg = 100 nC
Esw – ENERGY PER SWITCHING CYCLE – μJ

3 CLEDN 4

3.0 Qg = 200 nC
Qg = 400 nC Figure 22 Optocoupler Input to Output Capacitance Model for
2.5 Shielded Optocouplers

2.0 CLEDP CLED01


1 6
1.5
2 CLED02 5
1.0
3 CLEDN SHIELD 4
0.5

0
0 20 40 60 80 100 CMR with the LED On (CMRH)
Rg – GATE RESISTANCE – :
A high CMR LED drive circuit must keep the LED on during
common mode transients. This is achieved by overdriving the
LED current beyond the input threshold so that it is not pulled
below the threshold during a transient. A minimum LED
current of 8 mA provides adequate margin over the maximum
IFLH of 5 mA to achieve 10 kV/μs CMR.

Broadcom
- 14 -
ACPL-P314 and ACPL-W314 Data Sheet

CMR with the LED Off (CMRL) Figure 25 Recommended LED Drive Circuit for Ultra-High CMR
Dead Time and Propagation Delay Specifications
A high CMR LED drive circuit must keep the LED off (VF ≤ +5 V
VF(OFF)) during common mode transients. For example, during CLEDP
1 6
a –dVCM/dt transient in Figure 23, the current flowing through
CLEDP also flows through the RSAT and VSAT of the logic gate. As
long as the low state voltage developed across the logic gate is 2 5
less than VF(OFF), the LED remains off and no common mode
failure occurs. 3 CLEDN SHIELD 4

Figure 23 Equivalent Circuit for Figure 17 During Common Mode


Transient

CLEDP
+5 V 1 6 VCC = 18V Dead Time and Propagation Delay Specifications
0.1 PF +
ILEDP - Rg
+
VSAT 2 5 The ACPL-P314/W314 includes a Propagation Delay Difference
-
(PDD) specification intended to help designers minimize dead
3 CLEDN SHIELD 4 time in their power inverter designs. Dead time is the time high
· THE ARROWS INDICATE THE DIRECTION
and low side power transistors are off. Any overlap in Ql and Q2
· OF CURRENT FLOW DURING - dVCM / dt conduction will result in large currents flowing through the
power devices from the high voltage to the low-voltage motor
+
-

VCM rails. To minimize dead time in a given design, the turn on of


LED2 should be delayed (relative to the turn off of LED1) so that
under worst-case conditions, transistor Q1 has just turned off
The open collector drive circuit, shown in Figure 24, cannot when transistor Q2 turns on, as shown in Figure 26. The
keep the LED off during a +dVCM/dt transient, since all the amount of delay necessary to achieve this condition is equal to
current flowing through CLEDN must be supplied by the LED, the maximum value of the propagation delay difference
and it is not recommended for applications requiring ultra high specification, PDD max, which is specified to be 500 ns over the
CMR1 performance. The alternative drive circuit, like the operating temperature range of –40°C to 100°C.
recommended application circuit (Figure 19), achieves ultra
high CMR performance by shunting the LED in the off state. Figure 26 Minimum LED Skew for Zero Dead Time

Figure 24 Not Recommended Open Collector Drive Circuit ILED1

CLEDP
+5 V 1 6 VOUT1
Q1 ON
Q1 OFF
2 5
CLEDN
Q2 ON
3 4
ILEDN SHIELD Q2 OFF
VOUT2
Q1

ILED2
tPHL MAX
tPLH MIN

PDD* MAX = (tPHL- tPLH)MAX = tPHL MAX - tPLH MIN

*PDD = PROPAGATION DELAY DIFFERENCE


NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS
ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.

Broadcom
- 15 -
ACPL-P314 and ACPL-W314 Data Sheet

Delaying the LED signal by the maximum propagation delay Thermal Model for ACPL-P314/W314
difference ensures that the minimum dead time is zero, but it Streched-SO6 Package Optocoupler
does not tell a designer what the maximum dead time will be.
The maximum dead time is equivalent to the difference
between the maximum and minimum propagation delay Definitions
difference specification as shown in Figure 27. The maximum
dead time for the ACPL-P314/W314 is 1 μs (= 0.5 μs – (–0.5 μs)) R11: Junction to Ambient Thermal Resistance of LED due to
over the operating temperature range of –40°C to 100°C. heating of LED.
R12: Junction to Ambient Thermal Resistance of LED due to
Figure 27 Waveforms for Dead Time heating of Detector (Output IC).
ILED1 R21: Junction to Ambient Thermal Resistance of Detector
(Output IC) due to heating of LED.
VOUT1 R22: Junction to Ambient Thermal Resistance of Detector
Q1 ON
(Output IC) due to heating of Detector (Output IC).
Q1 OFF
P1: Power dissipation of LED (W).
Q2 ON P2: Power dissipation of Detector/Output IC (W).
VOUT2 Q2 OFF
T1: Junction temperature of LED (C).
T2: Junction temperature of Detector (C).
ILED2
tPHL MIN Ta: Ambient temperature.
tPHL MAX
ΔT1: Temperature difference between LED junction and
tPLH
MIN
ambient (C).
tPLH MAX ΔT2: Temperature deference between Detector junction and
(tPHL-tPLH) MAX ambient.
PDD* MAX
Ambient Temperature: Junction to Ambient Thermal
MAXIMUM DEAD TIME Resistances were measured approximately 1.25 cm above
(DUE TO OPTOCOUPLER)
= (tPHL MAX - tPHL MIN) + (tPLH MAX - tPLH MIN) optocoupler at ~23°C in still air.
= (tPHL MAX - tPLH MIN) – (tPHL MIN - tPLH MAX)
= PDD* MAX – PDD* MIN
Description
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION
DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS. This thermal model assumes that an 6-pin single-channel
plastic package optocoupler is soldered into a 7.62 cm ×
7.62 cm printed circuit board (PCB). The temperature at the LED
NOTE The propagation delays used to calculate PDD
and Detector junctions of the optocoupler can be calculated
and dead time are taken at equal
using the equations below.
temperatures and test conditions since the
optocouplers under consideration are T1 = (R11 × P1 + R12 × P2) + Ta -- (1)
typically mounted in close proximity to each
T2 = (R21 × P1 + R22 × P2) + Ta -- (2)
other and are switching identical IGBTs.

JEDEC Specifications R11 R12, R21 R22

Low K board 357 150, 166 228


High K board 249 76, 79 159

NOTE Maximum junction temperature for above


parts: 125°C.

Broadcom
- 16 -
For product information and a complete list of distributors, please go to our web
site: www.broadcom.com.
Broadcom, the pulse logo, Connecting everything, Avago Technologies, Avago,
and the A logo are among the trademarks of Broadcom and/or its affiliates in the
United States, certain other countries and/or the EU.
Copyright © 2005–2017 by Broadcom. All Rights Reserved.
The term "Broadcom" refers to Broadcom Limited and/or its subsidiaries. For
more information, please visit www.broadcom.com.
Broadcom reserves the right to make changes without further notice to any
products or data herein to improve reliability, function, or design.
Information furnished by Broadcom is believed to be accurate and reliable.
However, Broadcom does not assume any liability arising out of the application
or use of this information, nor the application or use of any product or circuit
described herein, neither does it convey any license under its patent rights nor
the rights of others.
AV02-0158EN – April 4, 2017

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