EDC Lab No.1
EDC Lab No.1
DC Analysis of BJT
Objective:
(a)To perform the DC analysis of BJT Fixed biased also measure the quantities I C, IB, VCE.
(b) To perform the DC analysis of BJT emitter feedback biased also measure the
quantities IC, IB, VCE.
(c)To perform the DC analysis of BJT collector feedback biased configuration also measure the
quantities IC, IB, VCE
Theory Overview:
Before we can use a transistor to amplify an ac signal, we have to setup a Q point of operation,
typically near the middle of the dc load line. Then the incoming ac signal can produce fluctuation
above and below this Q point. The three most primitive forms of bias are Base bias, Emitter-
feedback bias and Collector-feedback. But these are not the best ways to bias a transistor if a
stable Q point is required. Voltage divider bias configuration is such a network in which effect of
beta variation is virtually eliminated so that it will provide a stable Q point.
Equipment/Apparatus:
Procedure:
(a) Fixed biased
VCC VBE
IB
RB
IC I B
VCE VCC I C RC
Results:
VCC VBE VE
IB
RB
IC I B
VCE VCC IC RC RE
Results:
Measured Calculated
Transistor IC VE VCE IC VE VCE
14.6uA 2.3v 7.57mA 13.3uA 2.3vA 12.2v
Measured Calculated
Transistor IC VB VCE IC VB VCE
1.6mA 14.5v 14.9v 1.5mA 14.1v 1.4mA
Discussion on Results:
Describe the results of your experiment in your lab report, by analyzing them in accordance with
the theory overview section.
Conclusion:
Write concluding remarks about the learning outcomes of the experiment in lab report
Lab Tasks:
1-Prepare an analysis that depicts that which biasing scheme is stable among the three schemes
implemented in this lab session.