Assignment Analogue 1 - 052021

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FACULTY OF ENGINEERING

EE114 / BEE1033 Analogue Electronics I


ASSIGNMENT (MAY - AUG 2020)

Due Date : 10th August 2021


Lecturer : Shahid Manzoor
Members : Maximum 5 students / Group
1.
2.
3.
4.
5.

CLO1 CLO2 CLO3 CLO4 CLO5


Assessment
PLO 5
Assignment/Short √
Project
Upon completion of this module, the student will be able to:
Course Learning
CLO5: Perform the simulations for the rectifier circuits, dc power supply, BJT &
Outcome
FET bias circuit and amplifier

PLO 5: MODERN TOOL USAGE - Create, select and apply appropriate


Programme Learning techniques, resources, and modern engineering and IT tools, including prediction
Outcome and modelling, to complex engineering activities, with an understanding of the
limitations

CLO Marks Marks obtained


Assignment
CLO 5 20
Total (20%) 20
EE114 / BEE1033 ANALOGUE ELECTRONICS 1

Assignment 20%
Simulations (Group)

Simulate the following circuits (part A, B and C) using PSPICE / MULTISIM.


Students need to choose any values of resistors and capacitors for part B and part C.

A. Diode Applications:

1. Example: 4, 8, 10, 11, 13 from chapter 2.


2. Simulate 12 V regulated power supply using full wave rectifier.

B. BJT Biasing

1. Base Bias
2. Voltage Divider Bias
3. Emitter Bias
4. Collector feedback bias

C. BJT Amplifier

1. Common Collector Amplifier


2. Common Emitter Amplifier
3. Common Base Amplifier

D. FETs

1. Self Bias
2. Voltage Divider Bias
3. Explain how the Q point stability of self bias and voltage divider bias are effected
with respect to current and variation in transfer function.

th
Due date for submission of report with (Maximum 20 pages) is 10 August 2021.
Note: Late submission and plagiarism will be awarded zero.

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