White Paper: Characteristics of E-Phemt vs. Hbts For Pa Applications

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Characteristics of E-pHEMT

vs. HBTs for PA Applications

White Paper

Introduction No need for drain switch or negative voltage supply


Many different semiconductor technologies are One of the drawbacks to the conventional depletion-
currently being used for power amplifiers (PAs) that mode pHEMTs, despite the high performance, is the
include a mix of Silicon and GaAs devices—Silicon conduction of current at zero gate bias, or when the
Bipolar, Silicon MOSFET, GaAs MESFET, GaAs HBT, and drain current, Id, reaches a saturated level (Idss) at a
GaAs pHEMT. Avago uses an enhancement-mode gate-source voltage (Vgs) of 0 VDC. However, E-pHEMT
pHEMT (E-pHEMT) process for its PA design while most devices from Avago are true enhancement mode
competitors have developed GaAs HBT technology. This devices and conduct only a small amount of leakage
paper shows why E-pHEMT technology can provide current at zero gate bias, so that Id ≈ 0 at Vgs = 0 VDC.
superior electrical and reliability performance for power Therefore, they can operate without negative voltage
amplifier design in wireless communications. supply or drain switch.
Low quiescent current consumption (Idq) in CDMA Applica-
I. Electrical Performance tions
Low battery leakage current consumption Quiescent current is controlled through a regulated
Historically, leakage current has not been a strength voltage line, with a variable control voltage level of 1.0
of E-mode FET devices. However, Avago’s PAs using ~ 2.7 V Vcntl. Avago CDMA PAs have lower quiescent
E-pHEMT technology have a very low drain-source current consumption using the E-pHEMT process. To
current (Idss) of less than 10 µA at room temperature. maximize talk time, a low-power mode option was
This performance has been achieved through using a incorporated into the PA modules to improve the
buried gate, correct crystal orientation, reducing the quiescent current (Idq) below 30 mA at 1.2 V Vcntl and
second recess depth, and optimizing the InGaAs channel 70 mA at 2.5 V Vcntl compared to 100 mA Iq using the
with a selective etch process. GaAs HBT process.

Vds
GATE

SOURCE DRAIN
Idss

DOPED GaAs
DRAIN UNDOPED GaAs 2nd RECESS DEPTH

GATE UNDOPED AIGaAs Ig

Ig DOPED AIGaAs
SOURCE Idss
Is InGaAs
DOPED AIGaAs

Figure 1. The drain-source current (Idss) of an E-pHEMT process


High power added efficiency (PAE) for longer talk time II. Reliability Performance
Power added efficiency (PAE) is a good criterion for No thermal runaway
assessing the amount of talk time per battery charge. In general, bipolar devices cannot perfectly match the
Specifically, PAE is defined as: entire active geometry to design PAs. This can allow for
small areas to become “hotter” than other local areas.
PRFOUT (W) − PRFIN(W) This imbalance in thermal regions can cause thermal
PAE =
PDC (W) runaway. Thus, the GaAs HBT devices need to add
ballast resistors to equalize this imbalance. These ballast
There are a couple of key reasons why Avago’s E-pHEMT resistors result in lower gain and output power.
PAs have excellent PAE when operated in both linear
modes (CDMA) and in saturated modes (GSM). First The inherent increase in RDSon of hotter areas in
of all, the low RDSon provides high drain efficien- E-pHEMT devices provides intrinsic ballasting. E-pHEMT
cy while high gain reduces the input drive require- devices do not require ballast resistors to eliminate
ment. Secondly, high ft and fmax allow for very fast thermal runaway and thus do not sacrifice Pout or PAE
switching to reduce power dissipation in the device. performance.
When operated in linear mode, PAE is typically 8.5% at No Secondary Breakdown Mechanism
medium Pout (16 dBm) and over 40% at maximum Pout There is a secondary breakdown mechanism in HBT
(28.5 dBm) in comparison to 7% and 32% of GaAs HBT devices. The imbalance and hotspotting due to
PAs at the same conditions. As a saturated amplifier, localized breakdown effects can cause excessive heat
E-pHEMT has demonstrated industry leading PAE levels. that can fuse the electrodes of HBT devices. Therefore,
Efficiency performance of 60% in the EGSM band and HBT devices require the addition of a clamp on the
57% in the DCS/PCS bands is realizable in production. collector to limit peak output voltage such as zener
Low Voltage Operation diodes. This extra circuitry can add some loss and
Power amplifiers typically require a bias buffer to generate spurious signals when clipped. This secondary
properly set the bias point. For PAs based on bipolar breakdown does not exist in E-pHEMT devices because
technologies, this results in having two PN junctions, of their intrinsic ballasting effect from increasing RDSon
~1.2 V, in series as part of the circuit. The sum of these versus temperature.
drops limits the amount of available bias network Survivability Under High Mismatch
headroom, especially as the battery voltage drops PAs are often subjected to large variations in output
below 3 V. E-pHEMT devices have very low turn-on impedance, such as 10:1, and must survive. The removal
voltages and therefore do not have the same limitation of the antenna, the presence of large ground planes,
in bias headroom. This gives superior Pout and efficien- and operation in a charger can create large voltage
cy performance at bias levels less than 3 V in compari- variations at the output of the PA. Any device will
son to HBT devices. exhibit a breakdown when subjected to a large enough
potential difference between the output and input
(Drain-to-Gate for FETs and Collector-to-Base for BJTs).
In a bipolar device, the increased potential difference
causes the base to get very thin, resulting in extremely
high beta values. Consequently, any injection of current
in the high potential state causes a “punch-through”
breakdown to the emitter.
Conversely, with the same high potential difference
in a FET, the source is shut off completely and there is
no breakdown path from the drain to the source. The
level for the breakdown in a FET is determined by the
potential from the drain to the gate, BVGD. The BVGD
of a FET device is much higher than the potential differ-
ence that causes a collector to emitter “punch through”
in a bipolar device. The higher breakdown level in the
FET results in more robust performance.

2
Comparison between E-pHEMT technology and GaAs HBT
Table 1. Summary of E-pHEMT vs. GaAs HBT technologies
E-pHEMT GaAs HBT Primary Performance Impact
Efficiency High Good E-pHEMT - 60%, GaAs HBT - 50% (GSM)
High Gm upon turn-on Yes No Class-B and high effiency operation(low power PAE)

Gain dependence Constant Proportional to Ic Large variation of gain vs. Icc for HBTs Constant gain vs. Idd
on bias current for E-pHEMT
Gm vs. Bias Linear Non-linear Linearity for digital modulation
Low supply voltage PAE Excellent Fair Headroom constraint for design using next generation
battery technology
Thermal runaway No Yes Ballasting and thermal design, performance tradeoff and
limitation
Survivability Under Limited by Degraded by high E-pHEMT very robust vs. mismatch load
High Mismatch BVGD beta

For product information and a complete list of distributors, please go to our web site: www.avagotech.com

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. Obsoletes 5988-8574EN
AV02-2025EN - March 26, 2010

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