6/10/2017 souliss/SpeakEasy.

h at friariello · souliss/souliss · GitHub

souliss / souliss

Branch: friariello souliss / base / SpeakEasy.h Find file Copy path

ribico changing T52 from proportional deadband to absolute value. 8d5b77c on 11 Feb

5 contributors

453 lines (376 sloc) 23 KB

1 /**************************************************************************
2 Souliss
3 Copyright (C) 2013 Veseo
4
5 This program is free software: you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation, either version 3 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program. If not, see <http://www.gnu.org/licenses/>.
17
18 Originally developed by Dario Di Maio
19
20 ***************************************************************************/
21 /*!
22 \file
23 \ingroup
24 */
25 #ifndef SPEAKEASY_H
26 #define SPEAKEASY_H
27
28 #include "Typicals.h"
29
30 U8 memory_map[MaCaco_MEMMAP]; // define the shared memory map
31 U8 data_changed = 1; // flag
32
33 /************** Scheduler ******************/
34 #define time_base_fast 10 // Time cycle in milliseconds
35 #define time_base_slow 10000 // Time cycle in milliseconds
36 #define num_phases 1000 // Number of phases
37
38 U16 phase_speedy=0, phase_fast=0, phase_slow=0;
39 unsigned long tmr_fast=0, tmr_slow=0;
40
41
42 #define EXECUTEFAST() if((millis()-tmr_fast) > time_base_fast )
43 #define UPDATEFAST() tmr_fast = millis(); \
44 phase_fast = (phase_fast + 1) % num_phases
45
46
47 #define FAST_x10ms(n) if (!(phase_fast % n))
48 #define FAST_10ms() if (!(phase_fast % 1))
49 #define FAST_30ms() if (!(phase_fast % 3))
50 #define FAST_50ms() if (!(phase_fast % 5))
51 #define FAST_70ms() if (!(phase_fast % 7))
52 #define FAST_90ms() if (!(phase_fast % 9))
53 #define FAST_110ms() if (!(phase_fast % 11))
54 #define FAST_210ms() if (!(phase_fast % 21))
55 #define FAST_510ms() if (!(phase_fast % 51))
56 #define FAST_710ms() if (!(phase_fast % 71))
57 #define FAST_910ms() if (!(phase_fast % 91))
58 #define FAST_1110ms() if (!(phase_fast % 111))
59 #define FAST_2110ms() if (!(phase_fast % 211))
60 #define FAST_7110ms() if (!(phase_fast % 711))
61 #define FAST_9110ms() if (!(phase_fast % 911))

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62 #define FAST_11110ms() if (!(phase_fast % 1111))
63 #define FAST_21110ms() if (!(phase_fast % 2111))
64 #define FAST_71110ms() if (!(phase_fast % 7111))
65 #define FAST_91110ms() if (!(phase_fast % 9111))
66
67 #define SHIFT_10ms(n) if ((phase_fast % 1)==n)
68 #define SHIFT_30ms(n) if ((phase_fast % 3)==n)
69 #define SHIFT_50ms(n) if ((phase_fast % 5)==n)
70 #define SHIFT_70ms(n) if ((phase_fast % 7)==n)
71 #define SHIFT_90ms(n) if ((phase_fast % 9)==n)
72 #define SHIFT_110ms(n) if ((phase_fast % 11)==n)
73 #define SHIFT_210ms(n) if ((phase_fast % 21)==n)
74 #define SHIFT_510ms(n) if ((phase_fast % 51)==n)
75 #define SHIFT_710ms(n) if ((phase_fast % 71)==n)
76 #define SHIFT_910ms(n) if ((phase_fast % 91)==n)
77 #define SHIFT_1110ms(n) if ((phase_fast % 111)==n)
78 #define SHIFT_2110ms(n) if ((phase_fast % 211)==n)
79 #define SHIFT_7110ms(n) if ((phase_fast % 711)==n)
80 #define SHIFT_9110ms(n) if ((phase_fast % 911)==n)
81 #define SHIFT_11110ms(n) if ((phase_fast % 1111)==n)
82 #define SHIFT_21110ms(n) if ((phase_fast % 2111)==n)
83 #define SHIFT_71110ms(n) if ((phase_fast % 7111)==n)
84 #define SHIFT_91110ms(n) if ((phase_fast % 9111)==n)
85
86 #define EXECUTESLOW() else if((millis()-tmr_slow) > time_base_slow )
87 #define UPDATESLOW() tmr_slow = millis(); \
88 phase_slow = (phase_slow + 1) % num_phases
89
90 #define SLOW_x10s(n) if (!(phase_slow % n))
91 #define SLOW_10s() if (!(phase_slow % 1))
92 #define SLOW_50s() if (!(phase_slow % 5))
93 #define SLOW_70s() if (!(phase_slow % 7))
94 #define SLOW_90s() if (!(phase_slow % 9))
95 #define SLOW_110s() if (!(phase_slow % 11))
96 #define SLOW_510s() if (!(phase_slow % 51))
97 #define SLOW_710s() if (!(phase_slow % 71))
98 #define SLOW_15m() if (!(phase_slow % 91))
99 #define SLOW_30m() if (!(phase_slow % 181))
100 #define SLOW_1h() if (!(phase_slow % 361))
101 #define SLOW_2h() if (!(phase_slow % 721))
102 #define SLOW_4h() if (!(phase_slow % 1441))
103 #define SLOW_halfday() if (!(phase_slow % 4321))
104 #define SLOW_1day() if (!(phase_slow % 8641))
105
106 #define EXECUTESPEEDY() else
107 #define UPDATESPEEDY() phase_speedy = (phase_speedy + 1) % num_phases
108 #define SPEEDY_x(n) if (!(phase_speedy % n))
109
110
111 /***************************************/
112
113 /************** Typicals ******************/
114 #define Set_SimpleLight(slot) Souliss_SetT11(memory_map, slot)
115 #define Logic_SimpleLight(slot) Souliss_Logic_T11(memory_map, slot, &data_changed)
116 #define Timer_SimpleLight(slot) Souliss_T11_Timer(memory_map, slot)
117 #define Set_T11(slot) Souliss_SetT11(memory_map, slot)
118 #define Logic_T11(slot) Souliss_Logic_T11(memory_map, slot, &data_changed)
119 #define Timer_T11(slot) Souliss_T11_Timer(memory_map, slot)
120 #define Set_LightsGroup(firstSlot, lastSlot) Souliss_SetT11Group(memory_map, firstSlot, lastSlot)
121 #define Timer_LightsGroup(firstSlot, lastSlot) Souliss_T11Group_Timer(memory_map, firstSlot, lastSlot)
122 #define Logic_LightsGroup(firstSlot, lastSlot) Souliss_Logic_T11Group(memory_map, firstSlot, lastSlot, &data_changed)
123
124 #define Set_AutoLight(slot) Souliss_SetT12(memory_map, slot)
125 #define Logic_AutoLight(slot) Souliss_Logic_T12(memory_map, slot, &data_changed)
126 #define Timer_AutoLight(slot) Souliss_T12_Timer(memory_map, slot)
127 #define Set_T12(slot) Souliss_SetT12(memory_map, slot)
128 #define Logic_T12(slot) Souliss_Logic_T12(memory_map, slot, &data_changed)
129 #define Timer_T12(slot) Souliss_T12_Timer(memory_map, slot)
130
131 #define Set_DigitalInput(slot) Souliss_SetT13(memory_map, slot)
132 #define Logic_DigitalInput(slot) Souliss_Logic_T13(memory_map, slot, &data_changed)
133 #define Set_T13(slot) Souliss_SetT13(memory_map, slot)
134 #define Logic_T13(slot) Souliss_Logic_T13(memory_map, slot, &data_changed)
135

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136 #define Set_PulseOutput(slot) Souliss_SetT14(memory_map, slot)
137 #define Logic_PulseOutput(slot) Souliss_Logic_T14(memory_map, slot, &data_changed)
138 #define Set_T14(slot) Souliss_SetT14(memory_map, slot)
139 #define Logic_T14(slot) Souliss_Logic_T14(memory_map, slot, &data_changed)
140
141 #define Set_IrDA_Lamp(slot) Souliss_SetT15(memory_map, slot)
142 #define Logic_IrDA_Lamp(slot) Souliss_Logic_T15(memory_map, slot, &data_changed)
143 #define Set_T15(slot) Souliss_SetT15(memory_map, slot)
144 #define Logic_T15(slot) Souliss_Logic_T15(memory_map, slot, &data_changed)
145
146 #define Set_LED_Strip(slot) Souliss_SetT16(memory_map, slot)
147 #define Logic_LED_Strip(slot) Souliss_Logic_T16(memory_map, slot, &data_changed)
148 #define Timer_LED_Strip(slot) Souliss_T16_Timer(memory_map, slot)
149 #define Set_T16(slot) Souliss_SetT16(memory_map, slot)
150 #define Logic_T16(slot) Souliss_Logic_T16(memory_map, slot, &data_changed)
151 #define Timer_T16(slot) Souliss_T16_Timer(memory_map, slot)
152
153 #define Set_StepRelay(slot) Souliss_SetT18(memory_map, slot)
154 #define Logic_StepRelay(slot) Souliss_Logic_T18(memory_map, slot, &data_changed)
155 #define Timer_StepRelay(slot) Souliss_T18_Timer(memory_map, slot)
156 #define Set_T18(slot) Souliss_SetT18(memory_map, slot)
157 #define Logic_T18(slot) Souliss_Logic_T18(memory_map, slot, &data_changed)
158 #define Timer_T18(slot) Souliss_T18_Timer(memory_map, slot)
159
160 #define Set_DimmableLight(slot) Souliss_SetT19(memory_map, slot)
161 #define Logic_DimmableLight(slot) Souliss_Logic_T19(memory_map, slot, &data_changed)
162 #define Timer_DimmableLight(slot) Souliss_T19_Timer(memory_map, slot)
163 #define Set_T19(slot) Souliss_SetT19(memory_map, slot)
164 #define Logic_T19(slot) Souliss_Logic_T19(memory_map, slot, &data_changed)
165 #define Timer_T19(slot) Souliss_T19_Timer(memory_map, slot)
166
167 #define Set_GarageDoor(slot) Souliss_SetT21(memory_map, slot)
168 #define Logic_GarageDoor(slot) Souliss_Logic_T21(memory_map, slot, &data_changed)
169 #define Timer_GarageDoor(slot) Souliss_T21_Timer(memory_map, slot)
170 #define Set_T21(slot) Souliss_SetT21(memory_map, slot)
171 #define Logic_T21(slot) Souliss_Logic_T21(memory_map, slot, &data_changed)
172 #define Timer_T21(slot) Souliss_T21_Timer(memory_map, slot)
173
174 #define Set_Windows(slot) Souliss_SetT22(memory_map, slot)
175 #define Logic_Windows(slot) Souliss_Logic_T22(memory_map, slot, &data_changed)
176 #define Timer_Windows(slot) Souliss_T22_Timer(memory_map, slot)
177 #define Set_T22(slot) Souliss_SetT22(memory_map, slot)
178 #define Logic_T22(slot) Souliss_Logic_T22(memory_map, slot, &data_changed)
179 #define Timer_T22(slot) Souliss_T22_Timer(memory_map, slot)
180
181 #define Set_Thermostat(slot) Souliss_SetT31(memory_map, slot)
182 #define Logic_Thermostat(slot) Souliss_Logic_T31(memory_map, slot, &data_changed)
183 #define Set_T31(slot) Souliss_SetT31(memory_map, slot)
184 #define Logic_T31(slot) Souliss_Logic_T31(memory_map, slot, &data_changed)
185
186 #define Set_IrDA_Aircon(slot) Souliss_SetT32(memory_map, slot)
187 #define Logic_IrDA_Aircon(slot) Souliss_Logic_T32(memory_map, slot, &data_changed)
188 #define Set_T32(slot) Souliss_SetT32(memory_map, slot)
189 #define Logic_T32(slot) Souliss_Logic_T32(memory_map, slot, &data_changed)
190
191 #define Set_Antitheft_Main(slot) Souliss_SetT41(memory_map, slot)
192 #define Logic_Antitheft_Main(slot) Souliss_Logic_T41(memory_map, slot, &data_changed)
193 #define Timer_Antitheft_Main(slot) Souliss_T41_Timer(memory_map, slot)
194 #define Set_T41(slot) Souliss_SetT41(memory_map, slot)
195 #define Logic_T41(slot) Souliss_Logic_T41(memory_map, slot, &data_changed)
196 #define Timer_T41(slot) Souliss_T41_Timer(memory_map, slot)
197
198 #define Set_Antitheft_Peer(slot) Souliss_SetT42(memory_map, slot)
199 #define Logic_Antitheft_Peer(slot, main_antitheft_address) Souliss_Logic_T42(memory_map, slot, &data_changed, main_antitheft_address)
200 #define Set_T42(slot) Souliss_SetT42(memory_map, slot)
201 #define Logic_T42(slot, main_antitheft_address) Souliss_Logic_T42(memory_map, slot, &data_changed, main_antitheft_a
202
203 #define Set_AnalogIn(slot) Souliss_SetT51(memory_map, slot)
204 #define Read_AnalogIn(slot) Souliss_Logic_T51(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
205 #define Set_T51(slot) Souliss_SetT51(memory_map, slot)
206 #define Read_T51(slot) Souliss_Logic_T51(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
207
208 #define Set_Temperature(slot) Souliss_SetT52(memory_map, slot)
209 #define Logic_Temperature(slot) Souliss_Logic_T52(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)

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210 #define Logic_Temperature_FixedDB(slot) Souliss_Logic_T52(memory_map, slot, 0.1, &data_changed)
211 #define Set_T52(slot) Souliss_SetT52(memory_map, slot)
212 #define Logic_T52(slot) Souliss_Logic_T52(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
213
214 #define Set_Humidity(slot) Souliss_SetT53(memory_map, slot)
215 #define Logic_Humidity(slot) Souliss_Logic_T53(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
216 #define Set_T53(slot) Souliss_SetT53(memory_map, slot)
217 #define Logic_T53(slot) Souliss_Logic_T53(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
218
219 #define Set_Light(slot) Souliss_SetT54(memory_map, slot)
220 #define Logic_Light(slot) Souliss_Logic_T54(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
221 #define Set_T54(slot) Souliss_SetT54(memory_map, slot)
222 #define Logic_T54(slot) Souliss_Logic_T54(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
223
224 #define Set_Voltage(slot) Souliss_SetT55(memory_map, slot)
225 #define Logic_Voltage(slot) Souliss_Logic_T55(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
226 #define Set_T55(slot) Souliss_SetT55(memory_map, slot)
227 #define Logic_T55(slot) Souliss_Logic_T55(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
228
229 #define Set_Current(slot) Souliss_SetT56(memory_map, slot)
230 #define Logic_Current(slot) Souliss_Logic_T56(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
231 #define Set_T56(slot) Souliss_SetT56(memory_map, slot)
232 #define Logic_T56(slot) Souliss_Logic_T56(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
233
234 #define Set_Power(slot) Souliss_SetT57(memory_map, slot)
235 #define Logic_Power(slot) Souliss_Logic_T57(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
236 #define Set_T57(slot) Souliss_SetT57(memory_map, slot)
237 #define Logic_T57(slot) Souliss_Logic_T57(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
238
239 #define Set_Pressure(slot) Souliss_SetT58(memory_map, slot)
240 #define Logic_Pressure(slot) Souliss_Logic_T58(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
241 #define Set_T58(slot) Souliss_SetT58(memory_map, slot)
242 #define Logic_T58(slot) Souliss_Logic_T58(memory_map, slot, mOutputAsFloat(slot)*0.015, &data_changed)
243
244 #define Set_Analog_Setpoint(slot) Souliss_SetT61(memory_map, slot)
245 #define Logic_AnalogIn(slot) Souliss_Logic_T61(memory_map, slot, &data_changed)
246 #define Set_T61(slot) Souliss_SetT61(memory_map, slot)
247 #define Logic_T61(slot) Souliss_Logic_T61(memory_map, slot, &data_changed)
248
249 #define Set_Temperature_Setpoint(slot) Souliss_SetT62(memory_map, slot)
250 #define Logic_Temperature_Setpoint(slot) Souliss_Logic_T62(memory_map, slot, &data_changed)
251 #define Set_T62(slot) Souliss_SetT62(memory_map, slot)
252 #define Logic_T62(slot) Souliss_Logic_T62(memory_map, slot, &data_changed)
253
254 #define Set_Humidity_Setpoint(slot) Souliss_SetT63(memory_map, slot)
255 #define Logic_Humidity_Setpoint(slot) Souliss_Logic_T63(memory_map, slot, &data_changed)
256 #define Set_T63(slot) Souliss_SetT63(memory_map, slot)
257 #define Logic_T63(slot) Souliss_Logic_T63(memory_map, slot, &data_changed)
258
259 #define Set_Light_Setpoint(slot) Souliss_SetT64(memory_map, slot)
260 #define Logic_Light_Setpoint(slot) Souliss_Logic_T64(memory_map, slot, &data_changed)
261 #define Set_T64(slot) Souliss_SetT64(memory_map, slot)
262 #define Logic_T64(slot) Souliss_Logic_T64(memory_map, slot, &data_changed)
263
264 #define Set_Voltage_Setpoint(slot) Souliss_SetT65(memory_map, slot)
265 #define Logic_Voltage_Setpoint(slot) Souliss_Logic_T65(memory_map, slot, &data_changed)
266 #define Set_T65(slot) Souliss_SetT65(memory_map, slot)
267 #define Logic_T65(slot) Souliss_Logic_T65(memory_map, slot, &data_changed)
268
269 #define Set_Current_Setpoint(slot) Souliss_SetT66(memory_map, slot)
270 #define Logic_Current_Setpoint(slot) Souliss_Logic_T66(memory_map, slot, &data_changed)
271 #define Set_T66(slot) Souliss_SetT66(memory_map, slot)
272 #define Logic_T66(slot) Souliss_Logic_T66(memory_map, slot, &data_changed)
273
274 #define Set_Power_Setpoint(slot) Souliss_SetT67(memory_map, slot)
275 #define Logic_Power_Setpoint(slot) Souliss_Logic_T67(memory_map, slot, &data_changed)
276 #define Set_T67(slot) Souliss_SetT67(memory_map, slot)
277 #define Logic_T67(slot) Souliss_Logic_T67(memory_map, slot, &data_changed)
278
279 #define Set_Pressure_Setpoint(slot) Souliss_SetT68(memory_map, slot)
280 #define Logic_Pressure_Setpoint(slot) Souliss_Logic_T68(memory_map, slot, &data_changed)
281 #define Set_T68(slot) Souliss_SetT68(memory_map, slot)
282 #define Logic_T68(slot) Souliss_Logic_T68(memory_map, slot, &data_changed)
283

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284 #define Watchdog(chain_address, chain_slot, alarm_command) Souliss_Watchdog(memory_map, chain_address, chain_slot, alarm_command)
285 /******************************************/
286
287 /************** Souliss ******************/
288 #define myMap memory_map
289 #define myData &data_changed
290 #define myNode memory_map, &data_changed
291
292 #define SetAddress Souliss_SetAddress
293 #define SetAddressingServer() Souliss_SetAddressingServer(memory_map)
294 #define SetDynamicAddressing() Souliss_SetDynamicAddressing()
295 #define SetIPAddress Souliss_SetIPAddress
296 #define GetIPAddress Souliss_GetIPAddress
297 #define SetAccessPoint Souliss_SetAccessPoint
298 #define ReadIPConfiguration Souliss_ReadIPConfiguration
299 #define IsRuntimeGateway MaCaco_IsRuntimeGateway
300 #define JoinNetwork() Souliss_JoinNetwork()
301 #define JoinAndReset() Souliss_JoinAndReset()
302 #define SetUserInterface UserMode_ManualRecord
303 #define SetAsGateway(address) Souliss_SetLocalAddress(memory_map, address
304 #define RemoveAsGateway() Souliss_ResetLocalAddress(memory_ma
305 #define GetAsGateway() Souliss_GetLocalAddress(memory_map)
306 #define SetAsPeerNode(address, index) Souliss_SetRemoteAddress(memory_map, address, index
307 #define SetAsBatteryNode(address, index) Souliss_SetRemoteAddress(memory_map, address, index
308 Souliss_Bat
309
310 #define HardcodedChannel Souliss_HardcodedCommunicationChann
311 #define GetTypicals() Souliss_GetTypicals(memory_map)
312 #define CommunicationChannels() Souliss_CommunicationChannels(memory_map)
313 #define ProcessCommunication() Souliss_CommunicationData(memory_map, &data
314 #define DigIn(pin,value,slot) Souliss_DigIn(pin, value, memory_map, slot)
315 #define LowDigIn(pin,value,slot) Souliss_LowDigIn(pin, value, memory_map, sl
316 #define DigIn2State(pin,value_state_on,value_state_off,slot) Souliss_DigIn2State(pin, value_state_on, value_state_off, memory_map, slot)
317 #define LowDigIn2State(pin,value_state_on,value_state_off,slot) Souliss_LowDigIn2State(pin, value_state_on, value_state_off, memory_map, sl
318 #define DigInHold(pin, value_state1,value_state2,slot) Souliss_DigInHold(pin, value_state1, value_state2, memory_map, slot
319 #define LowDigInHold(pin, value_state1,value_state2,slot) Souliss_LowDigInHold(pin, value_state1, value_state2, memory_map, s
320 #define DigKeepHold(pin, value_state1,value_state2,slot) Souliss_DigKeepHold(pin, value_state1, value_state2, memory_map, sl
321 #define LowDigKeepHold(pin, value_state1,value_state2,slot) Souliss_LowDigKeepHold(pin, value_state1, value_state2, memory_map,
322 #define DigOut(pin,value,slot) Souliss_DigOut(pin, value, memory_map, slot
323 #define PulseDigOut(pin,value,slot) Souliss_PulseDigOut(pin, value, memory_map,
324 #define nDigOut(pin,value,slot) Souliss_nDigOut(pin, value, memory_map, slo
325 #define LowDigOut(pin,value,slot) Souliss_LowDigOut(pin, value, memory_map, s
326 #define PulseLowDigOut(pin,value,slot) Souliss_PulseLowDigOut(pin, value, memory_map, slot
327 #define nLowDigOut(pin,value,slot) Souliss_nLowDigOut(pin, value, memory_map,
328 #define DigOutToggle(pin,value,slot) Souliss_DigOutToggle(pin, value, memory_map, slot)
329 #define ImportAnalog(slot,analogvalue) Souliss_ImportAnalog(memory_map, slot, analogvalue)
330 #define AnalogIn(pin, slot, conv, bias) Souliss_AnalogIn(pin, memory_map, slot, conv, bias)
331 #define isTrigged(slot) Souliss_isTrigged(memory_map, slot)
332 #define RemoteInput Souliss_RemoteInput
333 #define RemoteInputs Souliss_RemoteInputs
334 #define Send Souliss_RemoteInput
335 #define SendData Souliss_RemoteInputs
336 #define ResetInput(slot) Souliss_ResetInput(memory_map, slot
337 #define PullData(addr, slot, remote_slot, remote_numbof) Souliss_PullData(addr, slot, remote_slot, remote_numbof)
338 #define RoutingTable vNet_SetRoutingTable
339 #define DonotRouteTable vNet_SetDoNotRoutingTable
340 #define Init_XMLServer() XMLSERVERInit(memory_map)
341 #define Run_XMLServer() XMLSERVERInterface(memory_map)
342 #define Init_Modbus() ModbusInit(memory_map)
343 #define Run_Modbus() Modbus(memory_map)
344 #define Init_HTTPServer() {}
345 #define Run_HTTPServer() HTTPServer(memory_map)
346
347 #define RemoteDigIn Souliss_RemoteDigIn
348 #define RemoteLowDigIn Souliss_RemoteLowDigIn
349 #define RemoteDigIn2State Souliss_RemoteDigIn2State
350 #define RemoteAnalogIn2Buttons Souliss_RemoteAnalogIn2Buttons
351 #define RemoteLowDigIn2State Souliss_RemoteLowDigIn2State
352 #define RemoteDigInHold Souliss_RemoteDigInHold
353 #define RemoteLowDigInHold Souliss_RemoteLowDigInHold
354
355 #define Persistence_IsData(id) Souliss_Persistence_IsData(memory_map, id)
356 #define Persistence_ClearData(id) Souliss_Persistence_ClearData(memory_map, i
357

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6/10/2017 souliss/SpeakEasy.h at friariello · souliss/souliss · GitHub
358 #define LastIn_IsData(id) Souliss_LastIn_IsData(memory_map, i
359 #define LastIn_ClearData(id) Souliss_LastIn_ClearData(memory_map, id)
360 #define LastIn_GetData(id, slot) Souliss_LastIn_GetData(memory_map, id, slot
361 #define LastIn_GetAnalog(id, slot) Souliss_LastIn_GetAnalog(memory_map, id, sl
362
363 /*****************************************/
364
365 /************* Let be lazy ***************/
366 #define FAST_GatewayComms() FAST_30ms() \
367 ProcessCommunication();
368 FAST_1110ms()
369 CommunicationChannels();
370 FAST_2110ms()
371 GetTypicals()
372
373 #define FAST_BridgeComms() FAST_30ms() \
374 ProcessCommunication();
375
376
377 #define FAST_PeerComms() FAST_70ms() \
378 ProcessCommunication();
379
380 #define START_PeerJoin() FAST_71110ms() \
381 {
382 if(!MaCaco_IsSubscribed())
383 {
384 JoinNetwork();
385 }
386 }
387
388 #define JoinInProgress() (!MaCaco_IsSubscribed())
389
390 #define SLOW_PeerJoin() SLOW_510s() { \
391 JoinNetwork();
392 }
393
394 #define GetAddress() Souliss_DynamicAddressing_FirstBoot (memory_map);
395 for(uint8_t n=0;n<VNET_MEDIA_NUMBER;n++) {
396 while(Souliss_DynamicAddressing (me
397 for(U16 i=0; i<1000; i++) {
398 if(Souliss_Communic
399 break;
400 delay(10); }
401 }
402 while(!MaCaco_IsSubscribed()) {
403 Souliss_JoinAndReset();
404 for(U16 i=0; i<1000; i++) {
405 if(Souliss_Communic
406 break;
407 delay(10); }
408 }}
409
410
411
412 #define WaitSubscription() while(!MaCaco_IsSubscribed()) { \
413 ProcessCommunication();
414 delay(100);}
415
416 #define aMinuteToSleep() for(uint8_t s=0; s<255; s++) { \
417 ProcessCommunication();
418 delay(200);}
419
420 /*****************************************/
421
422 /*****************************************/
423 /*!
424 Macros
425 */
426 /*****************************************/
427 #define AUX MaCaco_AUXIN_s
428 #define IN MaCaco_IN_s
429 #define TYP MaCaco_TYP_s
430 #define OUT MaCaco_OUT_s
431 #define mAuxiliary(slot) memory_map[AUX+slot]

https://github.com/souliss/souliss/blob/friariello/base/SpeakEasy.h 6/7
6/10/2017 souliss/SpeakEasy.h at friariello · souliss/souliss · GitHub
432 #define mInput(slot) memory_map[IN+slot]
433 #define mTypical(slot) memory_map[TYP+slot]
434 #define mOutput(slot) memory_map[OUT+slot]
435 #define mOutputAsFloat(slot) Souliss_SinglePrecisionFloating(memory_map+MaCaco_OUT_s+slot)
436
437 #define pTYP MaCaco_P_TYP_s
438 #define pOUT MaCaco_P_OUT_s
439 #define pTypical(node,slot) memory_map[pTYP+slot+(node*MaCaco_SLOT)]
440 #define pOutput(node,slot) memory_map[pOUT+slot+(node*MaCaco_SLOT)]
441 #define pOutputAsFloat(node,slot) Souliss_SinglePrecisionFloating(memory_map+MaCaco_P_OUT_s+slot+(node*MaCaco_SLOT))
442
443 #define SetTrigger() (data_changed=1);
444 #define ResetTrigger() (data_changed=0);
445 #define Initialize() Souliss_Initialize(memory_map)
446 #define isTrigger() data_changed
447
448 #define SetInput(slot, value) mInput(slot) = value
449
450 #define ReqTyp MaCaco_reqtyp
451
452 #endif

https://github.com/souliss/souliss/blob/friariello/base/SpeakEasy.h 7/7