CHAPTER 2 2.

1 Introduction
2.1.1 Microoperations

MICROOPERATION

Simple digital systems are frequently characterized in terms of the registers they contain, and the operations that they perform on the data in the registers. The operations on the data in registers are called microoperations. Shift, Load, Clear, Increment etc are the microopetations. It can also be defined as an elementary operation performed (during one clock pulse), on the information stored in one or more registers

2.1.2 Internal Organization of a computer

The (internal) organization of a computer can be defined according to the following: 1. Set of registers and their functions 2. Microoperations set Set of allowable microoperations provided by the organization of the computer 3. Control signals that initiate the sequence of microoperations (to perform the functions) Viewing a computer, or any digital system, in this way is called the register transfer level. This is because were focusing on The systems registers

The data transformations in them, and The data transfers between them.

2.1.3 Register transfer language:

Rather than specifying a digital system in words, a specific notation is used, register transfer language. For any function of the computer, the register transfer language can be used to describe the (sequence of) microoperations Register transfer language is a symbolic language. It is a convenient tool for describing the internal organization of digital computers and it can also be used to facilitate the design process of digital systems.

2.1.4 Designation of Registers

Registers are designated by capital letters, sometimes followed by numbers (e.g., A, R13, IR) Often the names indicate function: MAR- memory address register

PC IR

- program counter - instruction register

2.2 Types of Microoperations

Computer system microoperations are of four types: Register transfer microoperations Arithmetic microoperations Logic microoperations Shift microoperations

2.2.1 Register Transfer

Copying the contents of one register to another is a register transfer. A register transfer is indicated as R2 R1 In this case the contents of register R2 are copied (loaded) into register R1. There is Simultaneous transfers of all bits from the source R1 to the destination register R2, during one clock pulse. Note that this is a non-destructive; i.e. the contents of R1 are not altered by copying (loading) them to R2

2.2.2 Control Functions

Often actions need to only occur if a certain condition is true. This is similar to an if statement in a programming language. In digital systems, this is often done via a control signal, called a control function. If the signal is 1, the action takes place This is represented as: P: R2 R1 Which means if P = 1, then load the contents of register R1 into register R2 i.e., if (P = 1) then (R2 R1)

2.2.3 Hardware Implementation of Controlled Transfers

Implementation of controlled transfer P: R2 R1 Block diagram

Control Circuit

Load

R2 n R1

Clock

Timing diagram

t Clock Load Transfer occurs here

t+1

The same clock controls the circuits that generate the control function and the destination register. And Registers are assumed to use positive-edge-triggered flip-flops If two or more operations are to occur simultaneously, they are separated with commas P: R3 R5, MAR IR Here, if the control function P = 1, load the contents of R5 into R3, and at the same time (clock), load the contents of register IR into register MAR

2.2.4 CONNECTING REGISTRS

In a digital system with many registers, it is impractical to have data and control lines to directly allow each register to be loaded with the contents of every possible other registers. This is not a realistic approach to use in a large digital system. Instead we can take a different approach with one centralized set of circuits for data transfer the bus. A control circuits is designed to select which register is the source, and which is the destination. Bus is a path (of a group of wires) over which information is transferred, from any of several sources to any of several destinations

Here is an example of a bus system for four registers.

Register A 1 2 3 4 B1 C1 D 1 0 4 x1 MUX X Select Y

Register B 1 2 3 4 B2 C2 D 2 0 4 x1 MUX

Register C 1 2 3 4 B3 C3 D 3 0 4 x1 MUX

Register D 1 2 3 4 B4 C4 D 4 0 4 x1 MUX

4-line bus The selection of the source register is determined by the select input. When XY=00, the 0 data inputs of all four multiplexers are selected and applied to the outputs that form the bus. This causes the bus lines to receive the content of register A since the outputs of this register are connected to the 0 data inputs of the multiplexers. Similarly, register B is selected if XY=01, and so on as the table below suggests. Select (x) 0 0 1 1 Select (y) 0 1 0 1 Register selected A B C D

In general, a bus system will multiplex k registers of n bits each to product an n- line common bus. The number of multiplexers needed to construct the bus is equal to n, the number of bits in each registers. The size of each multiplexer must be k * 1 since it multiplexes k data lines. For example, a common bus for eight registers of 16 bits each requires 16 multiplexers, one for each line in the bus. Each multiplexer must have eight data input lines and three selection lines to multiplex one significant bit in the eight registers.

2.3 ARITHMETIC MICROOPERATIONS

This type of microoperations performs the arithmetic operations on the contents of the register. The basic arithmetic microoperations are Addition

Subtraction

Increment

Decrement The additional arithmetic microoperations are Add with carry Subtract with borrow Transfer/Load etc.

Summary of Typical Arithmetic Micro-Operations R3 R3 R2 R2 R3 R1 R1 R1 + R2 Contents of R1 plus R2 transferred to R3 R1 - R2 Contents of R1 minus R2 transferred to R3 R2 complement the contents of R2 R2+ 1 2's complement the contents of R2 (negate) R1 + R2+ 1 subtraction R1 + 1 Increment R1 1 Decrement

2.3.1 Hardware implementation:

2.3.1.1 Binary Adder-Subtractor
B 3 A 3 B 2 A 2 B 1 A 1 B 0 A 0

F A

C 3

F A

C 2

F A

C 1

F A

C 0

C 4

S 3

S 2

S 1

S 0

When M=0 the circuit is an adder and when M=1 the circuit is becomes a subtractor. Each exclusiveOR gate receives input M and one of the inputs of B. When M=0, we have B 0 =B. The full adders receive the value of B, the input carry is 0, and the circuit performs A plus B. When M=1, we have B 1 = B and C0 =1. The B inputs are all complemented and a 1 is added through the input carry. The circuit performs the operation A plus the 2s complement of B which is the subtraction. 2.3.1.2 Binary Incrementer
A 3 A 2 A 1 A 0 1

H A
C S

H A
C S

H A
C S

H A
C S

C 4

S 3

S 2

S 1

S 0

The diagram of a 4- bit combinational circuit incrementer is shown in the figure above. One of the inputs to the least significant half- adder is connected to logic- 1 and the other input is connected to the least significant bit of the number to be incremented. The output carry from one half- adder is connected to one of the inputs of the next-higher-order half-adder. The circuit receives the four bits from A0 through A3, adds one to it, and generated the incremented output in S0 through S3. The output carry c4 will be 1 only after incrementing binary 111. This also causes outputs S0 through S3 to go to 0.

2.3.2 ARITHMETIC CIRCUIT

Cin
S1 S0 A0 B0 A1 B1 A2 B2 A3 B3 0 1 S1 S0 0 1 4x1 2 3 MUX S1 S0 0 1 4x1 2 3 MUX S1 S0 0 1 4x1 2 3 MUX S1 S0 0 1 4x1 2 3 MUX X0 Y0 X1 Y1 X2 C0

FA

D0

C1 C1

FA

D1

C2 C2

FA
Y2 X3

C3

D2

C3

FA
Y3

D3

C4 Cout

The output of the binary adder is calculated from the following arithmetic sum: D=A+Y+Cin Where A is the 4- bit binary number at the X inputs and Y is the 4-bit binary number at the Y inputs of the binary adder. Cin is the input carry, which can be equal to 0 or 1. By controlling the value of Y with the two selection inputs S1 and S0 and making Cin equal to 0 or 1, it is possible to generate the eight arithmetic microoperations as listed below. S1 0 0 0 0 1 1 1 1 S0 0 0 1 1 0 0 1 1 Cin 0 1 0 1 0 1 0 1 Y B B B B 0 0 1 1 Output D=A+B D=A+B+1 D = A + B D = A + B+ 1 D=A D=A+1 D=A-1 D=A Microoperation Add Add with carry Subtract with borrow Subtract Transfer A Increment A Decrement A Transfer A

2.4 LOGIC MICROOPERATIONS

Logic microopetaion specify binary operations on the strings of bits in registers

Logic microoperations are bit-wise operations, i.e., they work on the individual bits of data. They are useful for bit manipulations on binary data and are useful for making logical decisions based on the bit value The, most systems only implement four of these AND ( OR ( XOR (), Complement/NOT ), ),

2.4.1 Hardware Implementation of the Logic Microoperations

Ai Bi 0 1 2 3 S1 S0 Function table S1 S0 0 0 1 1 0 1 0 1 Output F = A B F=A B F=AB F = A -operation AND OR XOR Complement 4X1 MUX

Fi

Select

2.4.2
Logic microoperations can be used to manipulate individual bits or portions of a word in a register Consider the data in a register A. In another register, B, is bit data that will be used to modify the contents of A

Selective-set

A A + B

Selective-complement Selective-clear Mask (Delete) Clear Insert Compare

A A B A A B

A A B A A B A (A B) + C A A B

SELECTIVE SET In a selective set operation, the bit pattern in B is used to set certain bits in A 1 1 0 0 At 1010B 1 1 1 0 At+1 (A A + B) If a bit in B is set to 1, that same position in A gets set to 1, otherwise that bit in A keeps its previous value SELECTIVE COMPLEMENT In a selective complement operation, the bit pattern in B is used to complement certain bits in A 1 1 0 0 At 1010B 0 1 1 0 At+1 (A A B) If a bit in B is set to 1, that same position in A gets complemented from its original value, otherwise it is unchanged

SELECTIVE CLEAR In a selective clear operation, the bit pattern in B is used to clear certain bits in A 1 1 0 0 At 1010B 0 1 0 0 At+1 (A A B) If a bit in B is set to 1, that same position in A gets set to 0, otherwise it is unchanged MASK OPERATION In a mask operation, the bit pattern in B is used to clear certain bits in A 1 1 0 0 At 1010B 1 0 0 0 At+1

(A A B)

If a bit in B is set to 0, that same position in A gets set to 0, otherwise it is unchanged CLEAR OPERATION In a clear operation, if the bits in the same position in A and B are the same, they are cleared in A, otherwise they are set in A 1 1 0 0 At 1010B 0 1 1 0 At+1

(A A B)

INSERT OPERATION An insert operation is used to introduce a specific bit pattern into A register, leaving the other bit positions unchanged This is done as - A mask operation to clear the desired bit positions, followed by - An OR operation to introduce the new bits into the desired positions Example Suppose you wanted to introduce 1010 into the low order four bits of A: 11011000 1011 0001 A (Original) 1101 1000 1011 1010 A (Desired) 1101 1000 1011 0001 1111 1111 1111 0000 1101 1000 1011 0000 0000 0000 0000 1010 1101 1000 1011 1010 A (Original) Mask A (Intermediate) Added bits A (Desired)

2.5 SHIFT MICROOPERATIONS

Shift microopetations are used for serial transfer of data. The content of register can be shifted to the right or to the left. During a right shift operation the serial input transfers a bit into the leftmost position.

Serial Input
A right shift operation During left shift operation the serial input transfers a bit into the rightmost position.

Serial Input
A left shift operation

There are three types of shifts Logical shift Circular shift Arithmetic shift

2.5.1 LOGICAL SHIFT

In a logical shift the serial input to the shift is a 0. In right logical shift operation 0 is applied to the leftmost bit.

0
A right logical shift operation: In left logical shift operation 0 is applied to the rightmost bit.

A left logical shift operation

In a Register Transfer Language, the following notation is used shl for a logical shift left

shr

for a logical shift right

Examples: R2 shr R2 R3 shl R3

2.5.2 CIRCULAR SHIFT

In a circular shift the serial input is the bit that is shifted out of the other end of the register. A right circular shift operation:

A left circular shift operation:

In a Register transfer language the following notation is used

shift left

cil

for a circular

shift right

cir for a circular Examples: R2 cir R2 R3 cil R3

2.5.3 ARITHMETIC SHIFT

An arithmetic shift is meant for signed binary numbers (integer). An arithmetic left shift multiplies a signed number by two and an arithmetic right shift divides a signed number by two. The main distinction of an arithmetic shift is that it must keep the sign of the number the same as it performs the multiplication or division.

shift operation:
sign bit

A right arithmetic

The arithmetic shift right operation leaves the sign bit unchanged and shifts the number (including the sign bit) to the right. The right most bit is lost.

shift operation:
sign bit

A left arithmetic

The arithmetic shift operation inserts a 0 into the rightmost bit, and shifts all other bits to the left. A sigh reversal occurs if the leftmost bit is changed after the shift. This happens if the multiplication by 2 causes an overflow. A left arithmetic shift operation must be checked for the overflow

0
sign bit

Before the shift, if the leftmost two bits differ, the shift will result in an overflow If V=0 there is no overflow. If V=1 there is overflow. In a RTL, the following notation is used

ashl ashr

for an arithmetic shift left for an arithmetic shift right

Examples: R2 ashr R2, R3 ashl R3

2.5.4 HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS

Serial input (IR) Select 0 for shift right (down) 1 for shift left (up)

S 0 1 A0 A1 A2 A3 S 0 1 S 0 1 S 0 1 Serial input (IL) MUX MUX MUX MUX

H 0

H1

H2

H3

Select S 0 1

H0 IR A1

H1 A0

H2 A1

H3 A2 IL

A2 A3 The function table

When S=0, the input data are shifted right. When S=1, the input data are shifted left.

2.5.5 ARITHMETIC LOGIC SHIFT UNIT

S3 S2 S1 S0 Ci Di Select 0 1 2 3 Ei

Arithmetic Circuit
C i+1

4x1 MUX

Fi

Bi Ai A Ai-1 i+1

Logic Circuit

shr shl

S3 S2 0 0 0 0 0 0 borrow 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 1 1

S1 S0 0 0 0 0 0 1 1 1 1 0 0 1 1 X X 1 0 0 1 1 0 1 0 1 X X

Cin 0 0 1 1 0 1 0 1 X X X X X X

Operation Function F=A+B ADD 1 F = A + B + 1 ADD with Carry 0 F = A + B Subtract with F = A + B + 1 Subtraction F=A Transfer A F=A+1 Increment A F=A-1 Decrement A F=A Transfer A F = A B AND F = A B OR F=A B XOR F = A Complement A F = shr A Shift right A into F F = shl A Shift left A into F

When S3S2 = 00 then arithmetic operations are selected. When S3S2 = 01 then logical operations are selected. When S3S2 = 10 and 11 then shift right and shift left operations are selected accordingly.