SDFS011A − MARCH 1987 − REVISED OCTOBER 1993

• Eight Latches in a Single Package SN54F573 . . . J PACKAGE

• 3-State Bus-Driving True Outputs

SN74F573 . . . DW OR N PACKAGE
(TOP VIEW)
• Full Parallel Access for Loading
• Buffered Control Inputs OE 1 20 VCC
• Package Options Include Plastic 1D 2 19 1Q
2D 3 18 2Q
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic 3D 4 17 3Q
300-mil DIPs 4D 5 16 4Q
5D 6 15 5Q
description 6D 7 14 6Q
7D 8 13 7Q
These 8-bit latches feature 3-state outputs 8D 9 12 8Q
designed specifically for driving highly capacitive GND 10 11 LE
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and SN54F573 . . . FK PACKAGE
(TOP VIEW)
working registers.

VCC
OE

1Q
2D
1D
The eight latches of the ′F573 are transparent
D-type latches. While the latch enable (LE) input
3 2 1 20 19
is high, the Q outputs follow the data (D) inputs. 3D 4 18 2Q
When the latch enable is taken low, the Q outputs 4D 5 17 3Q
are latched at the logic levels set up at the D 5D 6 16 4Q
inputs. 6D 7 15 5Q
A buffered output enable (OE) input can be used 7D 8 14 6Q
9 10 11 12 13
to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-

LE
8D
GND

8Q
7Q
impedance state. In the high-impedance state, the
outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
The output enable (OE) input does not affect the internal operations of the latches. Old data can be retained
or new data can be entered while the outputs are in the high-impedance state.
The SN54F573 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74F573 is characterized for operation from 0°C to 70°C.

FUNCTION TABLE
(each latch)
INPUTS OUTPUT
OE LE D Q
L H H H
L H L L
L L X Q0
H X X Z



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SDFS011A − MARCH 1987 − REVISED OCTOBER 1993

logic symbol† logic diagram (positive logic)

1 1
OE EN OE
11
LE C1
11
LE
2 19
1D 1D 1Q
3 18 C1
2D 2Q 19
4 17 2 1Q
3D 3Q 1D 1D
5 16
4D 4Q
6 15
5D 5Q
7 14
6D 6Q
8 13
7D 7Q
9 12 To Seven Other Channels
8D 8Q

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1.2 V to 7 V
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC
Current into any output in the low state: SN54F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
SN74F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
Operating free-air temperature range: SN54F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
SN74F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F573 SN74F573
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
IIK Input clamp current −18 −18 mA
IOH High-level output current −3 −3 mA
IOL Low-level output current 20 24 mA
TA Operating free-air temperature −55 125 0 70 °C

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SDFS011A − MARCH 1987 − REVISED OCTOBER 1993

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)
SN54F573 SN74F573
PARAMETER TEST CONDITIONS UNIT
MIN TYP† MAX MIN TYP† MAX
VIK VCC = 4.5 V, II = − 18 mA −1.2 −1.2 V
IOH = − 1 mA 2.5 3.4 2.5 3.4
VCC = 4.5 V
VOH IOH = − 3 mA 2.4 3.3 2.4 3.3 V
VCC = 4.75 V, IOH = − 1 mA to − 3 mA 2.7
IOL = 20 mA 0.3 0.5
VOL VCC = 4.5 V V
IOL = 24 mA 0.35 0.5
IOZH VCC = 5.5 V, VO = 2.7 V 50 50 µA
IOZL VCC = 5.5 V, VO = 0.5 V −50 −50 µA
II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 µA
IIL VCC = 5.5 V, VI = 0.5 V − 0.6 − 0.6 mA
IOS‡ VCC = 5.5 V, VO = 0 −60 −150 −60 −150 mA
ICCZ VCC = 5.5 V, See Note 2 38 55 38 55 mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 2: ICCZ is measured with OE at 4.5 V and all other inputs grounded.

timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C SN54F573 SN74F573
UNIT
′F573
MIN MAX MIN MAX MIN MAX
tw Pulse duration, LE high 6 6 6 ns
tsu Setup time, data before LE↓ 2 2 2 ns
th Hold time, data after LE↓ 3 3 3 ns

switching characteristics (see Note 3)

VCC = 5 V, VCC = 4.5 V to 5.5 V,
CL = 50 pF, CL = 50 pF,
RL = 500 Ω, RL = 500 Ω,
FROM TO
PARAMETER TA = 25°C TA = MIN to MAX§ UNIT
(INPUT) (OUTPUT)
′F573 SN54F573 SN74F573
MIN TYP MAX MIN MAX MIN MAX
tPLH 2 4.9 7 1.5 9 2.2 8
D Q ns
tPHL 1.2 3.3 5 1 8 1.2 6
tPLH 4.2 8.6 11.5 3.7 13.5 4.2 13
LE Q ns
tPHL 2.2 4.8 7 1.5 9 2.2 8
tPZH 1.2 4.6 11 1 13 1.2 12
OE Q ns
tPZL 1.2 5.2 7.5 1 10 1.2 8.5
tPHZ 1.2 4.1 6.5 1 8.5 1.2 7.5
OE Q ns
tPLZ 1.2 3.4 6 1 7 1.2 6
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 3: Load circuits and waveforms are shown in Section 1.

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SDFS011A − MARCH 1987 − REVISED OCTOBER 1993

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