ML51

1T 8051
8-bit Microcontroller

NuMicro® Family
ML51 Series
Product Brief

ML51 SERIES PRODUCT BRIEF

The information described in this document is the exclusive intellectual property of
Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.

Nuvoton is providing this document only for reference purposes of NuMicro microcontroller based
system design. Nuvoton assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.

For additional information or questions, please contact: Nuvoton Technology Corporation.

www.nuvoton.com

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1 GENERAL DESCRIPTION
®
The NuMicro ML51 series is Flash embedded 1T 8051-based microcontroller. The instruction set of
the ML51 is fully compatible with the standard 80C51 with performance enhanced.
The ML51 series runs up to 24 MHz at a wide voltage range from 1.8V to 5.5V, and contains up to
64/32/16 Kbytes Flash called APROM for programming code. The ML51 Flash supports In-
Application-Programming (IAP) function, which enables on-chip firmware updates. Partial Flash can
be optionally configured as Data Flash programmed by IAP and read by IAP or MOVC instruction. The
ML51 includes an additional configurable up to 4/3/2/1 Kbytes Flash area called LDROM, in which the
Boot Code normally resides for carrying out the In-System-Programming (ISP).
The ML51 provides rich peripherals including 256 bytes of SRAM, 4/2/1 Kbytes of auxiliary RAM
(XRAM), up to 43 general purpose I/O, two 16-bit Timers/Counters 0/1, one 16-bit Timer2 with three-
channel input capture module, one Watchdog Timer (WDT), one Self Wake-up Timer (WKT), one 16-
bit auto-reload Timer3 for general purpose or baud rate generator, two UARTs with frame error
2
detection and automatic address recognition, two ISO7816 Smartcard interface, two SPI, two I C, 12
enhanced PWM output channels with dead zone control, two analog comparators, eight-channel
shared pin interrupt for all I/O ports, and one 12-bit ADC at 500 ksps. There are a total of 30 sources
with 4-level-priority interrupts capability.
The ML51 is equipped with four clock sources and supports on-the-fly clock switching via software
control. The four clock sources include two sets of external crystal inputs (HXT, LXT), 38.4 kHz
internal oscillator, and one 24 MHz internal high-precision ±2% oscillator. The ML51 provides
additional power monitoring detection such as power-on reset and 7-level brown-out detection, which
stabilizes the power-on/off sequence for a high reliability system design.
The ML51 series provides 3 power modes to reduce power consumption －Low power run mode, Low
power Idle mode, and Power-down mode. In Low power run mode, the power consumption can be
down to 10 uA at 38.4 kHz LIRC. In Low power idle mode, CPU processing is suspended by holding
the Program Counter. No program code is fetched and run in low power idle mode if the power
consumption does not exceed 6 uA. Power-down mode stops the whole system clock for minimum
power consumption with the leakage current less than 1 uA. The system clock of the ML51 can also
be slowed down by software clock divider, which allows for flexibility between execution performance
ML51 SERIES PRODUCT BRIEF

and power consumption.

Through the high performance of 1T 8051 core, low power performance of the ML51 and rich well-
designed peripherals, the ML51 benefits for low-power, battery powered devices, general purpose,
home appliances, or motor control system.

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2 FEATURES
 Operating Characteristics
– Wide supply voltage from 1.8 V to 5.5 V.
– Wide operating frequency up to 24 MHz
– Industrial temperature grade: -40 ℃ to +105 ℃.
 CPU
– Fully static design 8-bit high performance 1T 8051-based CMOS microcontroller.
– Instruction set fully compatible with MCS-51.
– 4-priority-level interrupts capability.
– Dual Data Pointers (DPTRs).
 Low power features
– Normal run typical power consumption 80A /MHz + 400 A (HIRC) or 600A (HXT)
– Low power run mode typical power consumption 15 A
– Low power Idle mode power consumption does not exceed 13 A
– Power-down mode typical power consumption less than 1 A
– Wake up time from Power-down mode less than 10 s (run with HIRC).
 Memory
– Up to 64/32/16 Kbytes of APROM for User Code.
– 4/3/2/1 Kbytes of Flash for loader (LDROM) configure from APROM for In-System-Programmable (ISP)
– Flash Memory accumulated with pages of 128 Bytes from APROM by In-Application-Programmable (IAP).
– Flash Memory 100,000 writing cycle endurance.
– Code lock for security.
– 256 Bytes on-chip RAM.
– Additional 4/2/1 Kbytes on-chip auxiliary RAM (XRAM) accessed by MOVX instruction.
 PDMA
– Three modes: peripheral-to-memory, memory-to-peripheral, and memory-to-memory transfer.
– Source address and destination address must be word alignment in all modes.
– Memory-to-memory mode: transfer length must be word alignment.
– Peripheral-to-memory and memory-to-peripheral mode: transfer length could be byte alignment.
– Peripheral-to-memory and memory-to-peripheral mode: transfer data width byte alignment.
 Clock sources

ML51 SERIES PRODUCT BRIEF

– 24 MHz high-speed internal oscillator (HIRC) trimmed to ±1% (accuracy at 25 ℃, 5 V), ±2% in all
conditions.
– 38.4 kHz low-speed internal oscillator (LIRC) calibrating to ±1% by software from high-speed internal
oscillator (HIRC) or external crystal (HXT).
– External 4~24 MHz crystal (HXT) input for precise timing operation.
– External 32.768 kHz (LXT) crystal input.
– On-the-fly clock source switch via software.
– Programmable system clock divider from 1/2, 1/4, 1/6, 1/8…, up to 1/512.
 Peripherals
– Up to 43 general purpose I/O pins. All output pins have individual 2-level slew rate control.
– 8 channels of GPIO interrupt with variable edge/level detection from all 43 GPIO configure as one of the
input source.
– Two 16-bit Timers/Counters 0 and 1 compatible with standard 8051.
– One 16-bit Timer 2 with three-channel input capture module.
– One 16-bit auto-reload Timer 3, which can be the baud rate clock source of UARTs.
– One programmable Watchdog Timer (WDT) clocked by dedicated 38.4 kHz LIRC.
– One dedicated Self Wake-up Timer (WKT) for self-timed wake-up for power reduced modes by dedicated
38.4 kHz LIRC or 32.768 kHz LXT.
– Two full-duplex UART ports with frame error detection and automatic address recognition.
– Two smart card port supports ISO7816-3 compliant T=0, T=1 and supports full-duplex UART mode .
– Two SPI port with master and slave modes, up to 6 Mbps when system clock is 24 MHz
2
– Two I C bus with master and slave modes, up to 400 kbps data rate.
– 6 pairs, 12 channels of pulse width modulator (PWM) output, up to 16-bit resolution, with different modes
and Fault Brake function for motor control. The 16-bit PWM counter individual used as timer with interrupt.

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 ML51

– Two comparators support hysteresis function.

– One 12-bit ADC, up to 500 ksps (When VDD > 2.5 V), hardware triggered and conversion result compare
facilitating motor control.
 Power monitor
– Brown-out detection (BOD) with low power mode available, 7-level selection, interrupt or reset options.
– Power-on reset (POR).
– Low voltage reset (LVR).
 Strong ESD and EFT immunity
– ESD HBM pass 8 kV
– EFT ± 4.4 kV
– Latch-up pass 150 mA
 Development Tools
– Nuvoton Nu-Link with KEILTM and IAR development environment.
– Nuvoton In-Circuit-Programmer (Nu-Link).
– Nuvoton In-System-Programming (ISP) via UART.
 96-bit Unique ID (UID)
 128-bit Unique Customer ID (UCID)
ML51 SERIES PRODUCT BRIEF

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3 BLOCK DIAGRAM

Figure 3-1 NuMicro® ML51 Block Diagram

ML51 SERIES PRODUCT BRIEF

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4 PARTS INFORMATION

4.1 ML51 Series Naming Rule

ML 51 L D 1 A E

Core Line Package Flash SRAM Reserve Temperature

1T 8051 51: Base B: MSOP10 A: 8 KB 0: 2 KB E:-40°C ~ 105°C

54: LCD (3x3 mm) B: 16 KB 1: 4 KB
D: TSSOP14 C: 32 KB 2: 8/12 KB
(4.4x5.0 mm) D: 64 KB 3: 16 KB
F: TSSOP20 E: 128 KB 6: 32 KB
(4.4x6.5 mm) G: 256 KB 8: 64 KB
E:TSSOP28 I: 512 KB 9: 1 KB
(4.4x9.7 mm) A: 96 KB
U: SOP28
(300 mil)
O: SOP20
(300 mil)
T: QFN33
(4x4 mm)
P: LQFP32
(7x7 mm)
ML51 SERIES PRODUCT BRIEF

L: LQFP48
(7x7 mm)
S: LQFP64
(7x7 mm)
K: LQFP128
(14x14 mm)

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4.2 ML51 Series Selection Guide

Connectivity

Analog Comparator

Internal Voltage
ISP ROM (KB)*

ADC(12-Bit)
SRAM (KB)
Part Number

ISO-7816**
Flash (KB)

Reference

Package
Timer/

PDMA

UART
PWM

SPI

I2C
I/O
ML51BB9AE 16 1 4* 7 4 5 - - - - 2 - 1 2-ch MSOP10
ML51DB9AE 16 1 4* 11 4 6 - - - 1 2 1 2 3-ch TSSOP14
ML51FB9AE 16 1 4* 16 4 6 - - - 1 2 1 2 6-ch TSSOP20
ML51OB9AE 16 1 4* 16 4 6 - - - 1 2 1 2 6-ch SOP20
ML51XB9AE 16 1 4* 17 4 6 - - - 1 2 1 2 6-ch QFN20
ML51EB9AE 16 1 4* 24 4 6 - - - 1 2 1 2 8-ch TSSOP28
ML51UB9AE 16 1 4* 24 4 6 - - - 1 2 1 2 8-ch SOP28
ML51PB9AE 16 1 4* 28 4 6 2 Y 2 1 2 2 2 8-ch LQFP32
ML51TB9AE 16 1 4* 28 4 6 2 Y 2 1 2 2 2 8-ch QFN33
ML51EC0AE 32 2 4* 24 4 6 2 Y 2 1 2 2 2 8-ch TSSOP28
ML51UC0AE 32 2 4* 24 4 6 2 Y 2 1 2 2 2 8-ch SOP28
ML51PC0AE 32 2 4* 28 4 6 2 Y 2 1 2 2 2 8-ch LQFP32
ML51TC0AE 32 2 4* 28 4 6 2 Y 2 1 2 2 2 8-ch QFN33
ML51LC1AE 32 4 4* / 4 12 2 Y 4 2 2 2 2 8-ch LQFP48
ML51PD1AE 64 4 4* / 4 12 2 Y 4 2 2 2 2 8-ch LQFP32
ML51MD1AE 64 4 4* / 4 12 2 Y 4 2 2 2 2 8-ch LQFP44
ML51LD1AE 64 4 4* / 4 12 2 Y 4 2 2 2 2 8-ch LQFP48
ML51SD1AE 64 4 4* / 4 12 2 Y 4 2 2 2 2 8-ch LQFP64
* ISP ROM programmable 1K/2K/3K/4KB Flash for user program loader (LDROM) share from ARPOM.
** ISO-7816 configurable as UART2.

ML51 SERIES PRODUCT BRIEF

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5 PIN CONFIGURATION

5.1 ML51 Series Pin Diagram

5.1.1 ML51 Series QFN33 Pin Diagram

P1.7
P1.6
P1.5
P1.4
P4.0
P4.1
P5.1
P5.0
24

23

22

21

20

19

18

17
VSS 25 16 nRESET
Top transparent view
P4.6 26 15 P5.6
VDD 27 14 P0.0
P3.3 28 QFN33 13 P0.1
ML51TC0AE
P3.2 29 ML51TB9AE 12 P0.2
P3.1 30 11 P0.3
P3.0 31 10 P5.2
33 VSS
VREF 32 9 P5.3
1

8
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
P5.5
P5.4

Figure 5-1 ML51 Series QFN33-pin Diagram

5.1.2 ML51 Series LQFP32 Pin Diagram

ML51 SERIES PRODUCT BRIEF

P1.7
P1.6
P1.5
P1.4
P4.0
P4.1
P5.1
P5.0
24

23

22

21

20

19

18

17

VSS 25 16 nRESET
P4.6 26 15 P5.6
VDD 27 14 P0.0
LQFP32
P3.3 28 ML51PD1AE 13 P0.1
P3.2 29 ML51PC0AE 12 P0.2
ML51PB9AE
P3.1 30 11 P0.3
P3.0 31 10 P5.2
VREF 32 9 P5.3
1

8
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
P5.5
P5.4

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 ML51

Figure 5-2 ML51 Series LQFP-32 -pin Diagram

5.1.3 ML51 Series TSSOP28 Pin Diagram

P1.4 1 28 P4.0

P1.5 2 27 P4.1

P1.6 3 26 P5.1

P1.7 4 25 P5.0

VSS 5 24 nRESET

ML51EB9AE
ML51EC0AE
P4.6 6 23 P0.0

TSSOP28
VDD 7 22 P0.1

P3.2 8 21 P0.2

P3.1 9 20 P0.3

P3.0 10 19 P5.2

VREF 11 18 P5.3

P2.5 12 17 P2.0

P2.4 13 16 P2.1

P2.3 14 15 P2.2

Figure 5-3 ML51 Series TSSOP-28-pin Diagram

5.1.4 ML51 Series SOP28 Pin Diagram

P1.4 1 28 P4.0

P1.5 2 27 P4.1

P1.6 3 26 P5.1

P1.7 4 25 P5.0

ML51 SERIES PRODUCT BRIEF

VSS 5 24 nRESET
ML51UB9AE
ML51UC0AE

P4.6 6 23 P0.0
SOP28

VDD 7 22 P0.1

P3.2 8 21 P0.2

P3.1 9 20 P0.3

P3.0 10 19 P5.2

VREF 11 18 P5.3

P2.5 12 17 P2.0

P2.4 13 16 P2.1

P2.3 14 15 P2.2

Figure 5-4 ML51 Series SOP-28-pin Diagram

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5.1.5 ML51 Series TSSOP20 Pin Diagram

VSS 1 20 P5.1

P4.6 2 19 P5.0

VDD 3 18 nRESET

ML51FB9AE
P3.2 4 17 P0.0

TSSOP20
P3.1 5 16 P0.1

P3.0 6 15 P0.2

VREF 7 14 P0.3

P2.5 8 13 P5.2

P2.4 9 12 P5.3

P2.3 10 11 P2.2

Figure 5-5 ML51 Series TSSOP-20-pin Diagram

5.1.6 ML51 Series SOP20 Pin Diagram

VSS 1 20 P5.1

P4.6 2 19 P5.0

VDD 3 18 nRESET
ML51OB9AE

P3.2 4 17 P0.0
SOP20

P3.1 5 16 P0.1
ML51 SERIES PRODUCT BRIEF

P3.0 6 15 P0.2

VREF 7 14 P0.3

P2.5 8 13 P5.2

P2.4 9 12 P5.3

P2.3 10 11 P2.2

Figure 5-6 ML51 Series SOP-20-pin Diagram

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 ML51

5.1.7 ML51 Series QFN20 Pin Diagram

P1.7

P4.0

P4.1

P5.1

P5.0
15 14 13 12 11

VSS 16 10 nRESET

P4.6 17 9 P0.0
QFN20
VDD 18 ML51XB9AE 8 P0.1
P3.1 19 7 P0.2
P3.0 20 21 VSS 6 P0.3

1 2 3 4 5

P2.5

P2.4

P2.3
P2.2

P2.1
Figure 5-7 ML51 Series QFN-20-pin Diagram

5.1.8 ML51 Series TSSOP14 Pin Diagram

VSS 1 14 P5.1

P4.6 2 13 P5.0

VDD 3 12 nRESET

P3.1 4
TSSOP14 11 P0.2
ML51DB9AE
P3.0 5 10 P0.3

P2.5 6 9 P5.2

ML51 SERIES PRODUCT BRIEF

P2.4 7 8 P5.3

Figure 5-8 ML51 Series TSSOP-14-pin Diagram

5.1.9 ML51 Series MSOP10 Pin Diagram

P5.1 1 10 P5.0

VSS 2 9 nRESET

3
MSOP10 8 P0.0
P4.6
ML51BB9AE
VDD 4 7 P0.1

P2.3 5 6 P2.0

Figure 5-9 ML51 Series MSOP-10-pin Diagram

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6 UTILITIES

6.1 Programmer and Debugger

Nu-Link Basic full speed USB2.0 hardware debugger/programmer

Nu-Link-Pro Advance hardware debugger/programmer with programming counter

Nu-Link 2.0 Advance high speed USB2.0 hardware debugger/programmer with multi-functions

Nu-Link-Gang Off-line hardware programmer supports up to four chips programming for mass-production

ISP In system programming, a software programming tool support UART/USB

ICP In Chip Programming, a software programming tool support Nu-Link programmer

6.2 Development Environment

Programming IDE Keil C-51, IAR EW8051

Software Package Board Support Package(BSP), Sample Code,

Development IDE NuTool Pin-View, NuTool-PinView, NuTool-ClockConfig, NuConsole

RTOS Mbed

Programming IDE Keil C-51, IAR EW8051

6.3 Development Board

EVB NuMaker Part Number Feature
NK-ML51PC ML51PB9AE ML51TB9AE ML51EC0AE
ML51UC0AE ML51PC0AE ML51TC0AE
ML51 SERIES PRODUCT BRIEF

Support Expand Connector, Arduino Uno

NT-ML51EB ML51BB9AE ML51DB9AE ML51FB9AE Interface
ML51OB9AE ML51XB9AE ML51EB9AE
ML51UB9AE

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7 PACKAGE DIMENSIONS

7.1 QFN 33 (4x4x0.8 mm)

ML51 SERIES PRODUCT BRIEF

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7.2 LQFP 32 (7x7x1.4 mm)

ML51 SERIES PRODUCT BRIEF

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7.3 TSSOP 28 (4.4x9.7x1.0 mm)

ML51 SERIES PRODUCT BRIEF

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7.4 SOP 28 (300 mil)

28 15

1 14
ML51 SERIES PRODUCT BRIEF

Control demensions are in milmeters .

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7.5 TSSOP 20 (4.4X6.5 mm)

ML51 SERIES PRODUCT BRIEF

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7.6 SOP 20 (300 mil)

20 11

1 10
ML51 SERIES PRODUCT BRIEF

Control demensions are in milmeters .

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7.7 QFN 20 ( 3.0 X 3.0 mm )

ML51 SERIES PRODUCT BRIEF

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7.8 TSSOP 14 (4.4 X 5.0 mm)

ML51 SERIES PRODUCT BRIEF

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7.9 MSOP 10 (3 x 3 mm)

ML51 SERIES PRODUCT BRIEF

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8 REVISION HISTORY
Date Revision Description

2019.01.05 1.00 Initial version.

ML51 SERIES PRODUCT BRIEF

Important Notice
Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any
malfunction or failure of which may cause loss of human life, bodily injury or severe property
damage. Such applications are deemed, “Insecure Usage”.
Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic
energy control instruments, airplane or spaceship instruments, the control or operation of
dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all
types of safety devices, and other applications intended to support or sustain life.
All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay
claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the
damages and liabilities thus incurred by Nuvoton.

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