6421c Vol II
6421c Vol II
6421c Vol II
II of II
(Supersedes GEH-6421B)
These instructions do not purport to cover all details or variations in equipment, or to provide
for every possible contingency to be met during installation, operation, and maintenance. If
further information is desired or if particular problems arise that is not covered sufficiently
for the purchaser’s purpose, the matter should be referred to GE Industrial Systems, Salem,
VA.
This document contains proprietary information of General Electric Company, USA and is
furnished to its customer solely to assist that customer in the installation, testing, operation
and/or maintenance of the equipment described. This document shall not be reproduced in
whole or in part nor shall its contents be disclosed to any third party without the written
approval of GE Industrial Systems.
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Note Component and equipment reliabilities have improved dramatically over the
past several years. However, component and equipment failures can still occur.
Electrical and environmental conditions beyond the scope of the original design can
be contributing factors.
Since failure modes cannot always be predicted or may depend on the application
and the environment, best practices should be followed when dealing with I/O that is
critical to process operation or personnel safety. Make sure that potential I/O failures
are considered and appropriate lockouts or permissives are incorporated into the
application. This is especially true when dealing with processes that require human
interaction.
Devices
J1
Cable Plug Connector Case Ground
Conventions
P Power Wiring
Glossary of Terms
Index
Introduction
This chapter describes the Mark VI boards including the controller, VCMI, I/O
processor boards along with their associated terminal boards (standard and DIN-rail
mounted), and power supplies.
This information in GEH-6421C, Vol. II Chapter 9 is intended to be used in
conjunction with GEH-6421C, Vol. I, that includes chapters 1 through 8.
The information in GEH-6421C, Vol. I is organized as follows:
Chapter 1 Overview. Outlines the Mark VI system and the chapters in the manual.
Chapter 2 System Architecture. Describes the main system components, the
networks, and details of the TMR architecture.
Chapter 3 Networks. Discusses the data highways and other communication
networks, including the links to other control systems.
Chapter 4 Codes and Standards. Discusses the codes, standards, and
environmental guidelines used for the design of all printed circuits,
modules, cores, panels, and cabinet line-ups in the Mark VI.
Chapter 5 Installation. Provides instructions for system installation, wiring,
grounding, checkout, and startup.
Chapter 6 Tools. Summarizes the toolbox, CIMPLICITY HMI, and the Historian.
Chapter 7 Applications. Covers several applications including protection logic,
synchronization, and details of the servo regulators.
Chapter 8 Troubleshooting and Diagnostics. Describes how process and
diagnostic alarms are generated and displayed for the operator and
service engineer. It includes a listing of the board diagnostics, and an
introduction to system troubleshooting.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-1
Controller
The Mark VI UCVE controller is a 6U high, single or double slot, single board
computer (SBC) that operates the turbine application code. The controller mounts in
a VME rack called the control module, and communicates with the turbine I/O
boards through the VME bus. The controller operating system is QNX, a real time,
multitasking OS designed for high-speed, high reliability industrial applications.
Three communication ports provide links to operator and engineering interfaces as
follows:
• Ethernet connections to the UDH for communication with HMIs, and other
control equipment
• RS-232C connection for setup using the COM1 port
• RS-232C connection for communication with DCS systems using the COM2
port (such as Modbus slave)
Three controller versions are in use. The single slot UCVE is the current generation
controller. The double slot UCVB and UCVD are no longer shipped with new
systems, but are still in use in older systems. The UCVE may be used to replace
these other controllers, but requires a backplane upgrade. If replacing a ICVB, an
Ethernet cabling upgrade is also required.
Operation
The controller is loaded with software specific to its application to Steam, Gas, and
Land-Marine aeroderivative (LM), or Balance of Plant (BOP) products. It can
execute up to 100,000 rungs or blocks per second, assuming a typical collection of
average size blocks. Application software can be modified online without requiring a
restart. An external clock interrupt permits the controller to synchronize to the clock
on the VCMI communication board to within ± 100 microseconds.
External data is transferred to and from the Control Signal Database (CSDB) in the
controller over the VME bus by the VCMI communication board. In a Simplex
system, the data consists of the process inputs and outputs from the I/O boards. In a
TMR system, the data consists of the voted inputs from the input boards, singular
inputs from simplex boards, computed outputs to be voted by the output hardware,
and the internal state values that must be exchanged between the controllers.
UCVE Controller
The UCVE is available in two different forms, UCVEH2 and UCVEM01. The
UCVEH2 is the standard Mark VI controller (see Figure 9-1). It is a single-slot board
using a 300 MHz Intel Celeron processor with 16 Mb of flash memory and 32 Mb of
DRAM. A single 10BaseT (RJ-45) Ethernet port provides connectivity to the UDH.
A separate subnet address allows The UCVEM01 has all of the features of the UCVEH2 with the addition of a second
the controller to uniquely 10BaseT Ethernet port for use on a separate IP logical subnet, as shown in Figure 9-
identify an Ethernet port. Obtain 2. Configuration of the second Ethernet port is performed through the toolbox.
IP subnet addresses from the
The controller validates its toolbox configuration against the existing hardware each
Ethernet network administrator.
time the rack is powered up.
(eg. 192,168.1.0, 192.168.2.0)
9-2 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Mark VI Controller UCVEH2
Status LEDs
STATUS
VMEbus SYSFAIL
Monitor Port for GE use
Flash Activity
S
V
Power Status
G
Keyboard/mouse port A
for GE use
M
/
COM1 RS-232C Port for K
Initial Controller Setup; C
COM2 RS-232C Port for O
M
Serial communication 1:2 Ethernet Status LEDs
L Active
A
N
Ethernet Port for Unit Data Link
RST
Highway Communication
P
C Note: To connect the
M batteries that enable
I NVRAM and CMOS, set
P
jumper E8 to pins 7-8 ("IN")
and jumper E10 to ("IN").
M
E
Z Also be aware that UCVE
Z modules may be shipped
A with the batteries disabled.
N
I
N
E
UCVE
H2
x
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-3
Mark VI Controller UCVEM01
Status LEDs
STATUS
VMEbus SYSFAIL
Monitor Port for GE use
Flash Activity
S
V
Power Status
G
Keyboard/mouse port A
for GE use
M
/
COM1 RS-232C Port for K
Initial Controller Setup; C
COM2 RS-232C Port for O Ethernet Status LEDs
M
Serial communication 1:2
Active
L
A
Primary Ethernet Port for N
Link
Unit Data Highway RST
Communication (Toolbox) Speed (Off =10 MB/sec)
SPEED LINK/
ACT
P
(On = 100 MB/sec)
C
M Link / Active
Secondary Ethernet Port for I
Expansion IO Communication P
9-4 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
UCVE Controller Specification
Table 9-1. UCVE Controller Specification
Item Specification
Microprocessor Intel Celeron 300 MHz
Memory 32 MB DRAM
16 MB Compact Flash Module
128 KB L2 cache
Battery-backed SRAM - 8K allocated as NVRAM for controller functions
Operating System QNX
LEDs LED indicators on the faceplate provide status information as follows:
Left Indicator Power Status
Center Indicator Flash Activity
Right Indicator VME bus SYSFAIL
Primary Ethernet Status
Upper LAN Indicator Active
Lower LAN Indicator Link
Secondary Ethernet Status (M01 version only)
Left LAN Indicator Speed
Right LAN Indicator Link/Active
Programming Control block language with Analog and Discrete blocks; Boolean logic
represented in relay ladder diagram format. Supported data types include:
• Boolean
• 16-bit signed integer
• 32-bit signed integer
• 32-bit floating point
• 64-bit long floating point
Primary Ethernet Interface Twisted pair 10Base-T, RJ-45 connector:
• TCP/IP protocol used for communication between controller and
toolbox
• Ethernet Global Data (EGD) protocol for communication with
CIMPLICITY HMI, and Series 90-70 PLCs
• Ethernet Modbus™ protocol supported for communication
between controller and third party Distributed Control
System (DCS)
Secondary Ethernet Twisted pair 10Base-T, RJ-45 connector:
Interface (M01 version only) • Ethernet Global Data (EGD) protocol
• Ethernet Modbus™ protocol supported for communication
between controller and third party Distributed Control
System (DCS)
COM Ports Two Micro-miniature 9-pin D connectors:
COM1 Reserved for diagnostics, 9600 baud, 8 Data bits, no parity,
1 stop bit
COM2 Used for serial Modbus communication, 9600 or 19200 baud
Power Requirements +5 V dc, 6 A typical, 8 A maximum
UCVEH2 +12 V dc, 180 mA typical, 250 mA maximum
−12 V dc, 180 mA typical, 250 mA maximum
Power Requirements +5 V dc, 6 A typical, 8.1 A maximum
UCVEM01 +12 V dc, 180 mA typical, 250 mA maximum
−12 V dc, 180 mA typical, 250 mA maximum
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-5
UCVD Controller
The UCVD is a double-slot board using a 300 MHz AMD K6 processor with 8 Mb
of flash memory and 16 Mb of DRAM. A single 10BaseT (RJ-45 connector)
Ethernet port provides connectivity to the UDH. It includes several legacy interfaces
that are not used in the Mark VI configuration. (Refer to Figure 9-3.)
The UCVD contains a double column of 8 status LED’s. These LED’s are
sequentially turned on in a rotating pattern when the controller is operating
normally. When an error condition occurs the LED’s display a flashing error code
that identifies the problem. For more information refer to GEH-6410, Innovation
Series Controller System Manual.
x x
ETHERNET
Only
COM2
GENIUS
MOUSE
UCVD
H2
x x
9-6 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
UCVD Controller Specifications
Table 9-2. UCVDH1 Controller Specification
Item Specification
Microprocessor AMD-K6 300 MHz
Memory 16 MB DRAM
8 MB Flash Memory in UCVD
256 KB of level 2 cache
Operating System QNX
LEDs LEDs on the faceplate provide status information as follows:
ACTIVE Processor is active
SLOT 1 Controller configured as slot 1 controller in VME rack
BMAS VME master access is occurring
ENET Ethernet activity
BSLV VME slave access is occurring
STATUS Display rotating LED pattern when OK
Display flashing error code when faulted
FLSH Writing to Flash memory
GENX Genius I/O is active
Programming Control block language with Analog and Discrete blocks; Boolean logic
represented in relay ladder diagram format. Supported data types include:
• Boolean
• 16-bit signed integer
• 32-bit signed integer
• 32-bit floating point
• 64-bit floating point
Ethernet Interface Twisted pair 10Base-T, RJ-45 connector
• TCP/IP protocol used for communication between controller and
toolbox
• Serial Request Transfer Protocol (SRTP) interface between controller
and HMI
• Ethernet Global Data (EGD) protocol for communication with
CIMPLICITY HMI, and Series 90-70 PLCs
• Ethernet Modbus™ protocol supported for communication between
controller and third party Distributed Control System (DCS)
COM Ports Two Micro-miniature 9-pin D connectors:
COM1 Reserved for diagnostics, 9600 baud, 8 Data bits, no parity,
1 stop bit
COM2 Used for serial Modbus communication, 9600 or 19200 baud
Genius Bus Interface Genius Bus controller integrated with the central processing unit
Power Requirements +5 V dc, 6 A
+12 V dc, 200 mA
−12 V dc, 200 mA
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-7
UCVB Controller
The UCVB is a double-slot board using a 133 MHz Intel Pentium processor with 4
Mb of flash memory and 16 Mb of DRAM. A single 10Base2 (BNC connector)
Ethernet port provides connectivity to the UDH. It includes several legacy interfaces
that are not used in the Mark VI configuration.
The UCVB contains a double column of 8 status LED’s. These LED’s are
sequentially turned on in a rotating pattern when the controller is operating normally.
When an error condition occurs the LED’s display a flashing error code that
identifies the problem. For more information refer to GEH-6410, Innovation Series
Controller System Manual.
x x
DLAN DROP
1 0
8
Ethernet Port for Unit Data DLAN Network Drop Number
ETHERNET
Only
HARD DISK
COM2
UCVB
G1
x x
9-8 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
UCVB Controller Specifications
Table 9-3. UCVBG1 Controller Specification
Item Specification
Microprocessor Intel Pentium 133 MHz
Memory 16 MB DRAM
4 MB Flash Memory in UCVB
256 KB of level 2 cache
Operating System QNX
LEDs LEDs on the faceplate provide status information as follows:
ACTIVE Processor is active
SLOT 1 Controller configured as slot 1 controller in VME rack
BMAS VME master access is occurring
ENET Ethernet activity
BSLV VME slave access is occurring
STATUS Display rotating LED pattern when OK
Display flashing error code when faulted
FLSH Writing to Flash memory
GENX Genius I/O is active
Programming Control block language with Analog and Discrete blocks; Boolean logic
represented in relay ladder diagram format. Supported data types include:
• Boolean
• 16-bit signed integer
• 32-bit signed integer
• 32-bit floating point
• 64-bit long floating point
Ethernet Interface Thinwire 10Base-2, BNC connector:
• TCP/IP protocol used for communication between controller and
toolbox
• Serial Request Transfer Protocol (SRTP) interface between controller
and HMI
• Ethernet Global Data (EGD) protocol for communication with
CIMPLICITY HMI, and Series 90-70 PLCs
• Ethernet Modbus™ protocol supported for communication
between controller and third party Distributed Control
System (DCS)
COM Ports Two Micro-miniature 9-pin D connectors:
COM1 Reserved for diagnostics, 9600 baud, 8 Data bits, no parity,
1 stop bit
COM2 Used for serial Modbus communication, 9600 or 19200 baud
Genius Bus Interface Genius Bus controller integrated with the central processing unit
DLAN+ Interface Interface to DLAN+, a high speed multidrop network based on ARCNET,
using a token passing, peer to peer protocol
Power Requirements +5 V dc, 5.64 A
+12 V dc, 900 mA
−12 V dc, 200 mA
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-9
Configuration Overview
Like all the I/O boards, the controller is configured using the Control System
Toolbox. This software is summarized in GEH-6421C, Vol. I Mark VI System Guide,
Chapter 6 Tools. For details refer to GEH-6403 Control System Toolbox for
Configuring the Mark VI Turbine Controller.
Diagnostics
If a failure occurs in the Mark VI controller while it is running application code, the
rotating status LEDs (if supported) on the front panel stop and an internal fault code
is generated.
Additionally, if the controller detects certain system errors (typically during boot-up
or download) it displays flashing error codes on the status LEDs. These codes are
called runtime errors, and descriptions are available on the toolbox Help screen. The
error numbers and descriptions are also available on the controller serial port
(COM1). For further information, refer to GEH-6421C, Vol. I Mark VI System
Guide, Chapter 8, Troubleshooting and Diagnostics. Like the turbine I/O boards, the
controller maintains an internal diagnostic queue that can be queried from the
toolbox.
Installation
A control module contains (at a minimum) the controller and a VCMI. There are
three rack types that can be used, the GE Fanuc PLC rack shown in Figure 9-5, and
two sizes of Mark VI racks shown in the section, VCMI - Bus Master Controller. The
GE Fanuc rack is shorter and is used for stand-alone modules with remote I/O only.
The Mark VI racks are longer and can be used for local or remote I/O. Whichever
rack is used, a cooling fan is mounted either above or below the controller. The
stand-alone control module implemented with a GE Fanuc PLC rack also requires a
VDSK board.
VCMIH2 Communication Board with Controller Interface Board
Three IONet Ports (VCMIH1 with One UCVX VDSK
IONet is for Simplex systems)
VME Rack
POWER
SUPPLY
Power Supply
x x x x
9-10 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VCMI - Bus Master Controller
The bus master controller, known as the VCMI, is the communication interface
between the controller and the I/O boards, and the communication interface to the
system control network, known as IONet. VCMI is also the VME bus master in the
control racks and I/O racks, and manages the IDs for all the boards in the rack and
their associated terminal boards. In the case of TMR systems the three-network
version (VCMIH2X) votes all incoming data from the I/O boards and passes the
results to the controller for processing. The two versions of VCMI boards are shown
in Figure 9-6.
VCMI H1 VCMI H2
x x
VCMI is OK
S S
E E
R R
I VME Bus to I/O I VME Bus to I/O
A A
L
Boards and Controller Boards and Controller
L
P P
A A
R R
A A
L L
L L
E E
L L
M M
O8 IONet Node O8
D4 D4 TX
U2 U2 RX
L L
1 1 CD
E E
IONet3 port
10Base 2
R Channel ID
S R TX
T S RX
T CD
Transmitting Packets IONet2 port
TX Receiving Packets 10Base 2
RX Collisions on IONet
CD TX
RX
IONet port IONet1 port
CD
10Base 2 10Base 2
VCMI VCMI
H1 H2
x x
Communication Communication
Board - 1 IONet Board - 3 IONets
Figure 9-6. VCMI Boards, Single Network and Triple Network Versions
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-11
Figure 9-7 shows three Simplex system configurations with local and remote I/O
using the VCMI. Multiple I/O racks can be connected to IONet, each rack with its
own VCMI board. To increase data throughput for applications requiring low
latency, a second IONet port on the VCMI can be used as a parallel IONet as shown
in the lower portion of the figure.
R R1
V U V
Simplex System with
C C I/O C I/O
M V Boards M Local & Remote I/O
Boards
I X I
IONet
R R1
V U V
C C C I/O Simplex System with
M V M Boards Multiple IONets &
I X I Remote I/O
IONet
R2
V
C I/O
M Boards
I
IONet
Figure 9-7. Simplex System Configurations with Local and Remote I/O
Two sizes of TMR systems are shown in Figure 9-8. The first example is a small
system where all the I/O can be mounted in the VME control rack so no remote I/O
racks are required. Each channel (R, S, T) has its own IONet, and the VCMI has
three IONet ports.
9-12 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
The second example is a larger system employing remote I/O racks. Each IONet
supports multiple I/O racks, but only one rack is shown here. All I/O channels R, S,
T, are identical in terms of I/O boards and points.
R S T
TMR System with
V U V U V U Local I/O
C C I/O C C I/O C C I/O
M V Boards M V Boards M V Boards UCVX is Controller
I X I X I X
VCMI is Bus Master
I/O are VME Boards
IONet - R Termination Boards
IONet - S not shown
IONet - T
IONet - R
IONet - S
IONet - T
R1 S1 T1
V V V
C I/O C I/O C I/O
IONet Supports
M Boards M Boards M Boards Multiple Remote
I I I I/O Racks
Figure 9-8. TMR System Configurations with Local and Remote I/O
Features
The VCMI architecture is based on the 32-bit Texas Instruments TMS320C32 digital
signal processor (DSP). The main hardware features are:
• Interface to VME bus
• Three 10Base-2 Ethernet ports
• One RS-232C serial port
• One parallel port
• Power system monitoring
• Board and cable ID reading
• Processor watchdog timer
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-13
VME Interface
The VCMI is the VME system (slot 1) controller and the sole bus master in both the
control racks and the I/O racks. It inventories and initializes all the boards in its rack.
9-14 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Output Data Distribution
After application code execution, the VCMI reads the output values from the
controller across the VME bus. All the output data from a control module VCMI is
placed in one packet. This packet is then broadcast on the IONet and received by all
connected interface and control modules. Each interface module VCMI extracts the
required information and distributes to its associated I/O boards.
Performance
The Simplex frame rate can be as fast as 10 milliseconds allowing turbine control at
100 Hz, while the TMR frame rate can be as fast as 20 ms for control at 50 Hz.
The control module is synchronized to the wall clock ensuring the sequence of
events (SOE) times are within 1 ms of the actual event times.
Watchdog Timer
The watchdog timer protects against a processor stall condition. If a stall occurs the
watchdog times out after approximately 200 ms and resets the processor. It notifies
the VME backplane that the processor has been reset, and shuts off IONet
communication while stalled. The front panel reset button (if present) can be used to
force the timer to the stalled state from which it transitions to the operational state.
On line testing of the watchdog function can be performed.
VCMI Diagnostics
The internal 5V, 12V, 15V, and 28V power supply buses are monitored and alarmed.
The alarm settings are configurable and usually set at 3.5%, except for the 28-Volt
supplies, which are set at 5.5%.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-15
Diagnostic signals from the Power Distribution Module, connected through J301, are
also monitored. These include ground fault and over/under voltage on the P125V
bus, two differential ±5Vdc analog inputs, P28A and PCOM for external monitor
circuits, and digital inputs.
Descriptions of the VCMI diagnostics are in GEH-6421C, Vol. I Mark VI System
Guide, Chapter 8, Troubleshooting and Diagnostics.
Specification
Table 9-4. VCMI Specification
Item Specification
Board Type 6U high VME board, 0.787 inch wide
Processor Texas Instruments TMS320C32 32-bit digital signal processor
Memory Dual-port memory, 32 Kbytes in 32 bit transfer configuration
SRAM, 64k x 32
Flash memory, 128k x 8
Communication H1 version: One IONet 10 Base-2 Ethernet Port, BNC connector, 10
Mbits/sec
H2 version: Three IONet 10 Base-2 Ethernet Ports, BNC connectors, 10
Mbits/sec
VME bus block transfers
1 RS-232C Serial Port, male "D" style connector, 9600, 19,200, or 38,400
bits/sec
1 Parallel Port, eight bit bi-directional , EPP Version1.7 mode of IEEE
1284-1994
Frame Rate 10 ms (100 Hz) for Simplex
40 ms (25 Hz) for TMR
Configuration Overview
Like all I/O boards, the VCMI is configured using the Control System Toolbox. This
software usually runs on a data-highway connected CIMPLICITY station or
workstation. Table 9-5 summarizes configuration choices and defaults. For details
refer to GEH-6403 Control System Toolbox for Configuring the Mark VI Controller.
9-16 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Table 9-5. VCMI Toolbox Configuration (Part 1 of 2)
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-17
Table 9-5. VCMI Toolbox Configuration (Part 2 of 2)
9-18 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VDSK - Interface Board
The VDSK interface board provides power subsystem monitoring to the VCMI.
VDSK is mounted adjacent to the Mark VI controller in the standalone controller
rack as shown in Figure 9-9. It is not used in the other types of control racks.
J4
J3
24 V dc Supply to Cooling
Fan below Rack
VDSK
x x x
Cable to Power Sub-System
Operation
VDSK supports three functions as follows:
• Interconnects the PDM with the power subsystem monitoring functions of the
VCMI through the 96-pin P2 backplane connector and the 37-pin sub-miniature
D connector on the front panel. This connection is through a 64-pin ribbon cable
connected at the back of the VME backplane.
• Interconnects +12 V dc and –12 V dc from the 96-pin P1 backplane connector to
a front panel mounted 2-pin connector to power the 4.3 watt 24 V dc VME rack
mounted fan assembly. This is from the front panel J4 connector.
• Provides a board mounted 16-pin Ethernet ID connector, which interfaces to the
VCMI board through the P2 backplane connector ribbon cable.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-19
Board Summary
Listed in Table 9-6 are all the I/O processor boards, the number of I/O per processor
that they support, and their associated standard terminal boards. Some standard
terminal boards have Simplex and TMR versions (in addition to Simplex DIN-rail
mounted ones). Refer to the section, Simplex DIN-rail Mounted Terminal Board
Summary for Simplex DIN-rail mounted terminal board information.
9-20 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Table 9-6. I/O Processor Boards and Standard Terminal Boards Continued
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-21
Simplex DIN-Rail Mounted Terminal Board Summary
Speed control systems for small turbines require a simplified system architecture.
Simplex control is used to reduce cost and save space. Compact DIN-rail mounted
terminal boards are available instead of the larger T-type terminal boards used on
TMR systems. IONet is not used since the D-type terminal boards cable directly into
the control chassis to interface with the I/O boards.
In the VME rack, a VCMI board provides two-way communication between the
controller and the I/O processor boards. The controller Ethernet port is used to
communicate with other system components, such as an operator interface or PLC.
Additional PLC I/O can be tied into the system using the controller Genius port. A
typical system is illustrated in Figure 3-1. The system is powered by 24 V dc, and
uses a low voltage version of the standard VME rack power supply.
The board designations and functions along with the corresponding I/O processor
boards are listed in Table 9-7. In all cases, the signal conditioning on the DIN-type
terminal boards is the same as on the T-type boards, and the I/O specifications
described apply. However, the number of inputs and outputs, and the grounding
provisions differ, and the boards do not support TMR. Permanently mounted high-
density Euro Block terminal blocks are used to save space. The blocks have
terminals accepting wire sizes up to one #12 wire, or two #14 wires. The typical wire
size used is #18 AWG.
9-22 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Fan
x x x x x x x x
To Sequencer
& Operator Ethernet
Interface V U V V V V V V V V V S Power
C C T T T A A S S R C P Supply
M V U U C I I V V T R A
Serial Modbus COM2 I B R R C C C O O D C R
Communication E
x x x x x x x x x x x x x
24 V dc
power
1 2 3 4 5 6 7 8 9 10 11 12 13
DTCI
DTCI Contact
DTUR Contact Inputs
Turbine DTRT Inputs
Control Transit
-ion Bd. DTUR
Turbine
Control DRLY DRLY
DRLY Relay Relay
Relay Outputs Outputs
Output
DRTD
DRTD RTD
RTD Inputs
DTTC DTTC Inputs
Thermo DTAI DTAI
Thermo Analog
-couples -couples Analog
Inputs Inputs
DSVO
DSVO Servo
Servo Outputs
Outputs
DTAI
Analog DTAI
Inputs Analog
Inputs
DSVO DSVO
Servo Servo
Outputs Outputs
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-23
Table 9-7. Simplex DIN-Rail Mounted Terminal Boards
Grounding
During panel design, provisions for grounding the terminal board and wiring shields
must be made. These connections should be as short as possible. A metal grounding
strip can be firmly mounted to the panel on the right hand side of the terminal board.
Shields and the SCOM connection can be conveniently made to this strip. Note that
only the thermocouple board has screws for the shield wires.
The VME rack is grounded to the mounting panel by the metal-to-metal contact
under the mounting screws. No wiring to the ground terminal is required. The
individual terminal boards are described in the following sections.
9-24 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VTCC/TBTCH1C (Simplex) - Thermocouple Inputs
The thermocouple processor board VTCC accepts 24 type E, J, K, S (see note), or T
thermocouple inputs. These inputs are wired to two barrier type blocks on the
terminal board TBTC. Cables with molded plugs connect the terminal board to the
VME rack where the VTCC thermocouple board is located, as shown in Figure 9-11.
Input data is transferred over the VME backplane from VTCC to the VCMI and then
to the controller.
x
x
x 2
x 1 TBTC, capacity for RUN
x 3 FAIL
x 4 24 thermocouple inputs STAT
TC x 6
x 5
Inputs x 8
x 7
x 10
x 9
x 11 VME Bus to VCMI
x 12
x 14
x 13 Communication Board
x 16
x 15
x 18
x 17
x 19 37-pin "D" shell
x 20 JA1
x 21 type connectors
x 22
x 23 with latching
x 24
x
fasteners
x
x 26
x 25
x 28
x 27
TC x 30
x 29
32
x 31
Inputs x JB1
x 34
x 33
x 36
x 35
x 38
x 37 Cables to VME
x 40
x 39 Rack
VTCC
x 42
x 41 x
x 44
x 43
x 46
x 45 Connectors on J3
x 48
x 47 VME Rack
x
x
Shield Bar
Ground
J4
BarrierType Terminal
Blocks can be unplugged
from board for
maintenance
Figure 9-11. Thermocouple Input Terminal Board, I/O Board, and Cabling
Operation
The 24 thermocouple inputs can be grounded or ungrounded. They can be located up
to 300 meters (984 feet) from the turbine control cabinet with a maximum two-way
cable resistance of 450 ohms. High frequency noise suppression and two cold
junction reference devices are mounted on TBTC as shown in Figure 9-12.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-25
Linearization for individual thermocouple types is performed in software by VTCC.
A thermocouple, which is determined to be out of the hardware limits, is removed
from the scanned inputs in order to prevent adverse affects on other input channels.
If both cold junction devices are within the configurable limits, then the average of
the two is used for cold junction compensation. If only one cold junction device is
within the configurable limits, then that cold junction is used for compensation. If
neither cold junction device is within the configurable limits, then a default value is
used.
Local
Cold Junction Excitation
JA1 J3
Reference
Remote Cold
Junction
Thermocouple References
High
Noise
Low Suppression
Thermocouple
High
Noise
Low Suppression
(12) thermocouples
ID
9-26 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Features
Thermocouple Limits
Thermocouple inputs are supported over a full-scale input range of –8.0 mV to +45.0
mV. Table 9-8 shows typical input voltages for different thermocouple types versus
minimum and maximum temperature range. It is assumed the cold junction
temperature ranges from +32 to +158 °F.
Thermocouple Type E J K S T
Low range, °F / °C −60 / −51 −60 / −51 −60 / −51 0 / −17.78 −60 / −51
mV at low range with reference −7.174 −6.132 −4.779 −0.524 −4.764
at 158 °F (70 °C)
High range, °F / °C 1100 / 593 1400 / 798 2000 / 1093 3200 / 1760 750 / 399
mV at high range with reference 44.547 42.922 44.856 18.612 20.801
at 32 °F (0 °C)
Cold Junctions
There are two cold junction (CJ) references used per VTCC, one for connector J3
and J4. Each reference can be selected as either remote (from VME bus) or local
(from associated terminal board, T type or D type). All references are then treated as
sensor inputs (for example, averaged, limits configured). The two references can be
mixed, one local and one remote. CJ signals go into signal space and are available
for monitoring. Normally the average of the two is used. Acceptable limits are
configured, and if a CJ goes outside the limit, a logic signal is set. A 1 °F error in the
CJ compensation will cause a 1°F error in the TC reading.
Hard coded limits are set at 32 to 158 °F, and if a CJ goes outside these, it is
regarded as bad. Most CJ failures are open or short circuit. If one CJ fails, the good
one is used. If both CJs go bad, the backup value is used, which can be derived from
CJ readings on other terminal boards, or can be the configured default value.
Diagnostics
Three LEDs at the top of the front panel provide status information. The normal
RUN condition is a flashing green, and FAIL is a solid red. The third LED shows a
steady orange if a diagnostic alarm condition exists in the board.
Each thermocouple type has Hardware Limit Checking based on preset (non-
configurable) high and low levels set near the ends of the operating range. If this
limit is exceeded a logic signal is set and the input is no longer scanned. If any one of
the 24 inputs hardware limits is set it creates a composite diagnostic alarm,
L3DIAG_VTCC, referring to the entire board. Details of the individual diagnostics
are available from the toolbox. The diagnostic signals can be individually latched,
and then reset with the RESET_DIA signal.
Each thermocouple input has System Limit Checking based on configurable high and
low levels. These limits can be used to generate alarms, and can be configured for
enable/disable, and as latching/nonlatching. RESET_SYS resets the out of limit
signals. In TMR, Systems Limit logic signals are voted and the resulting composite
diagnostic is present in each controller.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-27
Each terminal board cable has its own ID device which is interrogated by the I/O
board. The board ID is coded into a read-only chip containing the terminal board
serial number, board type, revision number, and the JA1/JB1 connector location.
The TMR version of this board has six ID devices, one for each cable connector.
Details of the VTCC diagnostics are in GEH-6421C, Vol. I Mark VI System Guide,
Chapter 8, Troubleshooting and Diagnostics.
Calibration
The thermocouple inputs and cold junction inputs are automatically calibrated using
the filtered calibration reference and zero voltages.
Specification
Table 9-9. Typical VTCC Specification
Item Specification
Number of Channels 24 channels per terminal board and I/O board
Thermocouple types E, J, K, S, T thermocouples, and mV inputs
Span -8 mV to +45 mV
A/D Converter Sampling type 16-bit A/D converter with better than 14-bit
resolution
Cold junction compensation Reference junction temperature measured at two locations
on each TC terminal board (optional for remove CJs).
TMR board has six cold junction references.
Cold junction temperature Cold junction accuracy 2 °F
accuracy
Conformity error Maximum software error 0.25 °F
Measurement accuracy 53 microvolts (excluding cold junction reading)
Example: 3 °F, type K, at 1000 °F, including cold junction
contribution (RSS)
Common mode rejection AC common mode rejection 110 dB @ 50/60 Hz, for
balanced impedance input
Common mode voltage +/- 5 Volts
Normal mode rejection Rejection of 250 mV Rms is 80 dB @ 50/60 Hz
Scan time All inputs are sampled at 120 times per second for 60 Hz
operation; for 50 Hz operation it is 100 times per second
Fault detection High/low (hardware) limit check
High/low system (software) limit check
Monitor readings from all TCs, CJs, calibration voltages, and
calibration zero readings
Configuration Overview
Like all I/O boards, the thermocouple board is configured using the Control System
Toolbox. Table 9-10 summarizes configuration choices and defaults. For details refer
to GEH-6403, Control System Toolbox for Configuring the Mark VI Controller.
9-28 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Table 9-10. Thermocouple Board Configuration (Part 1 of 2)
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-29
Table 9-10. Thermocouple Board Configuration (Part 2 of 2)
Card Points (Signals) Description - Point Edit (Enter Signal Connection Name) Direction Type
L3DIAG_VTCC1 Card Diagnostic Input BIT
L3DIAG_VTCC2 Card Diagnostic Input BIT
L3DIAG_VTCC3 Card Diagnostic Input BIT
SysLim1TC1 System Limit 1 for Thermocouple Input BIT
: : Input BIT
SysLim1TC24 System Limit 1 for Thermocouple Input BIT
SysLim1CJ1 System Limit 1 for Cold Junction Input BIT
SysLim1JC2 System Limit 1 for Cold Junction Input BIT
SysLim2TC1 System Limit 2 for Thermocouple Input BIT
: : Input BIT
SysLim2TC24 System Limit 2 for Thermocouple Input BIT
SysLim2CJ1 System Limit 2 for Cold Junction Input BIT
SysLim2CJ2 System Limit 2 for Cold Junction Input BIT
CJ Backup Cold Junction Backup Output FLOAT
CJ Remote 1 Cold Junction Remote 1 Output FLOAT
CJ Remote 2 Cold Junction Remote 2 Output FLOAT
ThermCpl1 Thermocouple reading Input FLOAT
: : Input FLOAT
ThermCpl24 Thermocouple reading Input FLOAT
ColdJunc1 Cold Junction for TC's 1−12 Input FLOAT
ColdJunc2 Cold Junction for TC's 13−24 Input FLOAT
Installation
Thermocouples are wired directly to two I/O terminal blocks. These blocks are
mounted on the terminal board and held down with two screws as shown in Figure 9-
13. Each block has 24 terminals accepting up to #12 AWG wires. A shield
termination strip attached to chassis ground is located immediately to the left of each
terminal block.
9-30 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Thermocouple Terminal Board TBTCH1C
Input 1 (-)
x 1 Input 1 (+)
x 2
x 3 Input 2 (+)
Input 2 (-) x 4
Input 3 (-)
x 5 Input 3 (+)
x 6
Input 4 (-)
x 7 Input 4 (+)
x 8
x 9 Input 5 (+)
Input 5 (-) x 10
x 11 Input 6 (+)
Input 6 (-) x 12
Input 7 (-)
x 13 Input 7 (+)
x 14
x 15 Input 8 (+) JA1
Input 8 (-) x 16
x 17 Input 9 (+)
Input 9 (-) x 18
x 19 Input 10(+)
Input 10(-) x 20
Input 11(-) x 21 Input 11(+)
x 22
Input 12(-)
x 23 Input 12(+)
x 24
x
x
x 25 Input 13(+)
Input 13(-) x 26
x 27 Input 14(+)
Input 14(-) x 28
x 29 Input 15(+) JB1
Input 15(-) x 30
x 31 Input 16(+) Cable to J3
Input 16(-) x 32
x 33 Input 17(+) on I/O Rack
Input 17(-) x 34
Input 18(-) x 36
x 35 Input 18(+)
Input 19(-)
x 37 Input 19(+)
x 38
Input 20(-) x 40
x 39 Input 20(+)
Input 21(-)
x 41 Input 21(+)
x 42
x 43 Input 22(+)
Input 22(-) x 44
Input 23(-) x 46
x 45 Input 23(+)
Input 24(-) x 48
x 47 Input 24(+)
x Cable to J4
on I/O Rack
I/O Terminal Blocks with Barrier Terminals TMR version of this board has
Terminal Blocks can be unplugged from connectors JRA, JSA, and JTA for
terminal board for maintenance inputs 1-12, and
connectors JRB, JSB, and JTB for
Up to two #12 AWG wires per point with inputs 13-24.
300 volt insulation
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-31
VTCC/TBTCH1B (TMR) - Thermocouple Inputs
TBTCH1B provides redundant thermocouple inputs by fanning the inputs out to
VTCC boards in the R, S, and T racks, refer to Figure 9-14. The inputs have the
same environmental, codes, resolution, suppression, and function requirements as
with the TBTC terminal board.
Grounded or JSB
ungrounded ID
(12) thermocouples Analog-Digital
To Converter
<S
>
JTB
ID
To
<T
>
9-32 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Installation
Thermocouples are wired directly to two I/O terminal blocks. These blocks are
mounted on the terminal board and held down with two screws as shown in Figure 9-
15. Each block has 24 terminals accepting up to #12 AWG wires. A shield
termination strip attached to chassis ground is located immediately to the left of each
terminal block. Two cables connect to J3 and J4 on each of the R, S, and T racks.
Thermocouples 1−12 connect to the JRA, JSA, and JTA connectors; thermocouples
13−24 connect to JRB, JSB, and JTB.
x
To J3
x 1 Input 1 (+) Rack T
Input 1 (-) x 2
x 3 Input 2 (+)
Input 2 (-) x 4
Input 3 (-)
x 5 Input 3 (+)
x 6
Input 4 (-)
x 7 Input 4 (+)
x 8
x 9 Input 5 (+)
Input 5 (-) x 10
x 11 Input 6 (+)
Input 6 (-) x 12
Input 7 (-)
x 13 Input 7 (+)
x 14 JSA
x 15 Input 8 (+) JSB
Input 8 (-) x 16 Cable to J4
x 17 Input 9 (+) on I/O Rack T
Input 9 (-) x 18
x 19 Input 10(+)
Input 10(-) x 20
Input 11(-) x 21 Input 11(+) To J3
x 22
x 23 Input 12(+) Rack S
Input 12(-) x 24
x
x
x 25 Input 13(+)
Input 13(-) x 26
x 27 Input 14(+)
Input 14(-) x 28
x 29 Input 15(+) JRA JRB
Input 15(-) x 30
x 31 Input 16(+) Cable to J4
Input 16(-) x 32
x 33 Input 17(+) on I/O Rack S
Input 17(-) x 34
Input 18(-) x 36
x 35 Input 18(+)
Input 19(-)
x 37 Input 19(+)
x 38
Input 20(-) x 40
x 39 Input 20(+)
Input 21(-)
x 41 Input 21(+)
x 42
x 43 Input 22(+)
Input 22(-) x 44
Input 23(-) x 46
x 45 Input 23(+)
Input 24(-) x 48
x 47 Input 24(+)
x Cable to J4
on I/O Rack R
Cable to J3
I/O Terminal Blocks with Barrier Terminals
on I/O Rack R
Terminal Blocks can be unplugged from
terminal board for maintenance
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-33
DTTC - Simplex DIN-rail Mounted Thermocouple
Terminal Board
The DTCC board is a compact terminal board, designed for DIN-rail mounting. The
board has 12 thermocouple inputs and connects to the VTCC thermocouple
processor board with a single 37-pin cable. This cable is identical to the one used on
the larger TBCC terminal board. The on-board signal conditioning and cold junction
reference are identical to those on the TBTC board.
An on-board ID chip Two DTTC boards can be connected to the VTCC for a total of 24 inputs, as shown
identifies the board to the in Figure 9-16. Only the Simplex version of the board is available. The terminal
VTCC for system diagnostic boards can be stacked vertically on the DIN-rail to conserve cabinet space. High
purposes. density Euro Block type terminal blocks are permanently mounted to the board with
two screw connections for the ground connection (SCOM). Every third screw
connection is for the shield.
Local
Cold Junction Excitation
JA1 J3
Reference (1)
24 Thermocouples
Remote Cold
Thermocouple Noise Suppression Junction
1 Pos References
2 Neg
3 Shld
Grounded or
Connectors at
ungrounded SCOM bottom of A/D Processor
(12) thermocouples VME rack
ID VMEbus
J4 Excit.
I/O Core
Processor
TMS320C32
Connector for cable
from second DTTC Sampling Type
terminal board A/D Converter
9-34 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
DTTC Board Installation
Shield screws are provided on The DTTC board slides into a plastic holder, which mounts on the DIN-rail.
this board, internally Thermocouples are wired directly to the terminal block as shown in Figure 9-17. The
connected to SCOM. Euro Block type terminal block has 42 terminals and is permanently mounted on the
terminal board. Typically #18 AWG wires are used. There are two screws for the
SCOM (ground) connection, which should be as short a distance as possible.
1 Input 1 (+)
Input 1 (-) 2
3 Input 1 Shld
Input 2 Shld 4
5 Input 2 (+)
37-pin "D" shell Input 2 (-) 6 Input 3 (+)
7
connector with latching JA1 Input 3 (-) 8
9 Input 3 Shld
fasteners Input 4 Shld 10
11 Input 4 (+)
Input 4 (-) 12
13 Input 5 (+)
Input 5 (-) 14
15 Input 5 Shld
Input 6 Shld 16
17 Input 6 (+)
Input 6 (-) 18
19 Input 7 (+)
Input 7 (-) 20
21 Input 7 Shld
Input 8 Shld 22
23 Input 8 (+)
Input 8 (-) 24
25 Input 9 (+)
Input 9 (-) 26
27 Input 9 Shld
Input 10 Shld 28
29 Input 10 (+)
Input 10 (-) 30
31 Input 11 (+)
Input 11 (-) 32
Cable to J3 33 Input 11 Shld
Input 12 Shld 34
connector in I/O 35 Input 12 (+)
Input 12 (-) 36
rack for the VTCC 37
38
39
board 40
41 Chassis Ground
Chassis Ground 42
SCOM
Euro Block type
terminal block
Plastic mounting
holder
DIN-rail mounting
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-35
VRTD/TRTDH1C (Simplex) - RTD Inputs
The RTD (Resistance Temperature Device) processor board (VRTD) accepts 16,
three-wire RTD inputs. These inputs are wired to two barrier type blocks on the RTD
terminal board (TRTD). Inputs to TRTD have noise suppression circuitry to protect
against surge and high frequency noise. Cables with molded fittings connect the
terminal board to the VME rack where the VRTD processor board is located.
VRTD converts the inputs to digital temperature values and transfers them over the
VME backplane to the VCMI, and then to the controller.
There are two versions of TRTD, the type shown in Figure 9-18, and a TMR version
that fans out the signals to three VRTD boards,
x
x
x 2
x 1 TRTD capacity for RUN
4
x 3 FAIL
8 RTD
x
x 5 16 RTD inputs STAT
x 6
Inputs x 8
x 7
x 10
x 9
x 12
x 11
x 14
x 13 VME Bus to VCMI
x 16 x 15
x 18
x 17
x 20
x 19 JA1 37-pin "D" shell
22
x 21
x
x 23 type connectors
x 24 with latching
x
fasteners
x
x 26
x 25
x 28
x 27
8 RTD x 30
x 29
Inputs 32
x 31
x
x 33 JB1
x 34
x 36
x 35
x 38
x 37 Cables to VME
x 40
x 39 I/O Rack
VRTD
x 42
x 41 x
x 44
x 43
x 46
x 45 Connectors on J3
x 48
x 47 VME I/O Rack
x
x
Shield
Bar
J4
BarrierType Terminal
Blocks can be unplugged
from board for
maintenance
Figure 9-18. RTD Input Terminal Board, I/O Board, and Cabling
9-36 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Operation
The terminal board supplies a 10 mA dc multiplexed (not continuous) excitation
current to each RTD, which can be grounded or ungrounded. The 16 RTDs can be
located up to 300 meters (984 feet) from the turbine control cabinet with a maximum
two-way cable resistance of 15 ohms. The RTD inputs and signal processing are
shown in Figure 9-19.
The VCO type A/D converter in the VRTD board uses voltage to frequency
converters and sampling counters. The converter samples each signal and the
excitation current four times per second for normal mode scanning, and 25 times per
second for fast mode scanning, using a time sample interval related to the power
system frequency. Linearization for the selection of 15 RTD types is performed in
software by the digital signal processor.
RTD open and short circuits are detected by out of range values. An RTD that is
determined to be out of hardware limits is removed from the scanned inputs in order
to prevent adverse affects on other input channels. Repaired channels are reinstated
automatically in 20 seconds, or can be manually reinstated.
Noise
J3 Excit.
Suppression JA1
Excitation
RTD
Signal NS
I/O Core
Return Processor
TMS320C32
Grounded or
ungrounded (8) RTDs Connectors
ID at
bottom of A/D Processor VMEbus
VME Bus
VME rack
Noise
JB1 J4 Excit.
Suppression
Excitation
RTD
Signal NS
Return VCO Type A/D
Grounded or Converter
(8) RTDs
ungrounded
ID
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-37
Features
RTD Limits
RTD inputs are supported over a full-scale input range of 0.3532 to 4.054 volts.
Table 9-11 shows the types of RTDs used and the temperature ranges.
Calibration
RTD inputs are automatically calibrated using the filtered calibration source and null
voltages.
Front panel
Three LEDs at the top of the VRTD front panel provide status information. The
normal RUN condition is a flashing green and FAIL is a solid red. The third LED is
normally off but shows a steady orange if a diagnostic alarm condition exists in the
board.
9-38 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Specification
Table 9-12. VRTD Specification
Item Specification
Number of Channels 16 channels per terminal board
16 channels per VRTD board
RTD Types 10, 100, and 200 ohm platinum
10 ohm copper
120 ohm nickel
Span 0.3532 to 4.054 volts
A/D Converter Resolution 14-bit resolution
Scan Time Normal scan 250 ms (4 Hz)
Fast scan 40 ms (25 Hz)
Power Consumption Less than 12 watts
Measurement Accuracy See Table 3-11
Common Mode Rejection Ac common mode rejection 60 dB @ 50/60 Hz
Dc common mode rejection 80 dB
Common Mode Voltage Range ± 5 Volts
Normal Mode Rejection Rejection of up to 250 mV rms is 60 dB @ 50/60 Hz
system frequency for normal scan
Maximum Lead Resistance 15 ohms maximum two way cable resistance
Fault Detection High/low (hardware) limit check
High/low (software) system limit check
Configuration Overview
Like all I/O boards, the RTD board is configured using the Control System Toolbox.
This software usually runs on a data-highway connected CIMPLICITY station or
workstation. Table 9-14 summarizes configuration choices and defaults. For details
refer to GEH-6403, Control System Toolbox for Configuring the Mark VI Turbine
Controller.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-39
Table 9-14. Typical VRTD Configuration
Group A Gain Gain 2.0 is for higher accuracy if ohms <190, first Normal_1.0
group of 8 inputs Gain_2.0
10 ohm Cu_10.0
Group B Rate Sampling rate and system frequency filter for second 4 Hz, 50 Hz filter
group of 8 inputs 4 Hz, 60 Hz filter
25 Hz
Group B Gain Gain 2.0 is for higher accuracy if ohms <190, Normal_1.0
second group of 8 inputs Gain_2.0
10 ohm Cu_10.0
9-40 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
TMR Diff Limt Limit condition occurs if 3 temperatures in R,S,T −60 to 1,300
differ by more than a preset value; this creates a
voting alarm condition.
Card Point Signals Description-Point Edit (Enter Signal Connection) Direction Type
L3DIAG_VRTD1 Card Diagnostic Input BIT
L3DIAG_VRTD2 Card Diagnostic Input BIT
L3DIAG_VRTD3 Card Diagnostic Input BIT
SysLim1RTD1 System Limit 1 Input BIT
: : Input BIT
SysLim1RTD16 System Limit 1 Input BIT
SysLim2RTD1 System Limit 2 Input BIT
: : Input BIT
SysLim2RTD16 System Limit 2 Input BIT
Diagnostics
Two types of diagnostic checking are applied to all inputs, Hardware Limit Checking
and System Limit Checking.
Each RTD type has Hardware Limit Checking based on preset (non-configurable)
high and low levels set near the ends of the operating range. If this limit is exceeded
a logic signal is set and the input is no longer scanned. If any one of the 16 input’s
hardware limits is set it creates a composite diagnostic alarm, L3DIAG_VRTD,
referring to the entire board. Details of the individual diagnostics are available from
the toolbox. The diagnostic signals can be individually latched, and then reset with
the RESET_DIA signal.
Each RTD input has System Limit Checking based on configurable high and low
levels. These limits can be used to generate alarms, and can be configured for
enable/disable, and as latching/nonlatching. RESET_SYS resets the out of limit
signals. In TMR systems limit logic signals are voted and the resulting composite
diagnostic is present in each controller.
Each connector has its own ID device, which is interrogated by the I/O board. The
board ID is coded into a read-only chip containing the terminal board serial number,
board type, revision number, and the JA1/JB1 connector location. The TMR board
version has six ID chips, one for each connector.
Descriptions of the VRTD diagnostics are in GEH-6421C, Vol. I Mark VI System
Guide, Chapter 8, Troubleshooting and Diagnostics.
Installation
The sixteen RTDs are wired directly to two I/O terminal blocks mounted on the
terminal board. Each block is held down with two screws and has 24 terminals
accepting up to #12 AWG wires, as shown in Figure 9-20. A shield termination strip
attached to chassis ground is located immediately to the left of each terminal block.
For grounded RTD operation, see application note in Figure 9-20.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-41
RTD Terminal Board TRTDH1C
x
x 25 Input 9 (Exc)
Input 9 (Sig) x 26
Input 10 (Exc)
x 27 Input 9 (Ret)
x 28 Cable to J3
Input 10 (Ret)
x 29 Input 10 (Sig)
x 30 on I/O Rack
x 31 Input 11 (Exc)
Input 11 (Sig) x 32 JB1
x 33 Input 11 (Ret)
Input 12 (Exc) x 34
Input 12 (Ret)
x 35 Input 12 (Sig)
x 36
x 37 Input 13 (Exc)
Input 13 (Sig) x 38 Second 8 TCs to JB1
x 39 Input 13 (Ret)
Input 14 (Exc) x 40
Input 14 (Ret)
x 41 Input 14 (Sig)
x 42
Input 15 (Sig)
x 43 Input 15 (Exc)
x 44
Input 16 (Exc)
x 45 Input 15 (Ret)
x 46
x 47 Input 16 (Sig)
Input 16 (Ret) x 48
x
Cable to J4
on I/O Rack
A Excxx
Application Note:
RTD - Optional Ground: connnect the "B" wire to ground;
- RTD Group wiring, that is sharing the "B" wire;
B Sigxx
tie the "B" wires together at the RTDs,
C
Retxx tie the "Sigxx" signals together at the TRTD termination
bboard, and interconnect with one wire.
9-42 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VRTD/TRTDH1B (TMR) - RTD Inputs
TRTDH1B provides redundant RTD inputs by fanning the inputs out to VRTD
boards in the R, S, and T racks, refer to Figure 9-21. The inputs meet the same
environmental, codes, resolution, suppression, and function requirements as with the
TRTD terminal board, however, the fast scan is not available.
All RTD signals have high frequency decoupling to ground at signal entry. RTD
multiplexing on the VRTD boards is coordinated by redundant pacemakers so that
the loss of a single cable or loss of a single VRTD does not cause the loss of any
RTD signals in the control database. VRTD boards in R, S, and T read RTDs
simultaneously, but skewed by two RTDs, so that when R is reading RTD3, S is
reading RTD5, and T is reading RTD7, and so on. This ensures that the same RTD is
not excited by two VRTDs simultaneously, and hence produce bad readings.
Signals
Terminal Board TRTDH1B PM= Pacemaker
Tx = VRTD Transmit
Rx = VRTD Receive
Noise
JRA
Suppression ID
Excitation
RTD PM, Tx
Signal NS PM, Rx, S
Return JSA
ID
Grounded or
ungrounded PM, Tx
(8) RTDs to JRA, JSA, JTA
PM, Rx, R
JTA
ID
PM, Tx
PM, Rx, R
Noise JRB
Suppression ID
Excitation
RTD PM, Tx
Signal NS PM, Rx, T
Return JSB
ID
Grounded or
ungrounded (8) RTDs to JRB, JSB, JTB PM, Tx
PM, Rx, T
JTB
ID
PM, Tx
PM, Rx, S
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-43
TRTDH1B can be configured for TMR or Simplex operation. When configured for
Simplex operation, the pacemaker is ignored. When configured for TMR operation
only the slow (4 Hz) scan rate is allowed.
Installation
The sixteen RTDs are wired directly to two I/O terminal blocks mounted on the
terminal board. Each block is held down with two screws and has 24 terminals
accepting up to #12 AWG wires, as shown in Figure 9-22. A shield termination strip
attached to chassis ground is located immediately to the left of each terminal block.
For grounded RTD wiring, refer to the Application Note in Figure 9-20.
Input 1 (Sig)
x 1 Input 1 (Exc) To J3
x 2
x 3 Input 1 (Ret) Rack T
Input 2 (Exc) x 4
x 5 Input 2 (Sig)
Input 2 (Ret) x 6
Input 3 (Sig) x 7 Input 3 (Exc)
x 8
x 9 Input 3 (Ret)
Input 4 (Exc) x 10
x 11 Input 4 (Sig) 8 circuits to
Input 4 (Ret) x 12
x 13 Input 5 (Exc) JRA,
Input 5 (Sig) x 14
x 15 Input 5 (Ret) JSA,
Input 6 (Exc) x 16
x 17 Input 6 (Sig) JTA JSA JSB
Input 6 (Ret) x 18 Cable to J4
x 19 Input 7 (Exc)
Input 7 (Sig) x 20 on I/O Rack T
Input 8 (Exc)
x 21 Input 7 (Ret)
x 22
Input 8 (Ret)
x 23 Input 8 (Sig) To J3
x 24
x Rack S
x
x 25 Input 9 (Exc)
Input 9 (Sig) x 26
x 27 Input 9 (Ret)
Input 10 (Exc) x 28
Input 10 (Ret)
x 29 Input 10 (Sig)
x 30
Input 11 (Sig)
x 31 Input 11 (Exc) JRA JRB
x 32 Cable to J4
x 33 Input 11 (Ret)
Input 12 (Exc) x 34 on I/O Rack S
x 35 Input 12 (Sig) 8 circuits to
Input 12 (Ret) x 36
Input 13 (Sig)
x 37 Input 13 (Exc) JRB,
x 38
Input 14 (Exc)
x 39 Input 13 (Ret) JSB,
x 40
x 41 Input 14 (Sig) JTB
Input 14 (Ret) x 42
x 43 Input 15 (Exc)
Input 15 (Sig) x 44
Input 16 (Exc)
x 45 Input 15 (Ret)
x 46
Input 16 (Ret) x 47 Input 16 (Sig)
x 48
x
Cable to J4
on I/O Rack R
Cable to J3
on I/O Rack R
9-44 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
DRTD - Simplex DIN-rail Mounted RTD Terminal Board
The DRTD board is a compact RTD terminal board, designed for DIN-rail mounting.
The board has eight RTD inputs and connects to the VRTD processor board with a
single 37-pin cable, as shown in Figure 9-23. This cable is identical to those used on
the larger TRTD terminal board. The terminal boards can be stacked vertically on the
DIN-rail to conserve cabinet space. Two DRTD boards can be connected to the
VRTD for a total of 16 temperature inputs. Only a Simplex version of the board is
available.
The on-board noise suppression is similar to that on the TRTD. High density Euro
Block type terminal blocks are permanently mounted to the board, with two screw
connections for the ground connection (SCOM). An on-board ID chip identifies the
board to the VRTD for system diagnostic purposes.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-45
Installation
There is no shield termination The DRTD board slides into a plastic holder, which mounts on the DIN-rail. The
strip with this design. eight RTDs are wired directly to the terminal block as shown in Figure 9-24. The
Euro Block type terminal block has 36 terminals and is permanently mounted on the
terminal board. Typically #18 AWG wires (shielded twisted triplet) are used.
Terminals 25 through 34 are spares. There are two screws for the SCOM (ground)
connection, which should be as short a distance as possible. For wiring grounded
RTDs, see the section, Installation for the TRTD board.
DRTD
Screw Connections
1 Input 1 (Excitation)
Input 1 (Signal) 2
3 Input 1 (Return)
Input 2 (Excitation) 4
5 Input 2 (Signal)
37-pin "D" shell Input 2 (Return) 6 Input 3 (Excitation)
JA1 Input 3 (Signal) 7
connector with latching 8
9 Input 3 (Return)
fasteners Input 4 (Excitation) 10
11 Input 4 (Signal)
Input 4 (Return) 12
13 Input 5 (Excitation)
Input 5 (Signal) 14
15 Input 5 (Return)
Input 6 (Excitation) 16
17 Input 6 (Signal)
Input 6 (Return) 18
19 Input 7 (Excitation)
Input 7 (Signal) 20
21 Input 7 (Return
Input 8 (Excitation) 22
23 Input 8 (Signal)
Input 8 (Return) 24
25
26
27
28
29
30
31
32
Cable to J3 or J4 33
34
connector in I/O rack 35 Chassis Ground
Chassis Ground 36
for VRTD board
SCOM
Euro Block type
terminal block
Plastic mounting
holder
DIN-rail mounting
9-46 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VAIC/TBAI - Analog Inputs
The Analog Input Board (VAIC) accepts 20 analog inputs and controls four analog
outputs. Ten inputs and two outputs are wired to each Analog Input Terminal board
(TBAI). Inputs and outputs have noise suppression circuitry to protect against surge
and high frequency noise. Cables connect the terminal board to the VME rack where
the VAIC processor board is located, as shown in Figure 9-25.
The VAIC converts the inputs to digital values and transfers these over the VME
backplane to the VCMI, and then to the controller.
Input signals are fanned out to three VME board racks R, S, and T for TMR
applications. The VAIC requires two terminal boards to monitor 20 inputs.
x
x x
x
x JT1 JT1
x 2
x 1 x 2 x 1 37-pin "D" shell RUN
x 3 4
x 3 type connectors FAIL
x 4 x
STAT
x 5 x 5
x 6 x 6 with latching
x 7 8
x 7
x 8 x
fasteners
x 9 10
x 9
x 10 x
x 11 12
x 11
x 12 x
x 13 14
x 13
x 14 x
x 15 16
x 15
x 16 x
x 17 18
x 17
x 18 x
VME Bus to VCMI
x 19 JS1 20
x 19 JS1
x 20 x
x 21 22
x 21
x 22 x
x 23 To 24
x 23
x 24 x
x Rack x
T
x x
x 25 26
x 25 Cable to VME
x 26 x
x 27 28
x 27
x 28 x
29
Rack T
x 29 30 x
x 30 To x
31
32
x 31 32
x
x
x 33 JR1 Rack x
x 33 JR1 Cable to VME
x 34 x 34
x 35 S 36
x 35 Rack S
x 36 x
x 37 38 x 37
x 38 x
x 39 40
x 39 VAIC
x 40 x
x 41 42
x 41 x
x 42 x
x 43 44
x 43
x 44 x
x 45 46
x 45 Connectors on
x 46 x J3
x 47 48
x 47 VME Rack
x 48 x
x x
x x
Shield
Bar
J4
BarrierType Terminal
Blocks can be unplugged Cables to VME
from board for maintenance Rack R
Figure 9-25. Analog Input Terminal boards, I/O Board, and Cabling (TMR System)
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-47
Operation
24 V dc power is available on the terminal board for all the transducers, and there is
a choice of current or voltage inputs using jumpers. One of the two analog output
circuits is 4 − 20 mA, and the other can be jumper configured for 4 − 20 mA or
0 − 200 mA. The same terminal board can be used for TMR applications.
The VAIC board accepts 20 analog inputs, controls four analog outputs, and contains
signal conditioning, an analog MUX, A/D converter, and D/A converter, as shown in
Figure 9-26.
PCOM Connectors
2 Circuits per at
Termination Board bottom of
VME rack
P28V
+24 V dc Current Limit Excitation
1 ma J#A JR1 J3/4
+/-1 ma N
S 20 ma
4-20 ma 250
ohm
5k ohms
Return
J#B
Return
Open
Current
Two Output Circuits Regulator/
Jump select on one Power Supply
circuit only; #2 Circuit 200 ma
is 4-20 ma only
JO
Signal 20 ma
Maximum Load
N
0-200 ma, 50 ohms
4-20 ma, 500 ohms S
Return
ID
SCOM
9-48 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
In a TMR system, analog inputs fanout to the three control racks from JR1, JS1, and
JT1. The 24 V dc power to the transducers comes from all three VAIC boards and is
diode shared on the terminal board. Each analog current output is fed by currents
from all three VAIC, as shown in Figure 9-27.
The actual output current is measured with a series resistor, which feeds a voltage
back to each control rack. The resulting output is the voted middle value of the three
currents.
PCOM
Connectors
at
2 Circuits per bottom of
Termination Board VME rack
P28VR
+24 Vdc Current Limit Excitation
+/-1 ma 1 ma J#A JR1 J3/J4
N Filter 2 Pole
4-20 ma S 20 ma
250
ohm 5k ohms
Return
J#B
Open Return
PCOM S ID Current
T Regulator/
Two Output Circuits JO Power Supply
#2 Circuit is 4-20 200 ma
ma only
Signal 20 ma
Maximum Load
0-200 ma, 50 ohms N S JS1
S T
4-20 ma, 500 ohms
Return
SCOM
ID
JT1 To Rack<S>
To Rack<T>
ID
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-49
Features
The VAIC analog input/output capacity, using two TBAI terminal boards, is shown
in Table 9-15.
Table 9-15. Quantity and Types of VAIC Analog Inputs and Outputs
Noise Filtering
Hardware filters on the terminal board suppress high frequency noise. Additional
software filters on VAIC provide configurable low pass filtering. With the above
noise suppression and filtering, the input ac common mode rejection (CMR) is 60
dB, and the dc CMR is 80 dB.
Front panel
Three LEDs at the top of the VAIC front panel provide status information. The
normal RUN condition is a flashing green, and FAIL is a solid red. The third LED is
normally off but displays a steady orange if a diagnostic alarm condition exists in the
board.
Specification
Table 9-16. VAIC Board Specifications
Item Specification
Number of Channels 12 channels per terminal board (10 AI, 2 AO)
24 channels per VAIC board (20 AI, 4 AO)
Input Span 1 – 5 V dc
Input Converter Resolution 16-bit A/D converter with 14-bit resolution
Scan Time Normal scan 10 ms (100 Hz)
Inputs 1 through 4 available for scan at 200 Hz
Measurement accuracy Better than 0.1% full scale
Noise Suppression on inputs The first ten circuits (J3) have a hardware filter with single
pole down break at 500 radians/second.
The second ten circuits (J4) have a hardware filter with a
two pole down break at 72 and 500 rad/second.
A software filter, using a two pole low pass filter, is
configurable for 0, .75, 1.5 Hz, 3 Hz, 6 Hz, 12 Hz
Common mode rejection Ac common mode rejection 60 dB @ 60 Hz, with up to ± 5
volt common mode voltage.
Dc common mode rejection 80 dB with from −5 to +7 peak
volt common mode voltage.
9-50 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Table 9-16. VAIC Board Specifications Continued
Item Specification
Common mode voltage range ± 5 Volts (± 2 Volt CMR for the ± 10 Volt inputs)
Maximum lead resistance 15 ohms maximum two-way cable resistance, cable length
up to 300m (984 ft)
Output Converter 12-bit D/A converter with 0.5% accuracy
Output Load 500 ohms for 4−20 mA output
50 ohms for 200 mA output
Power consumption Less than 31 watts
Compressor Stall Detection Detection and relay operation within 30 sec
Fault detection Monitor D/A outputs, output currents, and total current
Monitor suicide relays and 20/200 mA scaling relays
Diagnostics
Each analog input has Hardware Limit Checking based on preset (non-configurable)
high and low levels set near the ends of the operating range. If this limit is exceeded
a logic signal is set and the input is no longer scanned. If any one of the input’s
hardware limits is set, it creates a composite diagnostic alarm, L3DIAG_VAIC,
which refers to the entire board. Details of the individual diagnostics are available
from the toolbox. The diagnostic signals can be individually latched, and then reset
with the RESET_DIA signal.
Each input has System Limit Checking based on configurable high and low levels.
These limits can be used to generate alarms, and can be configured for
enable/disable, and as latching/nonlatching. RESET_SYS resets the out of limits.
Details of the diagnostics are in GEH-6421C, Vol. I Mark VI System Guide, Chapter
8, Troubleshooting and Diagnostics.
The TBAI terminal board has its own ID device, which is interrogated by the I/O
board. The board ID is coded into a read-only chip containing the terminal board
serial number, board type, revision number, and the JR, JS, JT connector location.
Configuration Overview
Table 9-17 summarizes configuration choices and defaults. For details refer to GEH-
6403, Control System Toolbox for Configuring the Mark VI Turbine Controller.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-51
Table 9-17. Typical VAIC Configuration
9-52 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Sys Lim 2 Latch Input fault latch Latch, Unlatch
Sys Lim 2 Type Input fault type Greater Than or Equal
Less Than or Equal
Sys Lim 2 Input limit in Engineering Units −3.4082e+038 to 3.4028e+038
AnalogOut1 First of two analog outputs - Card Point Point Edit (Output FLOAT)
Output_MA Type of output current Unused, 0−20 mA, 0−200 mA
Low_MA Output mA at low value 0 to 200 mA
Low_Value Output in Engineering Units at low mA −3.4082e+038 to 3.4028e+038
High_MA Output mA at high value 0 to 200 mA
High_Value Output value in Engineering Units at high mA −3.4082e+038 to 3.4028e+038
TMR Suicide Suicide for faulty output current, TMR only Enable, Disable
Diff Limit Current difference for suicide, TMR only 0 to 200 mA
D/A Err Limit Difference between D/A reference and output, in % 0 to 100 %
for suicide, TMR only
J4:IS200TBAIH1A Terminal board connected to VAIC via J4 Connected, Not Connected
AnalogIn11 First of 10 Analog Inputs - Card Point Point Edit (Input FLOAT)
AnalogOut3 First of two analog outputs - Card Point Point Edit (Output FLOAT)
Card Points (Signals) Description – Point Edit (Enter Signal Connection) Direction Type
L3DIAG_VAIC1 Card diagnostic Input BIT
L3DIAG_VAIC2 Card diagnostic Input BIT
L3DIAG_VAIC3 Card diagnostic Input BIT
SysLimit1_1 System Limit 1 Input BIT
: : Input BIT
SysLimit1_20 System Limit 1 Input BIT
SysLimit2_1 System Limit 2 Input BIT
: : Input BIT
SysLimit2_20 System Limit 2 Input BIT
OutSuicide1 Status of Suicide Relay for Output 1 Input BIT
: : Input BIT
OutSuicide4 Status of Suicide Relay for Output 4 Input BIT
DeltaFault Excessive difference pressure Input BIT
CompStall Compressor Stall Input BIT
Out1MA Feedback, Total Output Current, mA Input FLOAT
: : Input FLOAT
Out4MA Feedback, Total Output Current, mA Input FLOAT
CompPressSel Selected Compressor Press, by Stall Algo. Input FLOAT
PressRate Sel Selected Compressor Press rate, by Stall Algor. Input FLOAT
CompStallPerm Compressor Stall Permissive Output BIT
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-53
Installation
The 10 inputs and two outputs are wired directly to two I/O terminal blocks mounted
on the terminal board. Each block is held down with two screws and has 24 terminals
accepting up to #12 AWG wires. A shield termination strip attached to chassis
ground is located immediately to the left of each terminal block.
The types of analog inputs and outputs that can be accommodated are as follows:
• Analog input, two-wire transmitter
• Analog input, three-wire transmitter
• Analog input, four-wire transmitter
• Analog input, externally powered transmitter
• Analog input, voltage ±5 V, 10 V dc
• Analog output, 20 mA
• Analog output, 200 mA
The various types are selected with jumpers, as shown in Figure 9-28.
9-54 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Board Jumpers JT1
Analog Input Terminal Board TBAI
Circuit Jumpers
20ma/VDC OPEN/RET
x
x 1 Input 1 (24V) Input 1 J1A J1B
Input 1 (20ma) x 2
Input 1 (Ret)
x 3 Input 1 (Vdc)
x 4
x 5 Input 2 (24V) Input 2 J2A J2B
Input 2 (20ma) x 6
Input 2 (Ret)
x 7 Input 2 (Vdc)
x 8
Input 3 (20ma)
x 9 Input 3 (24V) Input 3 J3A J3B
x 10
x 11 Input 3 (Vdc) To I/O
Input 3 (Ret) x 12
Rack
Input 4 (20ma)
x 13 Input 4 (24V) Input 4 J4A J4B
x 14 T
Input 4 (Ret)
x 15 Input 4 (Vdc)
x 16
x 17 Input 5 (24V) Input 5 J5A J5B JS1
Input 5 (20ma) x 18
x 19 Input 5 (Vdc)
Input 5 (Ret) x 20
x 21 Input 6 (24V) Input 6 J6A J6B
Input 6 (20ma) x 22
Input 6 (Ret)
x 23 Input 6 (Vdc)
x 24
x
x
x 25 Input 7 (24V) Input 7 J7A J7B
Input 7 (20ma) x 26
Input 7 (Ret)
x 27 Input 7 (Vdc)
x 28 To I/O
Input 8 (20ma)
x 29 Input 8 (24V) Input 8 J8A J8B
x 30 Rack
x 31 Input 8 (Vdc) 20ma/1 ma OPEN/RET
Input 8 (Ret) x 32 S
x 33 Input 9 (24V) Input 9 J9A J9B JR1
Input 9 (20ma) x 34
Input 9 (Ret)
x 35 Input 9 (1ma)
x 36
Input 10 (20ma)
x 37 Input 10 (24V) Input 10 J10A J10B
x 38
Input 10 (Ret)
x 39 Input 10 (1ma)
x 40
x 41
x 42
x 43 20ma/200ma
x 44
Output 1 (Ret)
x 45 Output 1 (Sig) Output 1 J0
x 46
Output 2 (Ret) x 47 Output 2 (Sig) Output 2 No Jumper (0-20ma)
x 48
To I/O
x
Rack
R
Two-Wire +24 V dc Three-wire +24 V dc
transmitter transmitter wiring
wiring 4-20ma Voltage input VDC J#A 4-20 ma Voltage input VDC J#A
T
4-20 ma 20 ma 4-20 ma 20 ma
T
Return Return
Open J#B Open J#B
PCOM
4-20 ma 20 ma T 4-20 ma 20 ma
+ +
Power
T Return Signal Return
Supply - -
Open J#B Max. common Open J#B
mode voltage Misc return PCOM
is 7.0 V dc to PCOM
PCOM
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-55
DTAI - Simplex DIN-rail Mounted Analog Input Terminal
Board
The DTAI board is a compact analog input terminal board, designed for DIN-rail
mounting. The board has 10 analog inputs and two analog outputs, and connects to
the VAIC processor board with a single 37-pin cable, as shown in Figure 9-29. This
cable is identical to those used on the larger TBAI terminal board. The terminal
boards can be stacked vertically on the DIN-rail to conserve cabinet space.
Two DTAI boards can be connected to the VAIC for a total of 20 analog inputs and
four analog outputs. Only a Simplex version of the board is available.
The functions and on-board noise suppression are the same as those on the TBAI.
High density Euro Block type terminal blocks are permanently mounted to the board,
with two screw connections for the ground connection (SCOM). An on-board ID
chip identifies the board to the VAIC for system diagnostic purposes.
<R> Module
DTAI Board
Controller
8 Circuits per Terminal
Application Software
Typical transmitter, Noise Board
Mark VI powered Suppr-
ession
+24 V dc 1 P28V
Current Limit
Voltage input 3 J1A Analog Input
N Vdc
T (+/-5,10 V dc) Board VAIC
4-20 ma 2 S 20 ma
250 ohms A/D D/A
Return 4
(For other J1B
transmitter hookups, Open Return
see Fig. 10-7) PCOM
41
PCOM Connectors
43 at
SCOM
bottom of
2 Circuits per Terminal
VME rack
Board
33 P28V
+24 V dc Current Limit Excitation
+/-1 ma 35 1 ma J9A JR1 J3/4
N
4-20 ma 34 S 20 ma
250
5k ohms
Return 36 ohm
J9B
Open Return
PCOM Current
Regulator/
Jump select on one Two Output Circuits Power
circuit only; #2 200 ma JO Supply
Circuit is 4-20 ma
only 20 ma
Signal 45
Maximum Load
N
4-20 mA, 500 ohms 46 S
0-200 mA, 50 ohms
Return SCOM ID
9-56 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Installation
There is no shield termination The DTAI board slides into a plastic holder, which mounts on the DIN-rail. The
strip with this design. Euro Block type terminal block has 48 terminals and is permanently mounted on the
board. Typically #18 AWG wires (shielded twisted pair) are used. There are two
screws for the SCOM (ground) connection, which should be as short a distance as
possible.
DTAI
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-57
VAOC/TBAO - Analog Outputs
The Analog Output Board (VAOC) controls 16 analog, 20 mA, outputs. These
outputs are wired to two barrier type blocks on the Analog Output Terminal board
(TBAO). Noise suppression circuitry to protect against surge and high frequency
noise is mounted on the terminal board. Cables with molded plugs connect the
terminal board to the VME rack where the VAOC processor board is located. The
VAOC receives digital values from the controller over the VME backplane from the
VCMI, and converts these to analog output currents.
Note that for TMR applications control signals are fanned into the same terminal
board from three VME board racks R, S, and T, as shown in Figure 9-31. Six cables
are required to support all 16 outputs with TMR.
x
x 26 x 25
28
x 27 Cables to VME
8 Analog x
x 29
x 30 Rack S
Outputs x 32
x 31
x 33 JR1 JR2
x 34
x 36 x 35
x 38
x 37
x 40 x 39 VAOC
x 42
x 41 x
x 44
x 43
46
x 45 Connectors on
x
x 47 J3
x 48 VME Rack R
x
x
Shield
Bar
J4
Figure 9-31. Analog Output Terminal board, I/O Board, and Cabling
9-58 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Operation
The terminal board supports 16 analog outputs. Driven devices have a maximum
resistance of 500 ohms and can be located up to 300 meters (984 feet) from the
turbine control cabinet. VAOC in the VME rack contains the D/A converter and
driver which generates the controlled currents, as shown in Figure 9-32. The output
current is controlled by the voltage drop across a resistor on the terminal board.
<R> Module
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-59
In a TMR system, each analog current output is fed by the sum of the currents from
the three VAOCs, as shown in Figure 9-33. The total output current is measured with
a series resistor which feeds a voltage back to each control rack and VAOC. The
resulting output is the voted middle value of the three currents. If one output fails,
the other two pickup the current to the correct value. If one output fails high, it is
disconnected by the suicide relay.
16 Return Circuit #8
Same for
<T>
ID
17 Signal
J4 JR2
18 Return Circuit #9
19 Signal
Same for 20 Return Circuit #10
<R> 21 Signal
ID
22 Return Circuit #11
J4 JS2 23 Signal
Second group of 24 Circuit #12
Return
(8) 0-20ma outputs Same for
Group 2 25 Signal
<S>
26 Return Circuit #13
ID 27 Signal
9-60 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Features
Each output is monitored by diagnostics. Voltage drops across the local and outer
loop current sense resistors, at the control reference, D/A outputs, and at the suicide
relay contacts are sampled and digitized. In the event of a malfunction that cannot be
cleared by a command from the processor, the circuit is disconnected by opening the
suicide relay contacts. This isolation function is only operational when configured
for TMR operation. Filters reduce high frequency noise and suppress surge on each
output near the point of signal exit.
Front panel
Three LEDs at the top of the VAOC front panel provide status information. The
normal RUN condition is a flashing green, and FAIL is a solid red. The third LED is
normally off but displays a steady orange if a diagnostic alarm condition exists in the
board.
Specification
Table 9-18. VAOC Specification
Item Specification
Number of Channels 16 current output channels, single ended (one side
connected to common)
Analog Outputs 0−20 mA, up to 500 ohm burden
Response better than 50 rad/sec
D/A Converter Resolution/Accuracy 12-bit resolution with 0.5% accuracy
Frame Rate 100 Hz on all 12 outputs
Fault detection Local current
Outer total (TMR) current
D/A converter output
Suicide relay operation
Diagnostics
Standard diagnostic information is available on the inputs and outputs, including
high and low limit checks, and high and low system limit checks (configurable). If
any one of the 16 outputs goes unhealthy a composite diagnostic alarm,
L3DIAG_VAOC, occurs. Details of the individual diagnostics are available from the
toolbox. The diagnostic signals can be individually latched, and then reset with the
RESET_DIA signal if they go healthy.
Each cable connector on the terminal board has its own ID device which is
interrogated by the I/O board. The ID device is a read-only chip coded with the
terminal board serial number, board type, revision number, and the JR, JS, JT
connector location.
Configuration Overview
Like all I/O boards, the VAOC board is configured using the Control System
Toolbox. This software usually runs on a data-highway connected CIMPLICITY
station or workstation. Table 9-19 summarizes the configuration choices. Refer to
GEH-6403, Control System Toolbox for Configuring the Mark VI Turbine
Controller.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-61
Table 9-19. Typical VAOC Configuration
Card Points Signals Description–Point Edit (Enter Signal Connection) Direction Type
L3DIAG_VAOC1 Card Diagnostic Input BIT
L3DIAG_VAOC2 Card Diagnostic Input BIT
L3DIAG_VAOC3 Card Diagnostic Input BIT
OutSuicide1 Status of Suicide Relay for Output 1 Input BIT
: : Input BIT
OutSuicide16 Status of Suicide Relay for Output 16 Input BIT
Out1MA Measure Total Output Current in mA Input FLOAT
: : Input FLOAT
Out16MA Measure Total Output Current in mA Input FLOAT
Installation
The 16 analog outputs are wired directly to two I/O terminal blocks mounted on the
terminal board, as shown in Figure 9-34. Each block is held down with two screws
and has 24 terminals accepting up to #12 AWG wires. A shield termination strip
attached to chassis ground is located immediately to the left of each terminal block.
9-62 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Analog Output Terminal Board TBAO
JT1 JT2
Output 1 (Return)
x 1 Output 1 (Signal)
x 2
x 3 Output 2 (Signal)
Output 2 (Return) x 4
Output 3 (Return) x 5 Output 3 (Signal)
x 6
Output 4 (Return) x 7 Output 4 (Signal)
x 8 To J4
x 9 Output 5 (Signal)
Output 5 (Return) x 10 on I/O
x 11 Output 6 (Signal)
Output 6 (Return) x 12 Rack T
x 13 Output 7 (Signal)
Output 7 (Return) x 14
Output 8 (Return)
x 15 Output 8 (Signal)
x 16
x 17 Output 9 (Signal) JS1 JS2 To J3
Output 9 (Return) x 18
x 19 Output 10(Signal) on I/O
Output 10(Return) x 20
x 21 Output 11(Signal) Rack T
Output 11(Return) x 22
Output 12(Return)
x 23 Output 12(Signal)
x 24
x
x To J4
x 25 Output 13 (Signal) on I/O
Output 13(Return) x 26
x 27 Output 14 (Signal) Rack S
Output 14(Return) x 28
Output 15(Return)
x 29 Output 15 (Signal)
x 30
Output 16(Return)
x 31 Output 16 (Signal) To J3
x 32 JR1 JR2
x 33 on I/O
x 34
x 35 Rack S
x 36
x 37
x 38
x 39
x 40
x 41
x 42
x 43
x 44
x 45 To J4
x 46
x 47 on I/O
x 48
x
Rack R
To J3
on I/O
Rack R
I/O Terminal Block with Barrier Terminals
Terminal Blocks can be unplugged from
terminal board for maintenance
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-63
DTAO - Simplex DIN-rail Mounted Analog Output
Terminal Board
The DTAO board is a compact analog output terminal board, designed for DIN-rail
mounting. The DTAO board has eight analog outputs, and connects to the VAOC
processor board with a single 37-pin cable, as shown in Figure 9-35. This cable is
identical to those used on the larger TBAO terminal board.
The terminal boards can be stacked vertically on the DIN-rail to conserve cabinet
space. Two DTAO boards can be connected to the VAOC for a total of 16 analog
outputs. Only a Simplex version of this board is available.
The functions and on-board noise suppression are the same as those on TBAO. High
density Euro Block type terminal blocks are permanently mounted to the board, with
two screw connections for the ground connection (SCOM). An on-board ID chip
identifies the board to the VAOC for system diagnostic purposes
Sensing
To second DTAO
terminal board
Connectors at
bottom of VME rack
9-64 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Installation
There is no shield termination The DTAO board slides into a plastic holder, which mounts on the DIN-rail. The
strip with this design. eight analog outputs are wired directly to the terminal block as shown in Figure 9-
36. The Euro Block type terminal block has 36 terminals and is permanently
mounted on the terminal board. Typically #18 AWG wires (shielded twisted pair)
are used. There are two screws for the SCOM (ground) connection which should be
as short a distance as possible.
DTAO
1 Output 1 (Signal)
Output 1 (Return) 2
3 Output 2 (Signal)
Output 2 (Return) 4
5 Output 3 (Signal)
37-pin "D" shell Output 3 (Return) 6
JR1 7 Output 4 (Signal)
connector with Output 4 (Return) 8
9 Output 5 (Signal)
latching fasteners Output 5 (Return) 10
11 Output 6 (Signal)
Output 6 (Return) 12
13 Output 7 (Signal)
Output 7 (Return) 14
15 Output 8 (Signal)
Output 8 (Return) 16
17 Chassis Ground
Chassis Ground 18
19
20
21
22
23
SCOM 24
25
26
27
28
29
30
Cable to J3 or J4 31
32
connector in I/O 33
34
rack for VAOC 35
36
board
Plastic mounting
holder
DIN-rail mounting
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-65
VCCC/TBCI - Contact Inputs
The Contact Input/Relay Output Board (VCCC) with its associated daughter board,
accepts 48 discrete inputs and controls 24 relay outputs. VCCC is a double width
module and connects to two sets of J3/J4 plugs via the VME backplane as shown in
Figure 9-37. The Contact Input Terminal board (TBCI) accepts 24 dry contact
inputs, and two boards are required to support 48 inputs. The Relay Output Terminal
board (TRLY) controls 12 relays and is described in the next section.
VCRC is a single slot version of VCCC with the same functionality. Contact input
cables plug into the front of the board, as discussed in the VCRC section.
VME Rack
J1
VCCC
VCCC Daughter Board
Board
J2 J2
J4 J4
Terminal Boards
TB3 JF1 JF2 TB3 JF1 JF2 JE1 JE2 JE1 JE2
Power Plugs Power Plugs Power Plugs Power Plugs
Figure 9-37. Boards and Cabling for Contact Inputs and Relay Outputs, Simplex
9-66 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
The first 24 dry contact inputs are wired to two barrier type blocks on the TBCI, and
a second terminal board is required for inputs 25 − 48. Dc power for the contacts is
provided. Contact inputs have noise suppression circuitry to protect against surge
and high frequency noise. Cables with molded plugs connect the terminal board to
the VME rack where the VCCC processor board is located, as shown in Figure 9-38.
x
x
x 37-pin "D" shell
x 1
JT1 type connectors
x 2 RUN
x 4
x 3 with latching FAIL
x 6
x 5 fasteners STAT
12 Contact x 7 JE1 JE2
x 8
Inputs x 10
x 9
x 12
x 11 VME Bus to VCMI
x 14 x 13
x 16
x 15
x 18
x 17
x 20
x 19 JS1
x 21 Cable to VME
x 22
x 24
x 23 Rack T
x
x
x 25 Cable to VME
x 26
x 28
x 27 Rack S
x 29
12 Contact x 30
32
x 31
Inputs x
x 33 JR1
x 34
x 36
x 35
x 38
x 37
x 40
x 39 Cable to VME VCCC
x 42
x 41 Rack R x
x 44
x 43
x 46
x 45
x 47 Connectors on J3 J3
x 48
x VME Rack R
x
Shield
Bar
J4 J4
Figure 9-38. Contact Input Terminal board, I/O Board, and Cabling
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-67
Operation
The VCCC passes the input voltages through optical isolators and transfers the
signals over the VME backplane to the VCMI. The VCMI then sends them to the
controller. The contact input processing is shown in Figure 9-39.
The dry contact inputs are powered from a floating 125 V dc (100 − 145 V dc)
supply from the turbine control. Power converters convert the 115/230 V ac and/or
125 V dc power sources to a redundant, internal 125 V dc bus to power the
electronics. The 125 V dc bus is current limited in the Power Distribution Module
prior to feeding each contact input.
A pair of termination points is provided for each input with one point (screw)
providing the positive dc source and the second point providing the return (input) to
the board. The current loading is 2.5 mA per point for 21 of the inputs on each
terminal board, and the other three have a 10 mA load to support interface with
remote solid-state output electronics.
9-68 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Each input is optically isolated and sampled at frame rate for control functions, and
at 1ms for sequence of events (SOE) reporting. A 4 ms hardware filter is used, and
noise rejection is 60 V rms at 125 V dc excitation. Contact input circuitry is designed
for NEMA Class G creepage and clearance.
For TMR applications contact input voltages are fanned out to three VME board
racks R, S, and T via plugs JR1, JS1, and JT1, as shown in Figure 9-40. The signals
are processed by the three VCCC and the results voted by the VCMI board in each
controller rack.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-69
Features
Sequence of Events
High speed scanning and recording at 1 ms rate is available for inputs monitoring
important turbine variables. The sequence of events recorder reports all contact
openings and closures with a time resolution of 1 ms. Contact chatter and pulse
widths down to 6 ms are reported.
Noise Filtering
Filters reduce high frequency noise and suppress surge on each input near the point
of signal exit. Noise and contact bounce is filtered with a 4 ms filter. AC voltage
rejection (50/60 Hz) is 60 V rms with 125 V dc excitation.
Front panel
Three LEDs at the top of the VCCC front panel provide status information. The
normal RUN condition is a flashing green, FAIL is a solid red. The third LED is
normally off but shows a steady orange if a diagnostic alarm condition exists in the
board.
Specification
Table 9-20. VCCC Specification
Item Specification
Number of Channels 48 dry contact voltage input channels (24 per terminal board)
Excitation Voltage Nominal 125 V dc, floating, ranging from 100 to 145 V dc
Input Current For 125 V dc applications:
First 21 circuits draw 2.5 mA (50 kohms)
Last three circuits draw 10 mA (12.5 kohms)
Isolation Optical Isolation to 1500 volts on all inputs
Input Filter Hardware filter, 4 ms
AC Voltage Rejection 60 V rms @ 50/60 Hz at 125 V dc excitation
Frame Rate System dependent scan rate for control purposes
1,000 Hz scan rate for Sequence of Events monitoring
Power consumption 20.6 watts on the terminal board
NA watts in the VCCC board
Fault detection Loss of contact input excitation voltage
Non-responding contact input in test mode
Unplugged cable
Configuration Overview
Like all I/O boards, the VCCC is configured using the toolbox. This software usually
runs on a data-highway connected CIMPLICITY station or workstation. Table 9-21
summarizes configuration choices and defaults. Refer to GEH-6403, Control System
Toolbox for Configuring the Mark VI Turbine Controller.
9-70 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Table 9-21. Typical VCCC (Contact Input) Configuration
Diagnostics
The dry (isolated) external contacts are monitored, and also the excitation voltage. If
the excitation drops to below 40% of the nominal voltage, a diagnostic alarm is set
and latched. All inputs associated with this TB are forced to the open contact (fail
safe) state. Any input that fails the diagnostic test is forced to the failsafe state.
If any one of the 48 inputs goes unhealthy a composite diagnostic alarm,
L3DIAG_VCCC occurs. Details of the individual diagnostics are available from the
toolbox. The diagnostic signals can be individually latched, and then reset with the
RESET_DIA signal if they go healthy.
Each terminal board connector has its own ID device which is interrogated by the
I/O board. The board ID is coded into a read-only chip containing the board serial
number, board type, revision number, and the JR1/JS1/JT1 connector location. Refer
to GEH-6421C, Vol. I Mark VI System Guide, Chapter 8, Troubleshooting and
Diagnostics
Installation
The 24 dry contact inputs are wired directly to two I/O terminal blocks mounted on
the terminal board. Each block is held down with two screws and has 24 terminals
accepting up to #12 AWG wires. A shield termination strip attached to chassis
ground is located immediately to the left of each terminal block. The 125 V dc
excitation voltage is cabled in through plugs JE1 and JE2, as shown in Figure 9-41.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-71
Contact Input Terminal Board TBCI 1 1
JT1
x
3 3
Input 1 (Return)
x 1 Input 1 (Positive) JE1 JE2
x 2
x 3 Input 2 (Positive)
Input 2 (Return) x 4
x 5 Input 3 (Positive) Contact Excitation
Input 3 (Return) 6
Input 4 (Positive) Source, 125 Vdc
x
Input 4 (Return) x 7
x 8
Input 5 (Return)
x 9 Input 5 (Positive)
x 10
x 11 Input 6 (Positive)
Input 6 (Return) x 12
x 13 Input 7 (Positive) To Rack T
Input 7 (Return) x 14
Input 8 (Return)
x 15 Input 8 (Positive)
x 16
Input 9 (Return)
x 17 Input 9 (Positive)
x 18 JS1
x 19 Input 10 (Positive)
Input 10(Return) x 20
x 21 Input 11 (Positive)
Input 11(Return) x 22
Input 12(Return) x 23 Input 12 (Positive)
x 24
x
x
x 25 Input 13 (Positive)
Input 13 (Return) x 26
x 27 Input 14 (Positive)
Input 14 (Return) x 28
Input 15 (Return)
x 29 Input 15 (Positive) To Rack S
x 30
x 31 Input 16 (Positive)
Input 16 (Return) x 32 JR1
x 33 Input 17 (Positive)
Input 17 (Return) x 34
x 35 Input 18 (Positive)
Input 18 (Return) x 36
x 37 Input 19 (Positive)
Input 19 (Return) x 38
Input 20 (Return)
x 39 Input 20 (Positive)
x 40
x 41 Input 21 (Positive)
Input 21 (Return) x 42
x 43 Input 22 (Positive) Inputs 22, 23, 24
Input 22 (Return) x 44
Input 23 (Return)
x 45 Input 23 (Positive) are 10 mA, all
x 46
Input 24 (Return)
x 47 Input 24 (Positive) others are 2.5 mA
x 48
x
To Rack R
9-72 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VCCC/TICI - Isolated Digital Inputs
The Isolated Digital Input terminal board (TICI) is an input board which works with
VCCC (but not VCRC) in a similar way to TBCI. TICI provides voltage detection
circuits to detect a range of voltages across relay contacts, fuses, and switches, as
shown in Figure 9-42.
Features
The TICI is similar to the TBCI, except for the following items:
• TICI input voltage ranges are:
− 70 − 145 V dc, nominal 125 V dc, with a detection threshold of 39 to 61 V
dc
− 200 − 250 V dc, nominal 250 V dc, with a detection threshold of 39 to
61 V dc
− 90 − 132 V rms, nominal 115 V rms, 47-63 Hz, with a detection threshold
of 35 to 76 V ac
− 190 − 264 V rms, nominal 230 V rms, 47-63 Hz, with a detection threshold
of 35 to 76 V ac
• Input hardware filtering is provided using time delays of 15 msec, nominal:
− For dc applications the time delay is 15 ± 8 msec
− For ac applications the time delay is 15 ± 13 msec
• In addition to hardware filters, the contact input state is software filtered using
configurable time delays, selected from 0, 10, 20, 50, and 100 msec. For ac
inputs, a filter of at least 10 ms is recommended.
V ac
Supply TICI Terminal Board
Auto
Voltage
Run Sensing
Circuit
Customer's
Load/Motor
The following restrictions should be noted regarding creepage and clearance on the
230 V rms application:
• For NEMA requirements: 230 V single-phase
• For CE Mark: 230 V single or 3-phase
Refer to the section Contact Inputs TBCI for information on monitoring dry
(isolated) contact inputs, and on the VCCC board.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-73
DTCI - Simplex DIN-rail Mounted Contact Input Terminal
Board
VCRC is a single-width board The DTCI board is a compact contact input terminal board, designed for DIN-rail
and is preferred to VCCC. mounting. The DTCI board has 24 contact inputs with a nominal excitation of 24 V
dc, and connects to the VCRC processor board with a single 37-pin cable, as shown
in Figure 9-43. This cable is identical to those used on the larger TBCI terminal
board. The terminal boards can be stacked vertically on a DIN-rail to conserve
cabinet space. Two DTCI boards can be connected to the VCRC for a total of 48
contact inputs. Only a Simplex version of this board is available.
The function and on-board signal conditioning are the same as those on TBCI,
except they are scaled for 24 V dc. High density Euro Block type terminal blocks are
permanently mounted to the board with two screw connections for the ground
connection (SCOM). The input excitation range is 18 to 32 V dc, and the threshold
voltage is 50% of the excitation voltage. The ac voltage rejection is 12 V rms.
Contact inputs take 2.5 mA nominal current on the first 21 circuits, and 10 mA on
circuits 22 through 24.
DTCI Board
49 (+) <R> Rack
52 (-)
Contact Input Board VCRC
24 V dc 50 (+)
Excitation 53 Gate
(-)
Power Source
51 (+) ID Gate
54 (-) JR1 J3 Total of 48 circuits P5
Gate
Noise Supp-
Input 1 Positive 1 ression Gate
N
Input 1 Return 2 S Reference
Gate
Input 2 Positive 3
N Gate
Input 2 Return 4 Optical Isolation
S
Gate
Input 3 Positive 5 J4
N
Input 3 Return 6 S
Input 4 Positive 7
N
Input 4 Return 8 S
. .
. .
. .
. .
Input 24 Positive 47
N Contact Inputs from Second
Input 24 Return 48 S
DTCI Terminal Board
9-74 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Installation
There is no shield The DTCI board slides into a plastic holder, which mounts on the DIN-rail. The
termination strip with this contact inputs are wired directly to the terminal block as shown in Figure 9-44. The
design. Euro Block type terminal block has 60 terminals and is permanently mounted on the
terminal board. Typically #18 AWG wires are used. There are two screws for the
SCOM (ground) connection, which should be as short a distance as possible, and six
screws for the 24 V dc excitation power.
DTCI Board
Screw Connections
1 Input 1 (Positive)
Input 1 (Return) 2
3 Input 2 (Positive)
Input 2 (Return) 4
5 Input 3 (Positive)
Input 3 (Return) 6 Input 4 (Positive)
7
Input 4 (Return) 8
37-pin "D" shell 9 Input 5 (Positive)
Input 5 (Return) 10
11 Input 6 (Positive)
connector with Input 6 (Return) 12
13 Input 7 (Positive)
latching fasteners Input 7 (Return 14
15 Input 8 (Positive)
Input 8 (Return) 16
JR1 17 Input 9 (Positive)
Input 9 (Return) 18
19 Input 10 (Positive)
Input 10 (Return) 20
21 Input 11 (Positive)
Input 11 (Return) 22
23 Input 12 (Positive)
Input 12 (Return) 24
Input 13 (Return) 25 Input 13 (Positive)
26
27 Input 14 (Positive)
Input 14 (Return) 28
29 Input 15 (Positive)
Input 15 (Return) 30
31 Input 16 (Positive)
Input 16 (Return) 32
33 Input 17 (Positive)
Input 17 (Return) 34
35 Input 18 (Positive)
Input 18 (Return) 36
37 Input 19 (Positive)
Input 19 (Return) 38
39 Input 20 (Positive)
Input 20 (Return) 40
41 Input 21 (Positive)
Input 21 (Return) 42
Cable to J3 or J4 43 Input 22 (Positive)
Input 22 (Return) 44
connector in I/O 45 Input 23 (Positive)
Input 23 (Return) 46
rack for VCRC 47 Input 24 (Positive)
Input 24 (Return) 48
board 49 Excitation (Positive)
Excitation (Positive) 50
51 Excitation (Positive)
Excitation (Negative) 52
53 Excitation (Negative)
Excitation (Negative) 54
55 Chassis Ground
Chassis Ground 56
57
58
59
60
SCOM
Plastic mounting
DIN-rail mounting holder
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-75
VCCC/TRLYH1B - Relay Outputs
The Contact Input/Relay Output Board (VCCC), with its associated daughter board,
controls 24 relay/solenoid outputs. VCCC is a double-width module and connects to
two sets of J3/J4 plugs via the VME backplane as shown in Figure 9-45 below. The
main board controls 12 relays via the Relay Output Terminal board (TRLY). Two
TRLY boards are required for a total of 24 relays.
VCRC is a single slot version of VCCC with the same functionality (except driving
TICI). Relay output cables plug into J3 and J4, as discussed in the VCRC section.
VME Rack
J1
VCCC
VCCC Daughter Board
Board
J2 J2
J4 J4
Terminal Boards
TB3 JF1 JF2 TB3 JF1 JF2 JE1 JE2 JE1 JE2
Power Plugs Power Plugs Power Plugs Power Plugs
Figure 9-45. Cabling for Contact Inputs and Relay Outputs, Simplex
TRLY holds twelve plug-in magnetic relays. A second board is required for output
relays 13-24. Cables with molded fittings connect the terminal board to the VME
rack where the VCCC processor board is located, as shown in Figure 9-46. Plug JA1
connnects to J3/4 on Simplex systems, and plugs JR1, JS1, and JT1 are used for
TMR systems.
9-76 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Relay Output Terminal Board TRLY VME Board VCCC
Solenoid
Power
TB3 X x
x JT1
2
x 1
x JF1 JF2 RUN
x 4
x 3 FAIL
STAT
x 6
x 5 Cable to VME
x 8 x 7 Rack T
x 10
x 9
x 12
x 11
x 14
x 13 VME Bus to VCMI
x 15 Fuses
x 16
x 18 x 17
x 20
x 19 JS1
x 22
x 21
x 24
x 23
x
Cable to VME
x Rack S
x 26
x 25 Output
x 27 Daughter
x 28
x 29
Relays
x 30 Board
32
x 31
x
x 33 JA1 JR1
x 34
x 36
x 35
x 38
x 37 Cable to VME
x 40
x 39 Rack R VCCC
x 42
x 41 x
x 44
x 43
x 45
x 46 Connectors on J3 J3
x 48
x 47
VME Rack R
x x
Solenoid
Shield Power
Bar Cables to Relay J4 J4
Output Terminal
Boards
Barrier Type Terminal
Blocks can be unplugged
from board for maintenance To Second
TRLY
Figure 9-46. Relay Output Terminal board, I/O Board, and Cabling
Operation
For Simplex operation, cables carry control signals plus monitor feedback voltages
between VCCC to TRLY through JA1. Relay drivers, fuses, and jumpers are
mounted on the relay board. The first six relay circuits can be jumper configured for
either dry, Form-C contact outputs, or to drive external solenoids. A standard 125 V
dc or 115 V ac source, or an optional 24 V dc source, with on-board suppression can
be provided for solenoid power. This comes in on JF1 (or TB), as shown in Figure
9-47. The next five relays (7 − 11) are unpowered isolated Form-C contacts. Output
12 is an isolated Form-C contact, used for ignition transformers, for example.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-77
Output 01
Relay Terminal Board - TRLYH1B
NC 1
Alternate Dry K1
TB3
Power, 20 A FU7 Com 2
1 P125/24 V dc
24 V dc or
125 V dc or 2 JP1
115 V ac or 3 NO 3
240 V ac 4 +
K1 K1 Field
FU1 Solenoid
JF1 1 N125/24 Vdc Sol 4 -
Normal Power
3.15 Amp "6" of the above circuits
Source,pluggable 3
(7 Amp) slow-blow
JF2 Output 07
1
Power NC
3 Monitor
Daisy-Chain >14 Vdc 25
K7
>60 Vac
JA1 Com Dry
<R> Contact,
26
VCCC Monitor Select
Form-C
NO
Relay J3/4
Output K7 K7 27
"5" of these circuits
JR1
<R> P28V
Relay Coil K#
Driver
ID
JS1 RD
Output 12
Monitor
>14 Vdc NC
ID >60 Vac
K12 45
JT1
"12" of the above circuits
Com Special
46 Circuit
NO
ID 47
K12 K12
Available for JG1
GT Ignition Transformers 1 Sol
(6 Amp at 120 Vac
3 "1" of these circuits 48
3 Amp at 240 Vac)
For TMR applications, relay control signals are fanned into TRLY from the three
VME board racks R, S, and T through plugs JR1, JS1, and JT1. These signals are
voted and the result controls the corresponding relay driver. Power for the relay coils
comes in from all three racks and is diode shared, as shown in Figure 9-48.
9-78 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Relay Terminal Board - TRLYH1B
Output 01
NC 1
Alternate Dry K1
TB3
Power, 20 A 1 P125/24 V dc FU7 Com 2
24 V dc or
2 JP1
125 V dc or
3 NO 3
115 V ac or
240 V ac 4 +
K1 K1 Field
FU1 Solenoid
JF1 1 N125/24 Vdc Sol 4 -
Normal Power
3.15 Amp "6" of the above circuits
Source,pluggable 3
(7 Amp) slow-blow
JF2 Output 07
1
Power NC
3 Monitor
Daisy-Chain >14 Vdc 25
K7
>60 Vac
JA1 Com Dry
<T> Contact,
<S> 26
Monitor Select
Form-C
<R> NO
K7 K7 27
VCCC
J3/4 "5" of these circuits
Relay
Output JR1
P28V
Coil K#
Relay
<R> Driver
ID
J3/4 JS1 RD
Same for
Output 12
<S> Monitor
>14 Vdc NC
ID >60 Vac
K12 45
J3/4 JT1
"12" of the above circuits
Same for Com Special
<T> 46 Circuit
NO
ID 47
K12 K12
Available for JG1
GT Ignition Transformers 1 Sol
(6 Amp at 120 Vac 3 "1" of these circuits 48
3 Amp at 240 Vac)
Features
Relays are driven at the frame rate. For system powered solenoids, the excitation
voltage is monitored and an alarm is latched if this voltage drops below 12 V dc.
Each relay coil current is also monitored and if it does not agree with the control
signal an alarm is latched.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-79
Relay Characteristics
Relays have a 3.0 Amp rating. The rated contact to contact voltage is 500 V ac for
one minute, and the rated coil to contact voltage is 1,500 V ac for one minute. The
typical time to operate is 10 ms.
Failsafe Outputs
The relay outputs have failsafe features so that when a cable is unplugged, the inputs
vote to de-energize the corresponding relays. Similarly, if communication with the
associated VME board is lost, the relays de-energize.
Front panel
Three LEDs at the top of the VCCC front panel provide status information. The
normal RUN condition is a flashing green, FAIL is a solid red. The third LED is
normally off but shows a steady orange if a diagnostic alarm condition exists in the
board.
Diagnostics
The output of each relay (coil current) is monitored and checked against the
command, at the frame rate. If there is no agreement for two consecutive checks, an
alarm is latched. The solenoid excitation voltage is monitored downstream of the
fuses and an alarm is latched if it falls below 12 Volts (ac or dc).
If any one of the 12 outputs goes unhealthy a composite diagnostic alarm,
L3DIAG_VCCC occurs. Details of the individual diagnostics are available from the
toolbox. The diagnostic signals can be individually latched, and then reset with the
RESET_DIA signal if they go healthy.
Each of the three terminal board connectors have their own ID device which is
interrogated by the I/O board. The board ID is coded into a read-only chip containing
the board serial number, board type, revision number, and the JR1/JS1/JT1 connector
location.
Specification
Table 9-21. VCCC Relay Output Specification
Item Specification
Number of Relay Channels on 12 relays: 6 relays with optional solenoid driver voltages
one TRLY board 5 relays with dry contacts only
1 relay with 7 Amp rating
VCCC total is 24 relays on two TRLY boards
Rated Voltage on Relays a: Nominal 125 V dc or 24 V dc
b: Nominal 120 V ac or 240 V ac
Max Load Current a: 0.6 Amp for 125 V dc operation
b: 3.0 Amp for 24 V dc operation;
c: 3.0 Amp for 120/240 V ac, 50/60 Hz operation
Max response Time On 25 ms typical
Max response Time Off 25 ms typical
Contact Material Silver cad-oxide
Contact Life Electrical operations: 100,000
Mechanical operations: 10,000,000
9-80 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Fault detection Loss of relay solenoid excitation current or coil current
disagreement with command.
Unplugged cable or loss of communication with VME board.
Relays deenergize if communication with associated VME
board is lost.
Configuration Overview
Like all I/O boards, the VCCC module is configured using the Control System
Toolbox. This software usually runs on a data-highway connected CIMPLICITY
station or workstation. Table 9-22 summarizes the configuration choices and
defaults. Refer to GEH-6403, Control System Toolbox for Configuring the Mark VI
Turbine Controller.
Card Points Signals Description- Enter Signal Connection Name Direction Type
L3DIAG_VCCC1 Card Diagnostic Input BIT
L3DIAG_VCCC2 Card Diagnostic Input BIT
L3DIAG_VCCC3 Card Diagnostic Input BIT
Installation
The customer’s 12 relay outputs are wired directly to two I/O terminal blocks
mounted on the terminal board as shown in Figure 9-49. Each block is held down
with two screws and has 24 terminals accepting up to #12 AWG wires.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-81
A shield termination strip attached to chassis ground is located immediately to the
left of each terminal block. Solenoid power for outputs 1−6 is plugged to JF1
normally. JF2 can be used to daisy-chain power to other TRLYs. Alternatively
customer power may be wired directly into TB3 when power is not plugged into
JF1/JF2. JG1 provides power to customer’s special solenoid, Output 12.
Jumpers JP1−JP6 are removed in the factory and shipped in a plastic bag. Reinstall
the appropriate jumper if power to a field solenoid is required. These jumpers (JP1-
6) are for isolation of the monitor circuit when used on isolated contact applications.
The fuses should also be removed for this application to ensure that suppression
leakage is removed from the power bus.
9-82 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VCCC/TRLYH1C - Relay Outputs with Voltage Sensing
Relay contact voltage detection is available with the optional TRLYH1C relay
terminal board. TRLYH1C is driven by VCCC (or VCRC) in the same way as
TRLY, and has the same 12 output relays. Voltage sensing is done with 24 small
voltage monitor boards as shown in Figure 9-50. Individual voltage monitors can be
isolated by removing a jumper.
Features
TRLYH1C is the same as the standard TRLY board except for the following:
• Six jumpers for converting the solenoid outputs to dry contact type are removed.
These jumpers were associated with the fuse monitoring.
• Input relay coil monitoring is removed from the 12 relays.
• Relay contact voltage monitoring is added to the 12 relays. Individual
monitoring circuits have voltage suppression, and can be isolated by removing
their associated jumper.
• High frequency snubbers are installed across the NO and Sol terminals on the
six solenoid driver circuits and on the special circuit, output 12.
The contact voltage ranges for the monitors are as follows:
• 16-32 V dc, nominal 24 V dc
• 70-145 V dc, nominal 125 V dc
• 90-132 V rms, nominal 115 V rms, 47-63 Hz
• 190-264 V rms, nominal 230 V rms, 47-63 Hz
The threshold voltage ranges for the monitors are as follows:
• 24 V dc applications: 10 to 16 V dc
• 125 V dc applications: 40 to 65 V dc
• 115/230 V ac applications: 45 to 72 V ac
The contact input state is software filtered using time delays.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-83
Relay Terminal Board - TRLYH1C
Output 01
NC 1
Alternate K1
TB3
Power, 20 A FU7 Com 2
1 P125/24 V dc
24 V dc or
2
125 V dc or
115 V ac or 3 NO 3
240 V ac 4 "6" of these +
K1 K1 Field
FU1 circuits Snub
Solenoid
N125/24 Vdc 4 -
JF1 1
Normal Power Sol
Source,pluggable 3.15 Amp
3 JP1
(7 Amp) slow-blow
JF2 Output 07
1
Power NC
3 Monitor
Daisy-Chain >14 Vdc 25
K7
>60 Vac
JA1 Com Dry
<T>
<S> 26 Contact
Monitor Select
Form-C
<R> NO
K7 K7 27
VCCC
Relay J3/4 JP7
Output JR1
P28V
K#
"5" of these circuits
Coil
Relay
<R> Driver
ID
J3/4 JS1 RD
Same for
JP12 Output 12
<S> Monitor
>14 Vdc NC
ID >60 Vac
K12 45
J3/4 JT1
"12" of the above circuits
Same for Com Special
<T> 46 Circuit
NO
ID 47
K12 K12
Available for JG1 Snub
GT Ignition Transformers 1
(6 Amp at 120 Vac 3 "1" of these circuits Sol 48
3 Amp at 240 Vac)
Installation
TRLYH1C wiring is the same as for TRLY, but the jumpers are different. It is not
possible to jumper convert the solenoid driver circuits to isolated output contacts, but
the two fuses can be removed for this purpose. Twelve jumpers are available to
isolate the contact voltage monitors. The default is jumper in place, and isolation is
by removing the jumper. The board is shown in Figure 9-51.
9-84 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Alternative Customer Power N125/24 Vdc Power
Power Wiring Return Source
P125/24 Vdc
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-85
VCRC - Contact Input/Relay Output Board
The VCRC board has the same functionality as the VCCC board but takes up only
one VME slot. The VCCC daughter board is not required, and two front panel
connectors, J33 and J44, accept the contact inputs from the TBCI boards. Relay
outputs on TRLY use the J3 and J4 ports on the VME rack, as shown in Figure 9-52.
VCRC does not support the TICI contact voltage sensing board.
P1
VCRC
Single Width
Front Panel
P2
J33 37
J44 37
VME
J3 backplane
wiring
J4
Terminal
Boards
Figure 9-52. VCRC with Boards and Cabling to Contact Inputs and Relay Outputs
The VCRC firmware, configuration, and specifications are the same as for the
VCCC board. Cabling to TBCI is shown in Figure 9-53.
9-86 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
TBCI Contact Input Terminal Board VCRC VME Board
x
x
x
x 1 JT1
x 2 RUN
x 4
x 3 FAIL
STAT
x 6
x 5
12 Contact x 7 JE1 JE2
x 8
Inputs x 10
x 9 VME Bus to VCMI
x 12
x 11
x 14
x 13
x 16
x 15
x 18
x 17
x 20
x 19 JS1 Cable to VME J33
22
x 21
x
x 23 Rack T
x 24
x
x
x 25 Cable to VME
x 26 J44
x 28
x 27 Rack S
x 29
12Contact x 30
32
x 31
Inputs x
x 33 JR1
x 34
x 36 x 35 VCRC
x 38
x 37 x
x 40
x 39
x 41 Cable to VME
x 42
Rack R J3
x 44
x 43
x 46
x 45
x 48
x 47
Connectors
x
x on VME
Rack R
J4
Shield Bar
BarrierType Terminal
Blocks can be unplugged
Cable from Second TBCI
from board for maintenance
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-87
DRLYH1A and DRLYH1B - Simplex Wall Mounted Relay
Output Terminal Boards
VCRC is a single-width board There are two versions of the DRLY terminal board, IS200DRLYH1A and
and is preferred to the VCCC. IS200DRLYH1B. The IS200DRLYH1B is certified by UL to UL-1604 Class 1,
Groups A and B, Temperature Class T4, Division 2. This certification is commonly
referred to as Class 1 Div. 2. The DRLYH1A has high powered relay contacts than
DRLYH1B.
Certification under UL-1604 Class 1, Groups A and B, Temperature Class T4,
Division 2 certifies the following:
• That the DSVO can operate in hazardous locations where acetylene and
hydrogen (groups A and B) may be present (class 1), but not likely to exist
under normal operating conditions (division 2).
• That no part on the board will exceed 135 °C with the terminal board ambient
temperature at its maximum 65 °C (temperature class T4).
Note Turbine fuel is not specifically addressed by UL-1604, but UL equates turbine
fuel to the acetylene and hydrogen groups (A and B) in terms of volatility and
flammability.
The DRLY board is a compact relay output terminal board, designed for wall
mounting (not DIN-rail mounting). The board has 12 output relays, each with one
Form-C contact, and connects to the VCRC processor board with a single 37-pin
cable, as shown in Figure 9-54. The 37-pin cable is identical to those used on the
larger TRLY terminal board. Two DRLY boards can be connected to the VCRC for
a total of 24 contact outputs. Only a Simplex version of this board is available.
Solenoid source power is not included, and there is one set of dry contacts per relay,
(there are two NO contacts in series). The relay outputs meet NEMA Class B 300 V
creepage and clearance. Unlike TRLY, there is no on-board suppression, and no
relay state monitoring.
Table 9-23A lists the output ratings for the DRLYH1A board and Table 9-23B lists
the output ratings for the DRLYH1B board. The DRLYH1A is designed for general
purpose use and has ratings covering most applications, whereas the DRLYH1B
relay is sealed and has smaller contacts for Class 1 Div. 2 applications. An on-board
ID chip identifies the board to the VCRC for system diagnostic purposes
DRLY Board
JR1
P28V TB1
From J3 or J4
on I/O rack, 1 NC
from VCRC P28 OK LED COIL
board Output 1
3 COM of 12 Dry
Relay Contact
Driver Outputs
5 NO
RD
TB2 1
2
12 of the above circuits
ID
SCOM
9-88 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Table 9-23A. DRLYH1A Output Specifications
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-89
Installation
There is no shield termination The DRLY board is supported on a metal plate, which can be wall mounted with
strip with this design. four screws. The 12 relay outputs are wired directly to the odd-numbered screws on
the terminal blocks as shown in Figure 9-55. The high-density Euro Block type
terminal blocks can be plugged into the numbered receptacles on the board. There
are two separate screws on TB2 for the SCOM (chassis ground) connection, which
should be as short a distance as possible.
DRLY Board
9-90 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VSVO/TSVO - Servo/LVDT
The Servo Board (VSVO) controls four electrohydraulic servo valves that actuate the
steam/fuel valves. These four channels are divided between two TSVO terminal
boards. Valve position is measured with linear variable differential transformers
(LVDT). Three cables to VSVO use the J5 plug on the front of the board and the
J3/4 connectors on the VME rack, as shown in Figure 9-56. TSVO provides simplex
signals via the JR1 connector, and fans out TMR signals to the JR, JS, and JT
connectors. Plugs JD1 or JD2 are for an external trip from the protection module.
x
x 26 x 25 JS5
x 28 x 27 Cables to VME
x 30 x 29 Rack S
x 32 x 31 J5
x 34 x 33 JR1
x 36 x 35
x 38 x 37 JR5
x 40 x 39 VSVO
x 42 x 41 x
x 44 x 43
46 x 45
x
x 47 J3
x 48
x
x
Shield Connectors on
Bar VME Rack R J4
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-91
Operation
The servo board provides four channels consisting of bi-directional servo current
outputs, LVDT position feedback, LVDT excitation, and pulse rate flow inputs. The
TSVO provides excitation for, and accepts inputs from, up to six LVDT valve
position inputs. There is a choice of one, two, three, or four LVDTs for each servo
control loop. If three inputs are used they are voted in a median selector. Two pulse
rate inputs are available for gas turbine flow measuring applications, and these
signals come through TSVO and go directly to the VSVO board front at J5. These
inputs are shown in Figure 9-57, and the outputs in Figure 9-58.
Each servo output is equipped with an individual suicide relay under firmware
control that shorts the VSVO output to signal common when de-energized, and
recovers to nominal limits after a manual reset command is issued. Diagnostics
monitor the output status of each servo voltage, current, and suicide relay.
Termination
Board TSVOH1B
(Input portion) Servo Board
VSVO
JR1 J3
LVDT LVDT1H
1 Digital
3.2k Hz, SCOM A/D Regulator Servo
7 V rms Regulator
Excitation A/D Converter
2 P28VR
Source LVDT1L D/A D/A Converter
Current
Suicide
P24V1 41 Limit
Relay
P24VR1 42 Configurable
Gain To Servo
Pulse Rate 39
P1TTL Outputs
Inputs 43 JR5 J5 3.2KHz
(
P2H
Magnetic PR
MPU P2L 48
Pickups
0 - 12 k Hz Noise Suppr.
9-92 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Each of the servo output channels can drive either one or two-coil servos in Simplex
applications, or two or three-coil servos in TMR applications. The two-coil TMR
applications are for 200# oil gear systems where each of two control modules drive
one coil each, and the third control module has no servo coil interface. Servo cable
lengths up to 300 meters (984 feet) are supported with a maximum two-way cable
resistance of 15 ohms. Since there are many types of servo coils, a variety of bi-
directional current sources are jumper selectable, as shown in Figure 9-58.
The primary and emergency Another trip override relay K1 is provided on each terminal board which is driven
overspeed systems will trip from the <P> Protection Module. If an emergency overspeed condition is detected in
the hydraulic solenoids the Protection Module, the K1 relay will energize and disconnect the VSVO servo
independent of this circuit output from the terminal block and apply a bias to drive the control valve closed.
This is only used on Simplex applications to protect against the servo amplifier
failing high, and is functional only with respect to the servo coils driven from <R>.
<R>
17 ER1H
J5 3.2KHz,
3.2KHz
Pulse Excitation
N 7V rms
S 18 Excitation
Rate ER1L
Only two pulse rate probes on In TMR applications the LVDT signals on TSVO fan out to three racks via JR1, JS1,
one TSVO are used and JT1, as shown in Figure 9-59. These connectors also bring power into TSVO
where the three voltages are diode high-selected and current limited to supply 24 V
dc to the pulse rate active probes.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-93
<R>
<S>
<T>
Controller
Application Software
Terminal
Board TSVOH1B Servo Board
(Input Portion) VSVO
9-94 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
For TMR systems, each servo channel has connections to three output coils with a
range of current ratings up to 120 mA, selected by jumper, as shown in Figure 9-60.
<R>
<S>
<T>
Controller
Application Software
Terminal Board
TSVOH1B (continued)
Servo Board
VSVO Servo Current Range
Digital 10,20,40,80,120 ma
A/D Converter Servo
JD1 Trip input from
Regulator
A/D Regulator P28VR 1
<P> Not Used for
2
From Suicide TMR
TSVO P28VR JD2
D/A Relay JP1
LVDT 120B
1
120 2
Servo Driver J3 JR1 80
Servo coil from <R>
25 S1RH
Voltage 40
Limit 20
10 31
N
22 ohms
2 Ckts. S
89 ohms
26 S1RL 1k ohm
Configurable
Gain
17 ER1H 3.2KHz,
J5 3.2KHz 7V rms
Pulse Excitation 2 Ckts S
N
18 Excitation
Rate ER1L
Source
Connector on J3 JS1 JP2 For LVDTs
front of VSVO 120B
card 120
80
Servo coil from <S>
27 S1SH
40
20
10 N
S
2 Ckts. 28 S1SL
21 ESH 3.2KHz,
1 Ckt. N 7V rms
S 22 ESL Excitation
J3 JT1 Source
JP3
120B
120
80
Servo coil from <T>
29 S1TH
40
20
10
N
S
2 Ckts. 30 S1TL
23 ETH 3.2KHz,
N 7V rms
1 Ckt. S 24 ETL Excitation
Source
Noise Suppression
For LVDTs
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-95
Features
The range of servo coil ratings that can be jumper selected on the terminal board are
shown in Table 9-24.
Table 9-24 summarizes the standard servo coil resistance and their associated
internal resistance, selectable with the terminal board jumpers shown in Figure 3-36.
In addition to these standard servo coils, it is possible to drive non-standard coils by
using a non-standard jumper setting. For example, an 80 mA, 125-ohm coil could be
driven by using a jumper setting 120B. The total resistance would be equivalent to
the standard setting.
Regulation of the output current is within 2% of the nominal full scale, when
properly configured and loaded for the coil resistance specified in the previous table.
Resolution over the full-scale range is 12 bits. Servo coil inductance is not a
specified parameter, but it is nominally less than 5 Henries.
9-96 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Inputs support both passive magnetic pickups and active pulse rate transducers (TTL
type) interchangeably without configuration. Normally, these inputs are not used on
steam turbine applications, but are usually for liquid fuel flow measurement, and
monitoring flow divider feedback in gas turbine applications. Pulse rate inputs can be
located up to 300 meters (984 feet) from the turbine control cabinet; this assumes
shielded-pair cable is used with typically 70 nF single-ended or 35 nF differential
capacitance and 15 ohms resistance.
A frequency range of 2 to 12 kHz can be monitored at a normal sampling rate of
either 10 or 20 ms. Magnetic pickups typically have an output resistance of 200
ohms and an inductance of 85 mH excluding cable characteristics. The transducer is
a high impedance source, generating energy levels insufficient to cause a spark. The
maximum short circuit current is approximately 100 mA with a maximum power
output of 1 watt.
Front panel
Three LEDs at the top of the VSVO front panel provide status information. The
normal RUN condition is a flashing green, and FAIL is a solid red. The third LED is
normally off but displays a steady orange if an alarm condition exists in the board.
Specification
Table 9-25. Specification
Item Specification
Number of Inputs (per TSVO) 6 LVDT windings
2 Pulse Rate signals (total of 2 per VSVO)
External trip signal
Number of Outputs (per TSVO) 2 Servo Valves (total of 4 per VSVO board)
4 Excitation Sources for LVDTs
2 Excitation Sources for Pulse Rate transducers
Internal Sample Rate 200 Hz
Power Supply Voltage Nominal 24 V dc
LVDT Accuracy 1 % with 14-bit resolution
LVDT Input Filter Low pass filter with 3 down breaks at 50 rad/sec ±15%
LVDT Common Mode Rejection CMR is 1 Volt, 60 dB at 50/60 Hz
LVDT Excitation Output Frequency of 3.2 +/- 0.2 kHz
Voltage of 7.00 +/- 0.14 V rms
Pulse Rate Accuracy 0.05% of reading with 16-bit resolution at 50 Hz frame rate
Noise of acceleration measurement is less than ± 50
Hz/sec for a 10,000 Hz signal being read at 10 ms
Pulse Rate Input Minimum signal for proper measurement at 2 Hz is 33
mVpk, and at 12 kHz is 827 mVpk.
Magnetic PR Pickup Signal Generates 150 V p-p into 60 K ohms
Active PR Pickup Signal Generates 5 to 27 V p-p into 60 K ohms
Servo Valve Output Accuracy 2% with 12-bit resolution
Dither amplitude and frequency adjustable
Fault detection Suicide servo outputs initiated by:
Servo Current out of limits or not responding
Regulator Feedback signal out of limits
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-97
Diagnostics
Servo diagnostics cover items such as out of range LVDT voltage, servo suicide,
servo current open circuit, and short circuit. If any one of the signals goes unhealthy
a composite diagnostic alarm, L3DIAG_VSVO occurs. If the associated regulator
has two sensors, the bad sensor is removed from the feedback calculation and the
good sensor is used. Details of the individual diagnostics are available from the
toolbox. The diagnostic signals can be individually latched, and then reset with the
RESET_DIA signal if they go healthy.
Connectors JR1, JS1, JT1 on the terminal board have their own ID device that is
interrogated by the I/O board. The ID device is a read-only chip coded with the
terminal board serial number, board type, revision number, and the plug location.
Configuration Overview
Like all I/O boards, the VSVO module is configured using the toolbox. This software
usually runs on a data-highway connected CIMPLICITY station or workstation.
Table 9-26 summarizes the configuration choices and defaults. For details refer to
GEH-6403, Control System Toolbox for Configuring the Mark VI Turbine
Controller.
Regulator
Regulator 1 LVDT/R Calibration Online LVDT calibration, Yes/No
RegType Algorithm used in the regulator Unused 1_PulseRate
2_PlsRateMAX 1_LVPosition
2_LV_PosMIN 2_LV_PosMID
2_LvpilotCyl 4_LVp/cylMAX
4_LV_LM 2_LV_posMAX
RegGain Position Loop Gain in (%Current/%position) −100 to 100
RegNullBias Null Bias in % current, Balances Servo Spring Force −100 to 100
Dither Ampl Dither in % Current (minimizes hysteresis) Dither Amp: 0 to 10
Monitor
Monitor 1
Monitor Type Monitor Algorithm Unused 1_Lvposition
2_LVposMIN 2_LVposMAX
3_LVposMID 1_LvposRatio
2_LVposRatio
9-98 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
EnablFbkSuic Select Suicide function based on feedback Enable, Disable
Fdbk_Suicide Percent position error to initiate suicide 0 to 100% (actuator position error)
Servo Output2 Measured Output Current in Percent - Card Point Point Edit (Input FLOAT)
Card Points Signals Description –Point Edit (Enter Signal Connection) Direction Type
L3DIAG_VSVO1 Card Diagnostic Input BIT
L3DIAG_VSVO2 Card Diagnostic Input BIT
L3DIAG_VSVO3 Card Diagnostic Input BIT
SysLim1PR1 Process Alarm Input BIT
SysLim2PR1 Process Alarm Input BIT
SysLim1PR2 Process Alarm Input BIT
SysLim2PR2 Process Alarm Input BIT
Reg1Suicide Reg1 Suicide relay status Input BIT
: : Input BIT
Reg4Suicide Reg4 Suicide relay status Input BIT
Reg1_PosAFlt Reg1, LM Machine only, Position A failure Input BIT
: : Input BIT
Reg4_PosAFlt Reg4, LM Machine only, Position A failure Input BIT
Reg1_PosBFlt Reg1, LM Machine only, Position B failure Input BIT
: : Input BIT
Reg4_PosBFlt Reg4, LM Machine only, Position B failure Input BIT
Reg1_PosDif1 Reg1, LM Machine only, Position Diff failure Input BIT
: : Input BIT
Reg4_PosDif1 Reg4, LM Machine only, Position Diff failure Input BIT
Reg1_PosDif2 Reg1, LM Machine only, Position Diff failure Input BIT
: : Input BIT
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-99
Reg4_PosDif2 Reg4, LM Machine only, Position Diff failure Input BIT
RegCalMode Regulator under Calibration Input BIT
Reg1_Fdbk Regulator 1 Feedback Input FLOAT
: : Input FLOAT
Reg4_Fdbk Regulator 4 Feedback Input FLOAT
PilotFdbk1 Pilot/Cyl Input FLOAT
: : Input FLOAT
PilotFdbk4 Pilot/Cyl Input FLOAT
Reg1_Error Null Bias error Input Input FLOAT
: : Input FLOAT
Reg4_Error Null Bias error Input Input FLOAT
Accel1 GPM/sec Input FLOAT
Accel2 GPM/sec Input FLOAT
Mon1 Position Monitor Input FLOAT
: : Input FLOAT
Mon12 Position Monitor Input FLOAT
CalibEnab1 Enable Calibration Reg 1 Output BIT
: : Output BIT
CalibEnab4 Enable Calibration Reg 4 Output BIT
SuicideForce1 Force Suicide Reg 1 Output BIT
: : Output BIT
SuicideForce4 Force Suicide Reg 4 Output BIT
PossDiffEnab1 Position Difference Enable Reg 1, LM only Output BIT
: : Output BIT
PossDiffEnab4 Position Difference Enable Reg 4, LM only Output BIT
Reg1_Ref Reg 1 Position Ref Output FLOAT
: : Output FLOAT
Reg4_Ref Reg 4 Position Ref Output FLOAT
Reg1-GainMod Reg 1 Gain Modifier Output FLOAT
: : Output FLOAT
Reg4-GainMod Reg 4 Gain Modifier Output FLOAT
Reg1_NullCor Reg 1 Null Bias Correction Output FLOAT
: : Output FLOAT
Reg4_NullCor Reg 4 Null Bias Correction Output FLOAT
9-100 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Installation
Sensors and servo valves are wired directly to two I/O terminal blocks mounted on
the terminal board. Each block is held down with two screws and has 24 terminals
accepting up to #12 AWG wires. Shielded twisted 18 AWG wire is recommended
for the pulse rate sensors. A shield termination strip attached to chassis ground is
located immediately to the left of each terminal block. External trip wiring is
plugged into either JD1 or JD2. The screw connections and position choices for the
servo current jumpers are shown in Figure 9-61.
JP2 Servo 01 S
x
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-101
DSVO - Simplex DIN-rail Mounted Servo Terminal Board
The DSVO board is a compact servo terminal board, designed for DIN-rail
mounting. This board has two servo valve outputs, I/O for six LVDT position
sensors, and two active pulse rate inputs for flow measurement, as shown in Figure
9-62 (DSVOH1A) and Figure 9-63 (DSVOH1B, H2B). Servo coil currents ranging
from 10 to 120 mA can be jumper selected. DSVO connects to the VSVO processor
board with a 37-pin cable and a 15-pin cable, which are identical to those used on the
larger TSVO board. The terminal boards can be stacked vertically on the DIN-rail to
conserve cabinet space. Two DSVO boards can be connected to the VSVO, if
required. Only the Simplex version of this board is available.
The on-board functions and high frequency decoupling to ground are the same as
those on the TSVO. High density Euro Block type terminal blocks are permanently
mounted to the board with six screws for the ground connection (SCOM). Each of
the two connectors, JR1 and J5, connect to signals from on-board ID chips which
identify the board to the VSVO for system diagnostic purposes.
There are currently two versions (groups) of the DSVO, IS200DSVOH1B and
IS200DSVOH2B. The IS200DSVOH1B is a direct replacement for the previous
IS200DSVOH1A design. The IS200DSVOH2B is certified by UL to UL-1604 Class
1, Groups A and B, Temperature Class T4, Division 2. (This certification is
commonly referred to as Class 1 Division 2.
Certification under UL-1604 Class 1, Groups A and B, Temperature Class T4,
Division 2 certifies the following:
• That the DSVO can operate in hazardous locations where acetylene and
hydrogen (groups A and B) may be present (class 1), but not likely to exist
under normal operating conditions (division 2).
• That no part on the board will exceed 135 °C with the terminal board ambient
temperature at its maximum 65 °C (temperature class T4).
Note Turbine fuel is not specifically addressed by UL-1604, but UL equates turbine
fuel to the acetylene and hydrogen groups (A and B) in terms of volatility and
flammability.
The differences between the H1B and H2B versions of DSVO are shown in the
following chart.
Function H1B H2B
Class 1, Div. 2 No Yes
Certification
Servo Valves 75, 40, 22, 62, 89, 125, 1k Ohms (10 mA)
Accommodated 1k Ohms
LVDT Excitation Outputs Qty. = 2, 120 mA each Qty. = 4, 60 mA each
Excitation for Pulse Rate Qty. = 2, 24 V dc, 100 No
Probes mA each
Additional Pulse Rate No Qty. = 2
Inputs for TTL Signals
9-102 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
ID DSVOH1A
JR1
Cable to J3 connector Jumper position: JD1
1
in I/O rack for VSVO board P28V 120B is 75 ohm coil 2
120A is 40 ohm coil
K1 JD2 External Trip
P28VT 1
Noise
2
LVDT Suppression
LVDT1H P28VR Noise
JP1
1 120B Suppression
3.2k Hz, 7 V rms 120A
Excitation Source SCOM 80
40 17 SR1H
LVDT1L 2 20
10 21 SS1H
3 N Servovalve
Total of six S coil
LVDT input 18 SR1L
circuits 4
K1
Current SCOM
23 Limit P28VR JP2
P1 24V P28V 120B
120A
P1 24R 24 80
40
19 SR2H
Pulse Rate 20
P1 H 25
Inputs - 10 22 SS2H
Active Probes N Servovalve
P1 L 26
0 - 12 kHz S coil
P2 24V 27 P28V 20 SR2L
CL
P2 24R 28
SCOM 13 E1H
Pulse Rate P2 H 29 3.2 kHz Excitation
14 E1L
Inputs - LVDT
Active Probes P2 L 30 15 E2H
Excitation
0 - 12 kHz 16 E2L
SCOM JR5 SCOM
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-103
Mark VI Servo Valve Terminal Board IS200DSVOH1B, H2B
(IS200DSVOH1B Replaces IS200DSVOH1A)
EXT
TRIP
PCOM
H2B is Certified to UL-1604 Class 1 Div 2 JD1
FROM
CNTL RACK { P28
P28VR
1
2
CONN SHLD
JR1 K1
P28VR RP28V JD2
1
2
PCOM
12 ID
Exc 1 LV1H
P28VR 3328
S 4 H1B ONLY
PCOM
K1 08 120B Servo
2 LV1L
S
368 120A JP1 Valve
1058 80
108 IN VSVO 1858
LVDT 40 SR1H 17 Coils
3 LV2H 4328 20 S
S 1708
10
SS1H 21
4 LV2L 1708 10mA, 1K Coil
S
S
H2B ONLY 10mA, 1K Coil
SR1L 18
S
Total of six LVDT JPx (mA) Coil Res.
input Ckts. LVDT Input TB Locations: 120 B 75 ohm
LVx H L. 120 A 40 ohm
Current Limit 1 1 2 80 22 ohm
40 62 or 89 ohm
P24V1 P28VR 2 3 4 20 125 ohm
23
S CL 3 5 6 10 1000 ohm
P24R1
4 7 8
24 4 H1B ONLY
S 5 9 10 08
PCOM 120B Servo
6 11 12 368 120A JP2
1058 80 Valve
1858 40 19 Coils
37 TTL1 4328 SR2H
20 S
108 IN VSVO K1 1708
10
PR1H SS2H 22
25 P28VR 3328 1708 10mA, 1K Coil
S S
PR H2B ONLY 10mA, 1K Coil
SR2L 20
26 PR1L
S S
108 IN VSVO
28 P24R2 ERL1 14
S
PCOM
ERH3 39
38 TTL2
ERL3 40
LVDT Excitation
29 PR2H
S
PR (SCREWS 39-42 ARE NC IN H1B)
30 PR2L
S
ID S
ERH2 15
4
ERL2 16
CONN SHLD
JR5
FROM
CNTL RACK { ERH4 41
ERL4 42
31 32 33 34 35 36 SCOM
bv:06-04-01
CHASSIS
9-104 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Mark VI Servo Valve Terminal Board IS200DSVOH1B, H2B
Suicide
Relay 10 mA, 1K Coil
J2 J3/J4
Configurable Back
plane
Gain ACOM
LVDT Excitation:
VSVO DSVOH#B
Monitoring J3 JR1
P2 13
#1
14
3.2 Khz
7.0 Vrms 39
120 mA Each #3 -- NC in H1B
Monitoring 40
15
To LVDT's
#2
16
41
#4 -- NC in H1B
42
Monitoring J4
P2
7.0 Vrms
To Second DSVO
Monitoring 120 mA Each Termination Board
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-105
Installation
There is no shield termination The DSVO board slides into a plastic holder, which mounts on the DIN-rail. The
strip with this design. servo I/O are wired directly to the Euro Block type terminal block as shown in
Figure 9-64 (DSVOH1A) and Figure 9-65 (DSVOH1B, H2B). This has 36 terminals
(DSVOH1A) or 42 terminals (DSVOH1B, H2B); typically #18 AWG shielded
twisted pair wiring is used. There are six screws for the SCOM (ground) connection,
which should be as short a distance as possible.
DSVOH1A
Cable to J5 on
front of VSVO
board
Plastic mounting
holder
DIN-rail mounting
9-106 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
H1B and H2B Connection Differences
Screw # H1B H2B
23, 24 N/C
DSVOH1B, H2B 27, 28 N/C
JP1 JP2 37, 38 N/C
Coil 39, 40 N/C
Current 120B 120B
120A 120A 41, 42 N/C
Jumpers 80 80
40 40 N/C = Not Connected
20 20
10 10 Screw Connections
Screw Connections
LVDT1 (Low) 2 1 LVDT 1 (High)
37-pin "D" shell 3 LVDT 2 (High)
connector with LVDT2 (Low) 4
5 LVDT 3 (High)
latching fasteners LVDT3 (Low) 6
7 LVDT 4 (High)
LVDT4 (Low) 8
9 LVDT 5 (High)
LVDT5 (Low) 10
11 LVDT 6 (High)
LVDT6 (Low) 12
13 Excitation 1 (High)
Excitat1(Low) 14
15 Excitation 2 (High)
Excitat2(Low) 16
17 ServoR1 (High)
ServoR1(Low) 18
19 ServoR2 (High)
ServoR2(Low) 20
21 ServoS1 (High)
ServoS2(High) 22
23 Pulse 1 (24V)
Pulse 1(24R) 24
25 Pulse 1 (High)
Pulse1 (Low) 26
27 Pulse 2 (24V)
Pulse 2(24R) 28
29 Pulse 2 (High)
Pulse2 (Low) 30
31 31 - 36 DSVO
32 SCOM, connect to
JR1 33
34 chassis ground
35
36
37 Pulse1TTL (High)
Pulse2TTL (High) 38 39 Excitation3 (High)
Cable to J3 Excitation3 (Low) 40 Excitation4 (High)
41
JR5 Excitation4 (Low) 42
connector in I/O
rack for VSVO Euro Block type
board External trip terminal block
circuits
JD2 JD1
Cable to J5 on
front of VSVO Plastic mounting
board
holder
DIN-rail mounting
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-107
VTUR/TTUR - Turbine Control
The Turbine Control Board (VTURH1) controls three primary overspeed trip
solenoids and automatic synchronizing. It also interfaces to four passive pulse rate
devices, and monitors shaft voltage and current. The speed signal cable to VTUR
uses the J5 plug on the front of the board, and the other signals use the J3 connector
on the VME rack. Terminal board TTUR provides simplex signals through the JR
connector, and fans out TMR signals to the JR, JS, and JT connectors. J4 on the
VME rack connects to the TRPG terminal board described in the Primary Trip
section. The cable connections are shown in Figure 9-66.
A two-slot version of this board (VTURH2) is available for driving six trip solenoids
using two TRPG boards. VTURH2 only accepts eight flame detectors.
x
x 37-pin "D" shell
x
x 1 JT1 type connectors
x 2 RUN
x 4 x 3 with latching FAIL
x 6 x 5 fasteners STAT
x 8 x 7
x 10
x 9
x 12 x 11
x 14 x 13
x 16
x 15
x 18 x 17 Cables to VME
x 20 x 19 JT5 JS1 Rack T
x 22 x 21
24 x 23
x VME Bus to VCMI
x
x
x 25 JS5
x 26
x 28 x 27 Cables to VME
x 30 x 29 Rack S J
x 32 x 31 5
x 34 x 33 JR1
x 36 x 35
x 38 x 37 JR5
x 40 x 39 VTUR
x 42 x 41 x
x 44 x 43
46 x 45
x
x 47 J3
x 48
x
TB3 x
Wiring to
Shield TTL Speed Connectors on
Bar Pickups VME Rack R J4
Cables to VME
BarrierType Terminal Rack R
Blocks can be unplugged
from board for maintenance
Cable to TRPG
Figure 9-66. Turbine Control Terminal Board, Processor Board, and Cabling
9-108 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Operation
In the Simplex application, up to four pulse rate signals may be used to measure
turbine speed. Pulse rate to digital circuits are on the VTUR board. Generator and
bus voltages are brought into VTUR for automatic synchronizing in conjunction with
the turbine controller and GE excitation system. TTUR has permissive generator
synchronizing relays and controls the main breaker relay coil 52G. Shaft voltage is
picked up with brushes and monitored along with the current to the machine case.
VTUR alarms high voltages and tests the integrity and continuity of the circuitry.
SMX
JP2
To AC&DC K25
TPRO shaft RD Auto Synch
test
SVH
21 Mon
175V NS K25A
SVL 22 Synch. check
from VPRO
Shaft J5
23 Mon
SCH J4
14V NS
SCL 24
J8 08 06,7 05 04 03
Connectors
5 (TB3)
Machine Case TTL1_R
JR5 at bottom of
) VME rack B M A
MPU1RH 41 K A U
#1 Primary Filter
Magnetic NS Clamp Trip R N T
Speed PU MPU1RL 42 AC
Signals
Coupling
6 (TB3) to
TTL2_R
) TRPG P125Gen
MPU2RH 43 Filter
#2 Primary
Clamp Note 1: TTL option
Magnetic
44 NS AC ID
Speed PU MPU2RL
Coupling
available on first two
Pickups. 52G
45 Note 2: An external b
#3 Primary Filter
Magnetic NS
Clamp closed auxiliary
46 AC
Speed PU Coupling contact must be provided
the Breaker close coil Bkr Coil
47 as indicated.
#4 Primary Filter
Magnetic Clamp Note 3: Signal to
48 NS AC N125Gen
Speed PU Coupling
comes from
through TRPG &
Figure 9-67. Turbine Control Inputs, Synchronizing, and Primary Trip Interface, Simplex
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-109
In TMR applications all inputs fan to the three control racks. Control signals coming
into TTUR from R, S, and T are voted before they actuate permissive relays K25 and
K25P. Relay K25A is controlled by the VPRO and TREG boards. All three relays
have two normally open contacts in series with the breaker close coil. The TMR
arrangement is shown in Figure 9-68.
52G
a
<T> Generator
<S> Feedback
Terminal Board <R>
TTURH1B (input portion) Turbine Terminal Board 02B5 01
Board TTURH1B (continued) B5
Noise 2G 2G
JR1 J3 VTUR L H
17 Suppression
GENH J3 JR1
Gen. Volts 28Vdc
NS f( )
120 Vac
GENL 18 JP1
from PT Pulse
TMR
SMX
Rate/
Digital K25P
2 RD Synch.
BUSH 19 J3
JS1 3 Permissve
Bus Volts MUX JS1
120 Vac NS JP2 TMR
BUSL 20 A/D
from PT SMX
K25
J3 2
To AC&DC RD Auto Synch.
TPRO shaft 3
JT1
test
SVH 21
JT1
175V NS K25A
SVL 22 Synch. check
from VPRO
J4
Shaft
J5
SCH 23 Mon
14V Connectors
NS
at bottom of
SCL 24
VME rack
5 (TB3) J8 08 07 06 05 04 03
Machine TTL1R
) JR5
C MPU1RH 41 BK A
#1 Primary Filter M
Clamp Trip R A UT
Magnetic NS AC H N O
Speed PU MPU1RL 42 Coupling
Signals to
4 Circuits* TRPG
3 (TB3) P125Gen
TTL1S
) JS5 Note 1: TTL option only
MPU1SH 33 available on first two ccts.
#2 Primary Filter 52G
Clamp each group of 4
Magnetic NS AC Note 2: An external b
Speed PU MPU1SL 34 Coupling
4 Circuits* closed auxiliary
1 (TB3) contact must be provided
JT5 Bkr Coil
TTL1T
) To Rack the Breaker close coil
MPU1TH 25 as indicated.
#3 Primary Filter S
Clamp Note 3: Signal to
Magnetic NS AC N125Gen
26 comes from
Speed PU MPU1TL Coupling
through TRPG &
4 Circuits*
To Rack T
Figure 9-68. Turbine Control Inputs, Synchronizing, and Primary Trip Interface, TMR
9-110 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Features
Speed Pickups
An interface is provided for four passive, magnetic speed inputs with a frequency
range of 2 − 14,000 Hz. The median speed signal is used for speed control and for
the primary overspeed trip signal. Using passive pickups on a 60-tooth wheel, circuit
sensitivity allows detection of 2 rpm turning gear speed to determine if the turbine is
stopped (zero speed). If automatic turning gear engagement is provided in the turbine
control, this signal initiates turning gear operation.
The primary overspeed trip calculations are performed in the controller using
algorithms similar to (but not the same as) those shown in the section on the VPRO
Protection Module. The fast trip option used on gas turbines runs in VTUR and is
described below.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-111
The dc test checks the continuity of the external circuit, including the brushes,
turbine shaft, and the interconnecting wire.
Note The dc test is driven from the <R> controller only. If the <R> controller is
down, this test cannot be run successfully.
Specification
Table 9-27. VTUR Board Specifications
Item Specification
Number of Inputs TTUR: 12 Passive Speed Pickups
1 Shaft Voltage and 1 Shaft Current Measurement
1 Generator and 1 Bus Voltage
Generator Breaker Status contact
VTUR: 4 Passive Speed Pickups
1 Shaft Voltage and 1 Current Measurement
1 Generator and 1 Bus Voltage
Generator Breaker Status
8 Flame Detectors from first TRPG
Number of Outputs TTUR: Generator Breaker Coil, 5A at 125 V dc
VTUR: Automatic Synchronizing
Primary Trip Solenoid Interface, 3 outputs to TRPG
Additional 3 trip outputs from second TRPG using VTURH2
Trip Solenoids (TRPG) Solenoids draw up to 1 A at 125 V dc and have a time constant of L/R =
0.1 sec.
Power Supply Voltage TTUR: Nominal 125 V dc to breaker coil
MPU Pulse Rate Range 2 Hz to 14 kHz
MPU Pulse Rate Accuracy 0.05% of reading
MPU Input Circuit Sensitivity 27 mV pk (detects 2 rpm speed)
Shaft Voltage Monitor Voltage signal is ± 5 V dc pulses from 0 to 2,000 Hz
Shaft Voltage wiring Up to 300 m (984 ft), with maximum two-way cable resistance of 15
ohms
Shaft Voltage DC Test Applies a 5 V dc source to test integrity of the circuit. Circuit reads a
differential resistance between 0 and 150 ohms within ± 5 ohms.
Readings above 50 ohms indicate a fault.
Return signal is filtered to provide 40 dB of noise attenuation at 60 Hz.
Shaft Voltage AC Test Applies a test voltage of 1 kHz to the input of the VTUR shaft voltage
circuit (R module only).
Shaft current input Measures ac voltage up to 0.1 V pp
Generator and Bus Voltage Two Single Phase Potential Transformers, with secondary output
Sensors supplying a nominal 115 V rms.
Each input has less than 3 VA of loading.
Allowable voltage range for synch is 75 to 130 V rms.
Each PT input is magnetically isolated with a 1,500 V rms barrier.
Cable length can be up to 1,000 ft. of 18 AWG wiring.
9-112 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Generator Breaker Circuits External circuits should have a voltage range within 20 to 140 V dc. The
(Synchronizing) external circuit must include a Normally Closed Breaker Aux Contact to
interrupt the current.
Circuits are rated for NEMA class E creepage and clearance.
250 V dc applications require interposing relays.
Configuration Overview
Table 9-28 summarizes the configuration choices and defaults. For details refer to
GEH-6403, Control System Toolbox for Configuring the Mark VI Turbine
Controller.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-113
SysLim1Enable Select System Limit 1 Enable, Disable
SysLim1Latch Select whether alarm will latch Latch, Not Latch
SysLim1Type Select type of alarm initiation >= or <=
SysLimit1 Select alarm level in Amps 0 to 100
SysLim2Enable Select System Limit 2 Enable, Disable
GenPT_KVolts Generator Potential Transfomer - Card Point Point Edit (Input FLOAT)
PT_Input PT input in kVrms for PT output 0 to 1,000
PT_Output PT output in Vrms, nominal 115 V rms 0 to 150
SysLim1 Select alarm level in kVrms 0 to 1,000
SysLim2 Select alarm level in kVrms 0 to 1,000
BusPT_Kvolts Bus Potential Transformer - Card Point Point Edit (Input FLOAT)
Ckt_Bkr Circuit Breaker - Card Point Point Edit (Input BIT)
System Frequency Select frequency in Hz 50 or 60
CB1CloseTime Breaker 1 Closing Time, ms 0 to 1,000
CB1 AdaptLimit Breaker 1 Self Adaptive Limit, ms 0 to 1,000
CB1 AdaptEnabl Select Breaker 1 Self Adaptive Limit Enable, Disable
CB1FreqDiff Breaker 1 special window Frequency Difference, Hz 0 to 10
CB1PhaseDiff Breaker 1 special window Phase Diff, Degr 0 to 30
CB2CloseTime Breaker 2 Closing Time, ms (as above) 0 to 1,000
J4:IS200TRPGH1A TRPG Terminal Board, 8 Flame Detectors Connected, Not Connected
Card Points Signals Description – Point Edit (Enter Signal Connection) Direction Type
L3DIAG_VTUR1 Card Diagnostic Input BIT
L3DIAG_VTUR2 Card Diagnostic Input BIT
L3DIAG_VTUR3 Card Diagnostic Input BIT
ShShntTst_OK Shaft Voltage Monitor Shunt Test OK Input BIT
ShBrshTst_OK Shaft Voltage Brush Test OK Input BIT
CB_Volts_OK L3BKR_VLT Circuit Breaker Coil Voltage Available Input BIT
CB_K25P_PU L3BKR_PERM Sync Permissive Relay Picked Up Input BIT
CB_K25_PU L3KBR_GES Auto Sync Relay Picked Up Input BIT
CB_K25A_PU L3KBR_GEX Sync Check Relay Picked Up Input BIT
Gen_Sync_LO Generator Sync Trouble (Lockout) Input BIT
L25_Command -------- Input BIT
Kq1_Status -------- Input BIT
: : Input BIT
Kq6_Status -------- Input BIT
FD1_Flame -------- Input BIT
: : Input BIT
FD16_Flame -------- Input BIT
SysLim1PR1 -------- Input BIT
9-114 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
: : Input BIT
SysLim1PR4 -------- Input BIT
SysLim1SHV AC Shaft Voltage Frequency High L30TSVH Input BIT
SysLim1SHC AC Shaft Current High L30TSCH Input BIT
SysLim1GEN -------- Input BIT
SysLim1BUS -------- Input BIT
SysLim2PR1 (same set as for Limit1 above) Input BIT
GenFreq Hz frequency Input FLOAT
BusFreq Hz frequency Input FLOAT
GenVoltsDiff KiloVolts rms - Gen Low is Negative Input FLOAT
Gen Freq Diff Slip Hz-Gen Slow is Negative Input FLOAT
Gen Phase Diff Phase Degrees - Gen Lag is Negative Input FLOAT
CB1CloseTime Breaker #1 Close Time in milliseconds Input FLOAT
CB2CloseTime Breaker #2 Close Time in milliseconds Input FLOAT
Accel1 RPM/SEC Input FLOAT
: : Input FLOAT
Accel4 RPM/SEC Input FLOAT
FlmDetPwr1 335 V dc Input FLOAT
FlmDetPwr2 335 V dc Input FLOAT
ShTestAC L97SHAFT_AC SVM_AC_TEST Output BIT
ShTestDC L97SHAFT_DC SVM_DC_TEST Output BIT
FD1_Level 1 = High Detection Cnts Level Output BIT
: : Output BIT
FD16_Level 1 = High Detection Cnts Level Output BIT
Sync_Perm_AS L83AS - Auto Sync Permissive Output BIT
Sync_Perm L25P - Sequencing Sync Permissive Output BIT
Sync_Monitor L83S_MTR - Monitor Mode Output BIT
Sync_Bypass1 L25_BYP-1 = Auto Sync Bypass Output BIT
Sync_Bypass0 L25_BYPZ-0 = Auto Sync Permissive Output BIT
CB2_Selected L43SAUT2 - 2nd Breaker Selected Output BIT
AS_Win_Sel L43AS_WIN - Special Window Selected Output BIT
Sync_Reset L86MR_SYNC - Sync Trouble Reset Output BIT
Kq1 L20PTR1 - Primary Trip Relay Output BIT
: : Output BIT
Kq6 L20PTR6 - Primary Trip Relay Output BIT
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-115
Diagnostics
Diagnostic information includes feedback from the solenoid relay driver and contact,
high flame detector voltage, slow synch check relay, slow auto synch relay, and
locked up K25 relay. If any one of the signals goes unhealthy a composite diagnostic
alarm, L3DIAG_VTUR occurs. The diagnostic signals can be individually latched,
and then reset with the RESET_DIA signal if they go healthy.
Terminal board connectors JR1, JS1, JT1, JR5, JS5, JT5 have their own ID device
which is interrogated by the I/O board. The ID device is a read-only chip coded with
the terminal board serial number, board type, revision number, and plug location.
Automatic Synchronizing
All synchronizing connections are located on the TTUR terminal board. The
generator and bus voltages are supplied by two, single phase, potential transformers
(PTs) with a fused secondary output supplying a nominal 115 V rms. Measurement
accuracy between the zero crossing for the bus and generator voltage circuits is 1
degree.
Turbine speed is matched against the bus frequency, and the generator and bus
voltages are matched by adjusting the generator field excitation voltage from
commands sent between the turbine controller and the EX2000 over the Unit Data
Highway (UDH). A command is given to close the breaker when all permissives are
satisfied, and the breaker is predicted to close within the calculated phase/slip
window. Feedback of the actual breaker closing time is provided by a 52G/a contact
from the generator breaker (not an auxiliary relay) to update the data base. An
internal K25A synch check relay is provided on the TTUR; the independent backup
phase/slip calculation for this relay is performed in the <P> Protection Module.
Diagnostics monitor the relay coil and contact closures to determine if the relay
properly energizes or de-energizes upon command.
Synchronizing Modes
There are three basic synchronizing modes. Traditionally, these modes are selected
from a generator panel mounted selector switch:
• Off The breaker will not be closed by the Mark VI control. The check relay will
not pickup.
• Manual The operator initiates breaker close, which is still subject to the K25A
Synch Check contacts driven by VPRO. The manual close is initiated from an
external contact on the generator panel, normally connected in series with a
Synch Mode in Manual contact.
• Auto The system will automatically match voltage and speed, and then close
the breaker at the right time to hit top dead center on the synchroscope. All three
of the following functions must agree for this closure to occur:
K25A synch check relay, checks the allowable slip/phase window, from
VPRO.
K25 auto synch relay, provides precision synchronization, from VTUR.
K25P synch sequence permissive, checks the turbine sequence status, from
VTUR.
Details of the various checks are discussed in the following sections.
9-116 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Synch Check
The K25A synch check function is based on phase lock loop techniques. The
calculations for this function are done in the VPRO, but interfaces to the Breaker
close circuit on the TTUR board. It performs limit checks against adjustable
constants as follows:
• Generator undervoltage
• Bus undervoltage
• Voltage error
• Frequency error (slip), with a maximum value of 0.33 Hz, typically set to
0.27 Hz.
• Phase error with a maximum value of 30 degrees, typically set to 10 degrees.
In addition, synch check arms logic to enable the function, and provides bypass logic
for deadbus closure. The synch window in Figure 9-69 is based on typical settings:
SLIP
+0.27 Hz
PHASE
-10 +10 Degrees
-0.27 Hz
Auto Synch
The Auto Synch K25 function uses zero voltage crossing techniques. It compensates
for the breaker time delay, which is defined by two adjustable constants with logic
selection between the two (for two breaker applications). The calculations, which are
done on the VTUR board, include phase, slip, acceleration, and anticipated time lead
for the breaker delay. Based on the measured breaker close time, the time delay
parameter is adjusted, up to certain limits.
In addition, auto synch arms logic to enable the function, and bypasses logic to
provide for deadbus or manual closure. The auto synch projected synch window is
shown in Figure 9-70, where positive slip indicates the generator frequency is higher
than the bus frequency.
SLIP
0.3 Hz
0.12 Hz
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-117
The projected window is based on current phase, current slip, and current
acceleration. The generator must currently be lagging and have been lagging for the
last 10 consecutive cycles, and projected (anticipated) to be leading when the breaker
actually reaches closure. Auto synch will not allow the breaker to close with negative
slip; speed matching typically aims at around +0.12 Hz slip.
Synchronization Display
A special synchronization screen is available on the HMI with a real-time graphical
phase display and control pushbuttons. The display items are listed in Table 9-29.
Installation
Magnetic pick ups, shaft pick ups, potential transformers, and breaker relays are
wired to two I/O terminal blocks on TTUR. Each block is held down with two
screws and has 24 terminals accepting up to #12 AWG wires. A shield termination
strip attached to chassis ground is located immediately to the left of each terminal
block. Jumpers JP1 and JP2 select either SMX or TMR for relay drivers K25 and
K25P. TB3 is for optional TTL connections to active speed pickups; these require an
external power supply. The wiring connections are shown in Figure 9-71.
9-118 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Turbine Terminal Board TTURH1B
JP1 JP2
K1
TB1
x
TMR SMX TMR SMX
x 1 52G (H)
52G (L) x 2
x 3 P125GEN
AUTO x 4 K3
BKRH x 6
x 5 MAN
N125GEN x 8
x 7 BKRH
x 9
x 10
x 11
x 12 K2
x 13
x 14
x 15
x 16
x 17 Gen (H)
Gen (L) x 18
Bus (L) x 19 Bus (H)
x 20
x 21 ShaftV (H)
ShaftV (L) x 22
ShaftC (L) x 24
x 23 ShaftC (H)
x
To Connectors JR5,
JS5, JT5, JR1, JS1, JT1
TB2
TB3 Screw Connections
x
x 25 MPU 1T (H) TTL1T 01
MPU 1T (L) x 26
x 27 MPU 2T (H) TTL2T 02
MPU 2T (L) x 28
MPU 3T (L) x 30
x 29 MPU 3T (H)
MPU 4T (L) x 32
x 31 MPU 4T (H)
x 33 MPU 1S (H) TTL1S 03
MPU 1S (L) x 34
x 35 MPU 2S (H) TTL2S 04
MPU 2S (L) x 36
MPU 3S (L) x 38
x 37 MPU 3S (H)
x 39 MPU 4S (H) 01
MPU 4S (L) x 40
MPU 1R (L) x 42
x 41 MPU 1R (H) TTL1R 05
TTL2R 06 J8 x
MPU 2R (L) x 44
x 43 MPU 2R (H)
MPU 3R (L) x 46
x 45 MPU 3R (H)
x 47 MPU 4R (H)
MPU 4R (L) x 48
x
TB3
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-119
VTUR/TRPG - Primary Trip
The TRPG terminal board contains nine magnetic relays to interface with three trip
solenoids, known as the Electrical Trip Devices (ETD). The TRPG works in
conjunction with the TREG to form the Primary and Emergency sides of the
interface to the ETDs. The TRPGH1A version for TMR applications, shown in
Figure 9-72, has three voting relays per trip solenoid. The TRPGH2A version is for
simplex applications and has one relay per trip solenoid. TRPG also accommodates
eight Geiger Mueller flame detectors.
An optional double-width VTURH2A board can be cabled to a second TRPG board
for interface to three additional ETDs, but no additional Flame Detectors.
x
x 26 x 25
x 28 x 27 Cables to VME
x 30 x 29 Rack S J
x 32 x 31 5
x 34 x 33 JR1
x 36 x 35
x 38 x 37
x 40 x 39 VTUR
x 42 x 41 J2 x
x 44 x 43
x 45 J4
x 46 J5 J3
x 48
x 47
J3
x
x Cable to TTUR
(Speed signals)
Connectors on
Shield Bar VME Card Rack R
J4
335 V from
Rack Power Cable to Cable to TTUR
Supplies TREG
R, S, T
9-120 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Operation
VTUR provides the primary trip function by controlling the relays on TRPG, which
trip the main protection solenoids. In the TMR case the three inputs are voted in
hardware using a relay ladder logic two-out-of-three voting circuit. Relay coil
currents, contact status, and supply voltages are monitored for diagnostic purposes,
as shown in Figure 9-73.
3 Monitor
8 Signals to
Signals to J3
JR1,JS1,JT1 Voltage Supply
JR1,JS1,JT1
and Monitor 335 Vdc from R rack
FLAME1H
33 335 V dc J4
NS Voltage Supply
34 and Monitor 335 Vdc from S rack
FLAME1L
NS J5
Voltage Supply
Supply 8 and Monitor 335 Vdc from T rack
Eight Flame
Detector Circuits Detectors
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-121
Features
VTUR controls the main breaker via TTUR, and three trip solenoids via TRPG. With
a second TRPG, six trip solenoids can be controlled. In addition, VTUR handles
shaft speed, generator voltage, and bus voltage inputs from TTUR, plus up to eight
flame detector inputs from one TRPG board.
Flame Detectors
Up to eight flame detectors can be used for gas turbine applications. The detectors
are supplied with 335 V dc, 0.5 mA through plugs J3, J4, and J5.
With no flame present the detector charges up to the supply voltage, but presence of
the flame causes the detector to charge to a level and then discharge through the
TRPG board. As the flame intensity increases the discharge frequency increases.
When the detector discharges, VTUR and TRPG convert the discharged energy into
a voltage pulse. The pulse rate varies from 0 to 1,000 pulses/sec. These voltage
pulses are fanned out to all three modules. Voltage pulses above 2.5 volts generate a
logic high, and the pulse rate over a 40 ms time period is measured in a counter.
Specification
Table 9-30. TRPG Specification
Item Specification
Trip Solenoids 3 Solenoids per TRPG (total of 6 per VTUR)
Solenoid Rated Voltage/Current 125 V dc standard with up to 1 Amp draw
24 V dc is alternate with up to 1 Amp draw
Solenoid Response Time L/R time constant is 0.1 sec
Current Suppression Metal oxide varister (MOV) on TREG
Current Economizer Terminals for optional 10 ohm, 70 watt economizing
resistor
Control Relay Coil Voltage Supply Relays supplied with 28 V dc from R, S, and T racks
Flame Detectors 8 detectors per TRPG (total of 8 per VTUR)
Detector Supply Voltage/Current 335 V dc with 0.5 mA per detector
Configuration Overview
Like all I/O boards, the TRPG board is configured using the toolbox. This software
usually runs on a data-highway connected CIMPLICITY station or workstation.
Table 9-31 summarizes the configuration choices. For details refer to GEH-6403,
Control System Toolbox for Configuring the Mark VI Turbine Controller.
9-122 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Table 9-31. Typical TRPG Configuration
J4A:IS200TRPGH1A Second TRPG Board for expanded VTUR, with three Connected, Not Connected
more Trip Solenoid outputs, and Flame Detectors 9
through 16 (not used)
Card Points Signals Description – Point Edit (Enter Signal Connection) Direction Type
FlameInd1 Intensity (Hz) Input FLOAT
: Intensity (Hz) Input FLOAT
FlameInd8 Intensity (Hz) Input FLOAT
Diagnostics
Descriptions of the TRPG diagnostics are listed under VTUR. The diagnostics
include feedback from the trip solenoid relay driver and contact, solenoid power bus,
and the flame detector excitation voltage too low or too high.
Connectors JR1, JS1, and JT1 on the terminal board have their own ID device which
is interrogated by the I/O board. The ID device is a read-only chip coded with the
terminal board serial number, board type, revision number, and the plug location.
Installation
The three trip solenoids are wired directly to the first I/O terminal block, and the
flame detectors (if used) to the second terminal block. Power to the flame detectors is
wired to J3, J4, and J5. These connections are shown in Figure 9-74.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-123
Turbine Primary Trip Terminal Board TRPG
125 V dc
J1
x
x 1 125 Vdc (P)
Trip Solenoid 1 or 4 x 2
x 3 125 Vdc (P)
Trip Solenoid 2 or 5 x 4
6
x 5 125 Vdc (P)
Trip Solenoid 3 or 6 x
x 7
x 8
125 Vdc (N) x 10
x 9 125 Vdc (N)
x 11
x 12 To Connectors
x 13
x 14 JR1, JS1, JT1
x 15
x 16
x 17
x 18
x 19
x 20
x 21
x 22
x 23
x 24
x
To Connectors
x JR1, JS1, JT1
x 25
x 26
x 27
x 28
x 30
x 29 J2
x 31
x 32
Flame 1 (L) x 33 Flame 1 (H) Cable to TREG
x 34
x 35 Flame 2 (H)
Flame 2 (L) x 36
x 37 Flame 3 (H)
Flame 3 (L) x 38
x 39 Flame 4 (H) 335 Vdc
Flame 4 (L) x 40 J4
Flame 5 (L) x 42
x 41 Flame 5 (H)
x 43 Flame 6 (H) 335 Vdc
Flame 6 (L) x 44 J5
x 45 Flame 7 (H) 335 Vdc
Flame 7 (L) x 46
x 47 Flame 8 (H) J3
Flame 8 (L) x 48
x
9-124 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
DTRT - Simplex DIN-rail Mounted Trip Transition Board
The DTRT board is a DIN-rail mounted trip transition board that interfaces the
VTUR board with the DRLY board. DTRT allows up to six trip functions on the
VTUR to interface with DRLY, instead of the normal TRPG board. Two VTUR
boards can be connected to the DTRT to control a total of six relays on DRLY, as
shown in Figure 9-75. Only the Simplex version of this board is available. DTRT
transfers board identification from the ID chip on DRLY to VTUR for diagnostic
purposes. DTRT has its own ID chip connnected to J2.
DTRT must be used in all applications where trips from VTUR to DRLY are
required. DTRT cannot be eliminated if the application requires only one VTUR.
Three 37-pin D connectors for the three cables are provided. A high density Euro
Block type terminal block is permanently mounted to the board with three screw
connections for the ground connection (SCOM).
VTUR Boards
x x
RUN RUN
FAIL FAIL
DTRT Board VME Bus to VCMI STAT STAT
J1
J3
To DRLY board
J2
(Six relay circuits)
J J
ID 5 5
To first DTUR board
To second DTUR board VTUR VTUR
x x
J3 J3
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-125
Installation
There is no shield termination The DTRT board slides into a plastic holder, which mounts on the DIN-rail. The
strip with this design. three cables connecting VTUR and DRLY plug into the 37-pin D type connector as
shown in Figure 9-76. The first three DRLY circuits are driven by the VTUR
connected to J1, and the second three DRLY circuits are driven by the VTUR
connected to J2. Three screws are provided on terminal block TB1 for the SCOM
(ground) connection, which should be as short a distance as possible.
DTRT must be used in all applications where trips from VTUR to DRLYs are
required. DTRT is still required if the application only requires one VTUR
DTRT
TB1
1 Chassis Ground
2 Chassis Ground
3 Chassis Ground
J1 J2 J3
SCOM
9-126 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
DTUR - Simplex DIN-rail Mounted Pulse Rate Terminal
Board
The DTUR board is a compact pulse-rate terminal board, designed for DIN-rail
mounting. The board accepts four passive pulse-rate transducers (magnetic pickups)
for speed and flow measurement. It connects to the VTUR processor board with a
37-pin cable and a 15-pin cable as shown in Figure 9-77. These cables are identical
to those used on the larger TTUR terminal board. DTUR boards can be stacked
vertically on the DIN-rail to conserve cabinet space. VTUR only accommodates one
DTUR board, and only the Simplex version is available.
DTUR has on-board pulse rate signal conditioning identical to that on the TTUR.
High density Euro Block type terminal blocks are permanently mounted to the board
with two screws for the ground connection (SCOM). Two on-board ID chips identify
the connectors and board to VTUR for system diagnostic purposes.
VTUR
DTUR Board
Noise JR5
Suppresion f( )
MPU1H 1
Filter Pr/D
#1 Magnetic SCOM
Clamp
Speed Pickup
NS MUX
MPU1L 2 AC
A/D
Coupling
ID J5
MPU2H 3
Filter
#2 Magnetic SCOM
Clamp
Speed Pickup
NS
MPU2L 4 AC
Coupling
MPU3H 5
Filter
#3 Magnetic SCOM Clamp
Speed Pickup NS AC
MPU3L 6
Coupling
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-127
Installation
There is no shield termination The DTUR board slides into a plastic holder, which mounts on the DIN-rail. The
strip with this design. magnetic pickups are wired directly to the terminal block which has 36 terminals as
shown in Figure 9-78. Typically #18 AWG shielded twisted pair wiring is used.
There are two screws for the SCOM (ground) connection, which should be as short a
distance as possible.
MPU means
Magnetic Pick Up
JR5 DTUR
Screw Connections Screw Connections
1 MPU 1 (High)
MPU 1 (Low) 2
3 MPU 2 (High)
MPU 2 (Low) 4
5 MPU 3 (High)
MPU 3 (Low) 6
7 MPU 4 (High)
MPU 4 (Low) 8
Cable to J5 on 9
10
front of VTUR 11
12
board 13
14
15
JR1 16
17
18
19
20
37-pin "D" shell 21
22
connector with 23
24
latching fasteners 25
26
27
28
29
30
31
32
33
34
35 Chassis ground
Chassis ground 36
Cable to J3
connector in I/O
rack for VTUR SCOM
board Euro Block type
terminal block
Plastic mounting
holder
DIN-rail mounting
9-128 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VVIB/TVIB - Vibration/Position
The Mark VI system uses Bently Nevada probes for shaft vibration monitoring. Up
to 14 probes connect directly to the TVIB terminal board, two of which can be
cabled to the VVIB board. The signals are processed by the VVIB board, and the
digitized displacement and velocity signals are sent over the VME bus to the
controller. If desired a Bently Nevada 3500 monitoring system can be cabled into the
terminal board to permanently monitor turbine vibration. Also the type 2 terminal
board (TVIBH2A) has BNC connectors allowing portable vibration data gathering
equipment to be plugged in for predictive maintenance purposes. (The BNC signals
include a 10µ ohm isolating resistance.) These connectors are shown in Figure 9-79,
and details of the TVIB board are shown in Figure 9-80.
x
x
x 37-pin "D" shell
x 1 ...JA1
... JT1 type connectors
x 2 ...
. RUN
x 4 x 3 ... with latching FAIL
...
6 x 5 . STAT
x
x 7
...
... fasteners
Vibration x 8 .
...
x 10 x 9 ...
Signals x 11
.
...
x 12 . JB1
...
x 14 x 13 ...
...
x 16 x 15 .
x 17
...
...
.
Cable to
x 18
x 20 x 19 ...
...
. JS1 Rack T
x 22 x 21
24 x 23 JC1
x VME Bus to VCMI
x
x
x 26 x 25
x 28 x 27 Cable to
x 29 JD1 Rack S
Vibration x 30
x 32 x 31
Signals x 33 JR1
x 34 P2 P1
x 36 x 35
x 38 x 37
x 40 x 39 P6 P5 P4 P3 VVIB
x 42 x 41 x
x 44 x 43
x 46 x 45 P10 P9 P8 P7 Connectors on J3
x 48
x 47
14 13 12 P11 VME Rack R
x
x
Shield Bar
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-129
<R>
<S>
<T>
Vibration Board
Terminal Board TVIBH2A VVIB
JR1 J3
N28V 28Vdc
To
N28VR Controller
<S>
<T> Amp A/D
Current
Limit ID Sampling
1 N24V1
S CL type A/D
P V 2 PR01H Converter
S JS1 J3 (16 bit)
R s V 3mA
S N28V
O JP1A
3 PR01L P,A Same as
X S
Vib. or Pos. PCOM <S>
Eight of the
Prox. (P), or
above ccts. ID
Seismic (S), P,V,A
or Accel (A), TMR
or Velomiter N28V
JT1
Applications
S J3
(V) N28V
CL JP1B
Negative Same as
25 N24V9 Volt Ref <T>
S
P 26 PR09H ID
R S
JA1
O 27 PR09L D
S
X B2
Four of the 5
above ccts. Buffer
Position Amplifiers
Prox PCOM JB1 J4
D
B2
N28V 5
Figure 9-80. TVIB Board, Vibration Probes, and Bently Nevada Interface
9-130 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Operation
TVIB supports Proximitor, Seismic, Accelerometer, and Velomitor probes of the
type supplied by Bently Nevada. Power for the vibration probes comes from the
VVIB boards, in either Simplex or TMR mode. The probe signals return to VVIB
where they are A/D converted and sent over the VME bus to the controller.
Vibration, eccentricity, and axial position alarms and trip logic are generated in the
controller.
A –28 V dc source is supplied to the terminal board from the VME board for
Proximitor power. In TMR systems, a diode high-select circuit selects the highest
–28 V dc bus for redundancy. Regulators provide individual excitation sources, –23
to –26 V dc, short circuit protected. Probe inputs are sampled at high speed over
discrete time periods. The maximum and minimum values are accumulated, the
difference is taken (max-min) for vibration, and the results are filtered. The resulting
peak to peak voltage is scaled to yield mils (peak to peak) displacement, or velocity.
Features
Vibration Functions
Vibration probe inputs are normally used for four protective functions in turbine
applications as follows:
Vibration: Proximity probes monitor the peak-to-peak radial displacement of the
shaft (the shaft motion in the journal bearing) in two radial directions. This system
uses non-contacting probes and Proximitors, and results in alarm, trip, and fault
detection.
Rotor Axial Position: A probe is mounted in a bracket assembly off the thrust
bearing casing to observe the motion of the thrust collar on the turbine rotor. This
system uses non-contacting probes and Proximitors, and results in thrust bearing
wear alarm, trip, and fault detection.
Differential Expansion: This application uses non-contacting probe(s) and
Proximitor(s) and results in alarm, trip, and fault detection for excessive expansion
differential between the rotor and the turbine casing.
Rotor Eccentricity: A probe is mounted adjacent to the shaft to continuously sense
the surface and update the turbine control. The calculation of eccentricity is made
once per revolution while the turbine is on turning gear. Alarm and fault indications
are provided.
Probes
The eight vibration inputs on each terminal board can be applied as either
proximitor, accelerometer, seismic (velocity), or velomitor inputs. Jumpers on the
terminal board are used to assign a specific vibration sensor type to each input point
with the seismic type assigned to point (S), the velomitor type assigned to point (V),
and the proximitor and accelerometer types sharing point (P/A). A proximitor reads a
shaft keyway to generate a once per revolution KeyPhasor input for phase angle
reference.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-131
A probe fault, alarm, or trip condition will occur if either of an X or Y probe pair
exceeds its limits. In addition, the application software will inhibit a vibration trip
(the ac component) if a probe fault is detected based on the dc component.
Position inputs for thrust wear protection, differential expansion, and eccentricity are
monitored similar to the vibration inputs except only the dc component is used for a
position indication. A 16-bit sampling type A/D converter is used with 14-bit
resolution and overall circuit accuracy of 1% of full scale.
Specification
Table 9-32. VVIB Specification
Item Specification
Number of Channels TVIB: 13 probes:
8 Vibration, 4 Position, 1 Key Phasor
VVIB: 26 probes with two TVIB boards
9-132 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Configuration
Table 9-33. VVIB Configuration
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-133
Vib1 Vibration, displacement (pk-pk) or velocity (pk) - Card Point Edit (Input FLOAT)
Point
SysLim1Enable System limits configured as above Enable, Disable
GAP2_VIB2 Second Vibration Probe of 8 - Card Point Point Edit (Input FLOAT)
Vib2 Vibration, displacement (pk-pk) or velocity (pk) - Card Point Edit (Input FLOAT)
Point
GAP9_POS1 First Position Probe of 4 - Card Point Point Edit (Input FLOAT)
GAP13_KPH1 Key Phasor Probe air gap - Card Point Point Edit (Input FLOAT)
Card Points Signals Description - Point Edit (Enter Signal Connection) Direction Type
L3DIAG_VVIB1 Card Diagnostic Input BIT
L3DIAG_VVIB2 Card Diagnostic Input BIT
L3DIAG_VVIB3 Card Diagnostic Input BIT
SysLim1GAP1 Gap signal limit Input BIT
: : Input BIT
SysLim1GAP26 Gap signal limit Input BIT
SysLim2GAP1 Gap signal limit Input BIT
: : Input BIT
SysLim2GAP26 Gap signal limit Input BIT
SysLim1VIB1 Vibration signal limit Input BIT
: : Input BIT
SysLim1VIB16 Vibration signal limit Input BIT
SysLim1ACC1 Acceleration signal limit Input BIT
: : Input BIT
SysLim1ACC9 Acceleration signal limit Input BIT
SysLim2VIB1 Vibration signal limit Input BIT
: : Input BIT
SysLim2VIB16 Vibration signal limit Input BIT
SysLim2ACC1 Acceleration signal limit Input BIT
: : Input BIT
SysLim2ACC9 Acceleration signal limit Input BIT
RPM_KPH1 Speed RPM, of KP #1 Input FLOAT
RPM_KPH2 Speed RPM, of KP #2 Input FLOAT
Vib1X1 Vibration, 1X component only, displacement Input FLOAT
9-134 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
: : Input FLOAT
Vib1X16 Vibration, 1X component only, displacement Input FLOAT
Vib1XPH1 Angle of 1X component to KP Input FLOAT
: : Input FLOAT
Vib1XPH16 Angle of 1X component to KP Input FLOAT
LM_RPM_A -------- Output FLOAT
LM_RPM_B -------- Output FLOAT
LM_RPM_C -------- Output FLOAT
Installation
Fourteen vibration probes are wired to the two terminal blocks, three wires per
probe. Jumpers JP1 through JP8 select the type of the first eight probes. Refer to
Figure 9-81 for wiring and connector pin assignments. Use of connectors JA1, JB1,
JC1, and JD1 for a Bently Nevada system is optional, and there are no permanent
cable connections to BNCs P1 through P14.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-135
S P,V,A
Vibration Terminal JPxB B/N Buffer: Jumper
Board TVIBH2A JPxA Sensor Input: V P,A Positions
S
JP1B Probe
x JP1A Selection
x 1 N24V01 JP2B Jumpers
PR01 (H) x 2
N24V02 x 4
x 3 PR01 (L) JP2A
x 5 PR02 (H) JP3B
PR02 (L) x 6
x 7 N24V03 JP3A
PR03 (H) x 8 JP4B
N24V04 x 10
x 9 PR03 (L)
x 11 PR04 (H) Vibration JP4A
PR04 (L) x 12 JP5B
x 13 N24V05 probes
PR05 (H) x 14 JP5A
x 15 PR05 (L) JP6B
N24V06 x 16
PR06 (L) x 18
x 17 PR06 (H) JP6A
PR07 (H)
x 19 N24V07 JP7B
x 20
N24V08 x 21 PR07 (L) JP7A
x 22
x 23 PR08 (H) JP8B
PR08 (L) x 24
JP8A
x
Connectors JR1, JS1, JT1, to VME Racks
9-136 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
DVIB - Simplex DIN-rail Mounted Vibration Terminal
Board
The DVIB board is a compact vibration terminal board, designed for DIN-rail
mounting. (Designed to meet UL 1604 specification for operation in a 65 °C class 1,
division 2 environment.) The board accepts eight vibration, four position, and one
keyphasor input. It connects to the VVIB processor board with a 37-pin cable as
shown in Figure 9-82. These cables are identical to those used on the larger TVIB
terminal board. VVIB accommodates two DVIB boards, and only the simplex
version is available.
High-frequency decoupling to ground on all signals is the same as on TVIB. High
density Euro Block type terminal blocks are permanently mounted to the board with
two screws for the ground connection (SCOM). An on-board ID chip identifies the
board to VVIB for system diagnostic purposes.
<R>
Vibration Board
DVIB Board VVIB
JR1 J3
N28V 28Vdc
To
N28VR
Controller
Amp A/D
Current
Limit ID Sampling
1 N24V1
S CL type A/D
P V 2 PR01H Converter
S (16 bit)
R S V 3mA
O S
3 PR01L JP1A P,A
X S
Vib. or Pos.
Eight of the PCOM
Prox. (P), or P28V
above ccts.
Seismic (S),
or Accel (A),
N28V
or Velomiter
(V)
CL
25 N24V9
S
P 26 PR09H
R S
O 27 PR09L J4
S
X Four of the
Position above ccts.
Prox PCOM
N28V
CL
37 N24V13
S
P 38 PR13H
R S
O 39 PR13L
S
X
Reference or PCOM
Keyphasor
Prox.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-137
Installation
The DVIB board slides into a plastic holder, which mounts on the DIN-rail. The
vibration probes are wired directly to the terminal block which has 42 terminals as
There is no shield terminal shown in Figure 9-83. Typically #18 AWG shielded twisted triplet wiring is used.
strip with this design. There are two screws for the SCOM (ground) connection, which should be as short a
distance as possible.
Plastic mounting
DIN-rail mounting holder
9-138 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VGEN/TGEN - Generator Board
The generator board VGEN and its terminal board TGEN monitor the generator
three-phase voltage and currents, and calculate three-phase power and power factor.
The boards and cabling are shown in Figure 9-84. For large steam turbine
applications, VGEN provides the Power Load Unbalance (PLU) and Early Valve
Actuation (EVA) functions, using fast acting solenoids located on the TRLY
terminal board.
TB2
Cable to VME
Rack S
Gen CT TB3 JR1
Signals
VGEN
x
TB4
Connectors on J3
VME Rack R
x
Cable to VME
Shield Bar Rack R
J4
Operation
VGEN monitors two, three-phase potential transformer (PT) inputs, and three, one-
phase current transformer (CT) inputs. On TGEN there are four analog inputs which
can be configured for 4-20 mA or ± 5, ± 10 V dc.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-139
Test points on the generator and bus voltages and currents are for checking the phase
of the input signals. Signal conversion and calculations of power, power factor and
frequency take place on the VGEN board. Details of the terminal board are shown in
Figure 9-85.
Note TGEN may be used with on VGEN board (Simplex) or three VGEN boards
(TMR).
<R>
<S>
<T>
Terminal Board TGEN Controller
Analog Inputs 4 Circuits per Term. Board
Noise
TB1 Suppression.
01 P28VV P28V, R Generator
+24 Vdc Current Limit
Board
S
03 Vdc JP1A VGEN
+/-5,10 Vdc T
02 20 ma
4-20 ma
250 ohms
04
Return
JP1B 115 Vrms yields Shown
Open Return 1.5333 Vrms, for <R>
Gen & Bus JR1 J3 +28 Vdc
PCOM
17
TB1
18 PCOM Test Points A/D
A 19 TP-GA
Generator To TRLY
3-Phase TP-GB ID from
B 20
<R>
Volts JS1 J3
C 21
TP-GC Buffer <S>
(115 Vac) <T>
A 22
TP-BA
Bus Same
3-Phase B 23
TP-BB for <S>
Volts ID
C 24
TP-BC
(115 Vac)
TB2 JT1 J3
TP-IA1
H1 01 1:2000
Current - H2 02 100 ohms
Phase A TP-IA2 0.01%
Same
L1 03 for <T>
(115 Vac)
L2 04
TB3 TP-IB1 ID
H1 01 1:2000
Figure 9-85. TGEN Board Showing Potential and Current Transformer Inputs
9-140 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Features
VGEN monitors generator three-phase power, and supplies the Power Load
Unbalance (PLU) and Early Valve Actuation (EVA) functions for large steam
turbines.
Power Monitoring
The generator and bus PT inputs are three-wire, open delta, voltage measurements
that are used to calculate all three line-to-line voltages. They are not used for
automatic synchronizing which requires two separate single-phase PT inputs. Each
PT input is nominally 115 V rms, and the PTs are magnetically isolated.
Three single-phase CT inputs are provided with a normal current range of 0 to 5 A
continuous. The CTs are magnetically isolated on TGEN. Terminations for the CTs
are on non-pluggable terminal blocks with captive lugs accepting are up to #10
AWG wires. Test points are provided for all PT and CT inputs to verify the phase in
the field. The following parameters are calculated from these inputs:
• Total MWatts
• Total MVars
• Total MVA
• Power Factor
• Bus Frequency (5 to 66 Hz)
The four analog inputs can accept 4−20 mA inputs or ± 5, ±10 V dc inputs. A +24 V
dc source is available for all four circuits with individual current limits for each
circuit. The 4−20 mA transducer can be connected to use the +24 V dc source from
the turbine control or as a self-powered source. A jumper is located on the terminal
board to select between current and voltage inputs for each circuit. High frequency
and 50/60 Hz noise is reduced with an analog hardware filter
Specification
Table 9-34. VGEN Specification
Item Specification
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-141
Analog Inputs Current Inputs: 4−20 mA
Voltage Inputs: ± 5 V dc or ± 10 V dc
Transducers can be up to 300 m (984 ft) from the control cabinet
with a two-way cable resistance of 15 ohms.
Input burden resistor on TGEN is 250 ohms.
Jumper selection of single ended or self powered inputs
Jumper selection of voltage or current inputs
Analog Input Filter: Breaks at 72 and 500 radians/sec
Ac Common Mode Rejection (CMR) 60 dB
Dc Common Mode Rejection (CMR) 80 dB
Conversion Accuracy Sampling type 16-bit A/D Converter, 14 bit resolution
Accuracy 0.1% overall
Frame Rate 100 Hz
Calculated values Total MWatts and MVars have an accuracy of 1% FS, and 0.5%
for totalizing.
Total MVA and Power Factor have an accuracy of 1% full scale.
Bus frequency (5 to 66 Hz) has an accuracy of ± 0.1%.
Configuration
Table 9-35. Typical VGEN Configuration
9-142 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Low Input Input MA at low value −10 to 20
Low Value Input value in Engineering Units at low MA −3.4028e+038 to 3.4028e+038
(configuration inputs the same as for TBAI)
System Limits Standard System Limits (see TBAI configuration)
GenPT_Vab_KV Generator Potential Transformer Input "ab", (first of 3) Point Edit (Input FLOAT)
- Card Point
PT_Input PT Input in KiloVolts rms for PT_output 1 to 1,000
PT_Output PT Output in Volts rms for PT_Input-typically 115 60 to 150
Phase Shift Compensating Phase Shift, applied to PT signals Zero, Plus 30, Plus 60, Minus 30,
Minus 60
System Limits Standard System Limits (similar to Analog Inputs)
BusPT_Vab_KV Bus Potential Transformer Input "ab", (first of three) Point Edit (Input FLOAT)
configuration similar to GenPT - Card Point
GenCT_A Generator Current Transformer A (first of three) - Card Point Edit (Input FLOAT)
Point
CT_Input CT Input in Amperes rms for rated CT_Output 100 to 50,000
CT_Output Rated CT Output in Amperes rms, typically 5 1 to 5
System Limits Standard System Limits (similar to genPT)
Card Points Signals Description – Point Edit (Enter Signal Name) Direction Type
L3DIAG_VGEN1 Card Diagnostic Input BIT
L3DIAG_VGEN2 Card Diagnostic Input BIT
L3DIAG_VGEN3 Card Diagnostic Input BIT
SysLim1Anal1 System Limit 1 exceeded on Analog cct #1 Input BIT
: : Input BIT
SysLim1Anal4 System Limit 1 exceeded on Analog cct #4 Input BIT
SysLim2Anal1 System Limit 2 exceeded on Analog cct #1 Input BIT
: : Input BIT
SysLim2Anal4 System Limit 2 exceeded on Analog cct #4 Input BIT
SysL1GenPTab System Limit 1 exceeded on Gen PT, Vab Input BIT
SysL1GenPTbc System Limit 1 exceeded on Gen PT, Vbc Input BIT
SysL1GenPTca System Limit 1 exceeded on Gen PT, Vca Input BIT
SysL1BusPTab System Limit 1 exceeded on Bus PT, Vab Input BIT
SysL1BusPTbc System Limit 1 exceeded on Bus PT, Vbc Input BIT
SysL1BusPTca System Limit 1 exceeded on Bus PT, Vca Input BIT
SysL2GenPTab System Limit 2 exceeded on Gen PT, Vab Input BIT
SysL2GenPTbc System Limit 2 exceeded on Gen PT, Vbc Input BIT
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-143
SysL2GenPTca System Limit 2 exceeded on Gen PT, Vca Input BIT
SysL2BusPTab System Limit 2 exceeded on Bus PT, Vab Input BIT
SysL2BusPTbc System Limit 2 exceeded on Bus PT, Vbc Input BIT
SysL2BusPTca System Limit 2 exceeded on Bus PT, Vca Input BIT
SysL1GenCTa System Limit 1 exceeded on Gen CT, Phase A Input BIT
SysL1GenCTb System Limit 1 exceeded on Gen CT, Phase B Input BIT
SysL1GenCTc System Limit 1 exceeded on Gen CT, Phase C Input BIT
SysL2GenCTa System Limit 2 exceeded on Gen CT, Phase A Input BIT
SysL2GenCTb System Limit 2 exceeded on Gen CT, Phase B Input BIT
SysL2GenCTc System Limit 2 exceeded on Gen CT, Phase C Input BIT
Relay01_Fdbk Status of Relay 01 Input BIT
: : Input BIT
Relay12_Fdbk Status of Relay 12 Input BIT
L10PLU_EVT Power Load Unbalance event Input BIT
L10EVA_EVA Early Valve Actuation event Input BIT
GenMW Generator MWatts Input FLOAT
GenMVAR Generator MVars Input FLOAT
GenMVA Generator MVA Input FLOAT
GenPF Generator Power Factor, 0/1/0 Input FLOAT
BusFreq Bus Frequency, Hz Input FLOAT
PLU_Tst Power Load Unbalance Test Output BIT
EVA_Tst Early Valve Actuation Test Output BIT
IV_Trgr Intercept Valve Trigger Command Output BIT
EVA_ExtCmd Early Valve Actuation External Command Output BIT
EVA_ExtPrm Early Valve Actuation External Permissive Output BIT
TN_Hz PLL Center Frequency, Hz Output FLOAT
MechPower Mech Power, percent, when config via signal space Output FLOAT
AnalogIn1 Analog Input 1 Input FLOAT
: : Input FLOAT
AnalogIn4 Analog Input 4 Input FLOAT
GenPT_Vab_KV Kilo-Volts RMS Input FLOAT
GenPT_Vbc_KV Kilo-Volts RMS Input FLOAT
GenPT_Vca_KV Kilo-Volts RMS Input FLOAT
BusPT_Vab_KV Kilo-Volts RMS Input FLOAT
BusPT_Vbc_KV Kilo-Volts RMS Input FLOAT
BusPT_Vca_KV Kilo-Volts RMS Input FLOAT
GenCT_A Generator Amperes RMS, phase A Input FLOAT
GenCT_B Generator Amperes RMS, phase B, same config as Input FLOAT
Phase A
9-144 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
GenCT_C Generator Amperes RMS, phase C, same config as Input FLOAT
Phase A
Relay01_Tst Fast Acting Sol #1 Test Output BIT
: : Output BIT
Relay12_Tst Fast Acting Sol #12 Test Output BIT
Diagnostics
Diagnostics perform a high/low (hardware) limit check on the input signal and a
high/low system (software) limit check. The software limit check is adjustable in the
field. Open wire detection is provided for voltage inputs, and relay drivers and coil
currents are monitored.
Connectors JR1, JS1, and JT1, on the terminal board have their own ID device which
is interrogated by the I/O board. The ID device is a read-only chip coded with the
terminal board serial number, board type, revision number, and the plug location. .
Installation
The analog current and PT inputs are wired to terminal block 1. The CTs are wired to
special terminal blocks TB2, 3, and 4, which cannot be unplugged. This protects
against an open CT circuit. Jumpers J1A,B through J4A,B set the desired input
current or voltage on analog inputs 1 through 4. The wiring connections are shown in
Figure 9-86.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-145
Generator Terminal Board TGEN
Analog Input Jumpers JT1
CurAH1 1
CurAH2 2
CurAL1 TB2
3 JR1
CurAL2 4
CurBH1 1
CurBH2 2
TB3
CurBL1 3
CurBL2 4
CurCH1 1
CurCH2 2 Test Points
TB4
CurCL1 3
CurCL2 4
9-146 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VPYR/TPYR - Pyrometer Board
The Optical Pyrometer Board (VPYR) provides a dynamic temperature profile of the
rotating turbine blades, and computes temperature conditions that can lead to a trip.
The Pyrometer terminal board (TPYR) is wired to two infrared TBTMS
thermometers, known as Pyrometers, and to two KeyPhasor Proximitor probes for
shaft reference. Dedicated analog to digital converters on VPYR provide sampling
rates up to 200,000 samples per second for burst data from two of the temperature
channels. Fast temperature data is made available for display and off-line evaluation.
The terminal board has Simplex and TMR capability, as shown in Figure 9-87.
x
x 26
x 25
x 28
x 27
x 30 x 29
KeyPhasor x 31
x 32 JR1
Wiring x 34 x 33
x 36
x 35
x 38 x 37
x 40
x 39 Cable to VME VPYR
x 42
x 41 Rack R x
44 x 43
x
45
Connectors on
x 46
x J3
x 47 VME Rack
x 48
x
x
Shield Bar
J4
BarrierType Terminal
Blocks can be unplugged
from board for maintenance
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-147
Operation
Analog signals from the terminal board, shown in Figure 9-88, are cabled to the
VPYR processor board where signal sampling and conversion take place. VPYR
calculates the temperature profiles and runs turbine protection algorithms using both
pyrometer signals. If a trip is indicated and the signals are validated, VPYR issues
the trip signal.
<T>
Chan A TPYR Terminal Board <S>
<R>
1 P24A Current P28VX VPYR Pyrometer Board
2 PCOM Limiter
JR1 J3
P 3 N24A Current N28VX Chan A
Limiter Fast
Y 4 PCOM Fan Fast A/D sampling
R 100 ohms Distrib P28VR
5 20ma A1
O -ution N28VR
6 RetA1 Average Chan B Fast
M Fast
A/D sampling
E 7 20ma A2
ID
8 RetA2 Max-Pk
T All
E 9 20ma A3 others
Mux A/D
R 10 RetA3 Avg-Pk
11 20ma A4
12 RetA4 Fast JS1 J3
9-148 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Features
Optical Pyrometer Measurements
Two infrared pyrometers dynamically measure the temperature profile of the rotating
turbine blades. Each pyrometer is powered by a +24 V dc and a –24 V dc source on
the terminal board, diode selected from voltages supplied by the three VPYR boards.
Four 4−20 mA signals are returned from each pyrometer, representing the following
blade measurements:
• The average temperature
• The maximum peak temperature
• The average peak temperature
• A fast dynamic profile, with 30 kHz bandpass, providing the full signature.
Each 4−20 mA input generates a voltage across a resistor which is sent to the VPYR
board where it is multiplexed and converted. A dedicated A/D converter is used to
sample the fast input (#4) at up to 200,000 samples per second. VPYR can be
configured for different numbers of turbine buckets, with up to 30 temperature
samples per bucket.
KeyPhasor Inputs
Two keyphasors are used for shaft position reference, one as a backup. These
keyphasor probes and associated circuitry are identical to those used with
TVIB/VVIB. They sense a shaft keyway or pedestal to provide a time stamp.
Diagnostics
VPYR provides system limit checking on the KeyPhasor gap signals. The two
pyrometer inputs are compared against configuration limits to determine if they are
tracking, and the fast data is compared with other inputs to check validity.
Connectors JR1, JS1, and JT1, on the terminal board have their own ID device which
is interrogated by the I/O board. The ID device is a read-only chip coded with the
terminal board serial number, board type, revision number, and the plug location.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-149
Specification
Table 9-36. VPYR Board Specifications
Item Specification
Number of Inputs 2 Pyrometers, each with 4 analog 4–20 mA current signals
(TPYR and VPYR) 2 Key Phasor probes, each with –0.5 to –20 V dc inputs
Current Inputs from Pyrometers 4-20 mA across a 100 ohm resistor
Common Mode Rejection: Dc up to ± 5 V dc, CMRR of 80 dB
Ac up to ± 5 Volt peak, CMRR of 60 dB
Measurement accuracy of ± 0.1 % full scale, 14-bit resolution
Bandwidth of 0 to 100 Hz on 6 slow inputs using multiplexed A/D converter
Bandwidth of 0 to 30,000 Hz on two fast inputs using dedicated A/D converters,
sampling at 200,000 per sec.
Keyphasor Inputs Input voltage range of –0.5 to –20 V dc
Common Mode Rejection: CMR of 5 Volt, CMRR of 50 dB at 50/60 Hz
Accuracy 2 % of full scale (0.2 V dc)
Dc level detection typically 0.2 V/mil sensitivity
Speed measurement 2 to 5,610 RPM with accuracy of 0.1 % of reading
Device Excitation Pyrometers have individual power supplies, current limited:
P24V source is diode selected, +22 to +30 V dc, 0.175 Amp
N24V source is diode selected, -22 to -30 V dc, 0.175 Amp
Measurement Parameters Rated RPM up to 5,100 RPM
Number of Buckets per stage, up to 92
Number of samples per bucket, up to 30
Fast inputs sampled in bursts covering three revolutions, at twice per second.
Configuration Overview
Like all I/O boards, VPYR is configured using the Control System Toolbox. This
software usually runs on a data-highway connected CIMPLICITY station or
workstation. Table 9-37 summarizes the configuration choices and defaults. For
details refer to GEH-6403, Control System Toolbox for Configuring the Mark VI
Turbine Controller.
9-150 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
SetptR2_A Setpoint, Rate 2, Pyr A 0 to 30
SetptR2B_A Setpoint, Rate 2, Bias, Avg temp, Pyr A −1 to 1
SetptR3_A Setpoint, Rate 3, Pyr A 0 to 30
SetptR3B_A Setpoint, Rate 3, Bias, Avg temp, Pyr A −1 to 1
SetptD_A Setpoint distance, Pyr A 0 to 30
SetptDB_A Setpoint distance. Bias, Avg Temperature, Pyr A −1 to 1
SetptDDepth_A Setpoint, Depth of the Distance measurement, Pyr A 0 to 30
Rate2Enab_A Enable, Temperature rate 2, Pyr A Enable, Disable
Rate3Enab_A Enable, Temperature rate 3, Pyr A Enable, Disable
DistEnab_A Enable Temperature rate 3, Pyr A Enable, Disable
Same Configuration for Channel B Pyrometer
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-151
Card Points (Signals) Description – Point Edit (Enter Signal Name) Direction Type
L3DIAG_VPYR1 Card Diagnostic Input BIT
L3DIAG_VPYR2 Card Diagnostic Input BIT
L3DIAG_VPYR3 Card Diagnostic Input BIT
TripPyrA Bucket Temp Rate Trip, Pyrometer A Input BIT
TripPyrB Bucket Temp Rate Trip, Pyrometer B Input BIT
KeyPh1Act Keyphasor 1 Active Input BIT
KeyPh2Act Keyphasor 2 Active Input BIT
SysLim1KP1 System Limit Input BIT
SysLim2KP1 System Limit Input BIT
SysLim1KP2 System Limit Input BIT
SysLim2KP2 System Limit Input BIT
FastMxMxPk_A Fast, Max of the Max Peaks Temp, Pyr A Input FLOAT
FastAgMxPk_A Fast, Average of the Max Peaks Temp, Pyr A Input FLOAT
FastMnMnPk_A Fast, Min of the Min Peaks Temp, Pyr A Input FLOAT
FastAgMnPk_A Fast, Average of the Min Peaks, Pyr A Input FLOAT
FastMxMxPk_B Fast, Max of the Max Peaks Temp, Pyr B Input FLOAT
FastAgMxPk_B Fast, Average of the Max Peaks Temp, Pyr B Input FLOAT
FastMnMnPk_B Fast, Min of the Min Peaks Temp, Pyr B Input FLOAT
FastAgMnPk_B Fast, Average of the Min Peaks, Pyr B Input FLOAT
RPM_KPH1 RPM Keyphasor #1 Input FLOAT
RPM_KPH2 RPM Keyphasor #2 Input FLOAT
TripBuckIx_A Index of the first Bucket causing trip, Pyr A Input FLOAT
TripBuckNb_A Number of Buckets causing trip, Pyr A Input FLOAT
TripBuckIx_B Index of the first Bucket causing trip, Pyr B Input FLOAT
TripBuckNb_B Number of Buckets causing trip, Pyr B Input FLOAT
LogTrigger When true, records freeze, two before, one after Output BIT
TurbRPM Turbine Speed in RPM Output FLOAT
SlowAvg_A Slow, Average Temperature, Pyr A Input FLOAT
SlowMXPk_A Slow, Max Peak Temperature, Pyr A (configuration Input FLOAT
similar to above)
SlowAvgPk_A Slow, Average Peak Temperature, Pyr A Input FLOAT
FastAvg_A Fast, Average Temperature, Pyr A Input FLOAT
SlowAvg_B Slow, Average Temperature, Pyr B Input FLOAT
SlowMXPk_B Slow, Max Peak Temperature, Pyr B Input FLOAT
SlowAvgPk_B Slow, Average Peak Temperature, Pyr B Input FLOAT
FastAvg_B Fast, Average Temperature, Pyr B Input FLOAT
GAP_KPH1 Air Gap, Keyphasor #1 Input FLOAT
GAP_KPH1 Air Gap, Keyphasor #1 Input FLOAT
9-152 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Installation
The two optical pyrometers are wired to the first terminal block on TPYR, and the
two KeyPhasor probes are wired to the second terminal block. Power comes in
through the JR1, JS1, and JT1 connectors. There are no jumpers as on the TVIB
board. The wiring connections are shown in Figure 9-89.
PCOM1 (A) x 2
x 1 P24 (A)
PCOM2 (A) x 4
x 3 N24 (A)
Pyr A Ret (A1) x 6
x 5 20ma (A1)
wiring
x 7 20ma (A2)
Ret (A2) x 8
x 9 20ma (A3)
Ret (A3) x 10
x 11 20ma (A4) Cable to <R>
Ret (A4) x 12
x 13 P24 (B)
PCOM1 (B) x 14
x 15 N24 (B)
PCOM2 (B) x 16
x 17 20ma (B1) JS1
Pyr B Ret (B1) x 18
x 19 20ma (B2)
wiring Ret (B2) x 20
Ret (B3) x 22
x 21 20ma (B3)
Ret (B4) x 24
x 23 20ma (B4)
x
x
x 25
x 26 Cable to <S>
x 27
x 28
x 29
Key N24 Pr (1) x 30
phasors PrL (1) x 32
x 31 PrH (1) JT1
1&2 PrH (2) x 34
x 33 N24Pr (2)
x 36
x 35 PrL (2)
x 37
x 38
x 39
x 40
x 41
x 42
x 43
x 44
x 45
x 46
x 47
x 48
x
Cable to <T>
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-153
VSCA/DSCB - Serial Communications Board
The Serial Communications Board (VSCA) provides I/O interfaces with external
devices, using RS232C, RS422, and RS485 serial communications (see Figure 9-90).
Currently the IS200VSCAH2A version is available. The associated Din-Rail
mounted Serial Communications Terminal Board (DSCB) is wired to the external
devices, which include intelligent pressure sensors such as the smart Honeywell
Pressure Transducers (see Figure 9-91).
Connectivity between VSCA and the DSCB terminal board(s) is through the J6 and
J7 front panel connectors. These are parallel connected, each using the a 37-pin D
shell connector, with group shielded twisted pair wiring. Connectivity between the
terminal board and the external device is through the Euro Block (Phoenix type),
using screw terminations and twisted shielded pair, AWG#18, wiring.
The DSCB terminal board includes two screws for SCOM (ground) that must be
connected to a good shield ground. DSCB can interface external devices up to
distances of 1000 ft. for RS422 and RS485, at baud rates up to 375 kbps. For
RS232C, the distance is only 50 ft, or 2500 pF of cable capacitance (including the
cable from VSCA to the DSCB). It supports short haul modems for longer distances.
Operation
The VSCA is a single slot board, providing six serial communication ports. Each
port is independently configurable to an RS232C, RS485, or RS422 interface, using
a three position group jumper (berg array). Both RS232C and RS422 support full
duplex. The line drivers are located on the VSCA board, and include appropriate
termination resistors, with configurable jumpers, to accommodate multidrop line
networks. Outputs for RS422 and RS485 have tri-state capability. Inputs/Outputs go
to high impedance condition when powered down. They do not cause significant
disturbance when powered down/up (less than 10 ms) on a party line. The open wire
condition on a receiver is biased to a high state.
• RS232C supports: RXD, TXD, DTR/RTS, GND, CTS (five wire)
• RS422 supports: TX+, TX-, RX+, RX-, GND
• RS485 supports: TX/RX+, TX/RX-, GND
The VSCA/DSCB is a Data Terminal Device (DTE).
VSCA Jumpers
Jumpers JP1 thru JP6 are block jumpers, used to select the port electrical
characteristic, RS232C, RS422, or RS485. Each jumper has three positions marked
232, 422, and 485.
Jumpers JP7 thru JP12 are block jumpers, used to select the correct termination
configuration for all the transmission lines (Tx). Each jumper has three positions
marked TRM, THR, and PRK where:
• TRM means with terminating resistor.
• THR means no terminating resistor, pass through to J7.
• PRK means no terminating resistor, or Park position.
Jumpers JP13 thru JP18 are block jumpers, and are used to select the correct
termination configuration for all the Receive lines (Rx). Each jumper has three
positions marked TRM, THR, and PRK, where the meanings are the same as above.
9-154 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Table 9-38. VSCA Board Jumper Positions
Features
Data Flow from VSCA to Controller
Data Flow from VSCA to the controller UCV_ is of two types, fixed I/O and
Modbus I/O. Fixed I/O is associated with the smart pressure transducers and the
Kollmorgen electric drive data. This data is completely processsed every frame, the
same as conventional I/O. The required frame rate is 100 Hz. These signals are
mapped into signal space, using the .tre file, and have individual health bits, use
system limit checking, and have offset/gain scaling.
Modbus I/O is the I/O associated with the Modbus ports. Because of the quantity of
these signals, they are not completely processed every frame; instead they are
packetized, and transferred to the UCV_ processor, over the IONet through a special
service. This can accommodate up to 2400 bytes, at 4 Hz, or 9600 bytes at 1 Hz, or
combinations thereof. This I/O is known as second class I/O, where coherency is at
the signal level only, not at the device or board level. Health bits are assigned at the
device level, the UCV_ expands (fully populate) for all signals, and system limit
checking is not performed. Two consecutive time outs are required before a signal is
declared unhealthy. Diagnostic messages are used to annunciate all communication
problems.
Ports 1 and 2 only (as an option) support the Honeywell pressure configuration. It
reads inputs from the Honeywell Smart Pressure Transducers, type LG-1237; this
service is available on ports 1 and 2 only, as an option (Pressure Transducers or
ModBus). The Pressure Transducer Protocol utilizes interface board
DS200XDSAG#AC, and RS422. Each port can service up to six transducers. The
service is 375 kbaud, asynchronous, 9 data bits, (11 bits including start and stop). It
includes failsafe features as follows:
• Communication miss counters, one per device, and associated diagnostics.
• After four consecutive misses it forces the input pressure to 1.0 psia, and posts a
diagnostic. After four consecutive hits (good values) it removes the forcing and
the diagnostic.
Three ports (any three, but no more than three) support the Kollmorgen electric
drive. It communicates with a Kollmorgen Electric Fast Drive FD170/8R2-004 at
19200 Baud rate, point to point, using RS422.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-155
Modbus service. The current Modbus design supports the Master mode, however
the design does not preclude the future enhancement of Modbus slave mode of
operation. It is configurable, at the port level as follows:
• Used , Not Used
• Baud Rate RS232C: 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600
RS485/422: 19200, 38400, 57600, 115000
• Parity: none, odd, even
• Data Bits: seven, eight
• Stop Bits: one, two
• Station Addresses
• Multidrop, up to 8 devices per port; maximum of 18 devices per board
• RTU
• Time Out (seconds) per device
The Modbus service is configurable at the signal level as follows:
• Signal Type
• Register Number
• Read/Write
• Transfer Rate, 0.5, 1, 2, or 4 Hz
• Scaling, Offset, and Gain
The service supports Function Codes 1-7, 15, and 16; it also supports double 16-bit
registers for floating point numbers and 32-bit counters. It periodically (20 s)
attempts to reestablish communications with a dead station.
Type casting and scaling of all I/O signals to/from engineering units are supported
on the VSCA and the toolbox, for both fixed I/O and Modbus I/O.
9-156 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Twisted shielded pair
AWG#18 min, up to
1000 ft, ground shields at
Mark VI end only
Mark VI Control J2
8+ Electric Drive
9 - Rx
FD170/8F2-004
4+
6 - Tx
5 Grd
V D J4
S S 3
C C 6 Enable
A B 7 P24V
8 Enable
31 Crit Fault
32 Relay chassis
J1 J4 23 18 20 22
4 5 1236 30 27 17 19 21 28
+
T 125 VDC Power
R -
V
Ph C
L
Ph A
Ph B
Cos
Grd
Ref
Sin
C Y Drive Enable Relay
C L4FMVn_ENAX
T
C Enable = Close
B
C
I
Contact Input
L5FMVn_CFZ 1 2 3 5 4 6 7 8 FE A B DCG
Fault = Open Motor Grd Ther Resolver
Motor
Frame
Shield
(int)
exc 1
exc 2 Actuator/Valve
sec2 3 L
V
sec2 4 D
sec1 5 T
sec1 6
V T
S S Monitoring Signals
V V
O O
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-157
Note Jumpers J1 – J6 direct SIGRET either directly to SCOM or through a
capacitor to SCOM. The shield must be grounded at one end or the other, but not
both. If the shield is grounded at the device end, the jumpers should be set to include
the capacitor in the circuit. If the shield is not grounded at the device end, the
jumpers should be set to go directly to SCOM.
s
s
Six channels
SCOM GRD
Terminal Assignments,
9-158 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Mark VI Control Fuel Skid
From VSCA
Board Front, XDSAG1ACC
P1 Outer Valve
J6 1 Power
Adr= 0 Press Xdr
GP1OA
2 LG-1237
Chan A, RS422
DSCB +
3 Chan A
1 4 P2
JA1 Tx 2 5 Press Xdr
Outer Valve
Adr= 1
Port #1 6
LG-1237
GP2OA
+ 7
Rx 34 8
P3 Outer Valve
Chan B, RS422 Adr= 2 Press Xdr
9 Power
LG-1237 GP1OB
+ 10
Tx 89 11 Chan B
Port #2 12
13
P4 Outer Valve
+ Adr= 3 Press Xdr
Rx 10
11
14
LG-1237
GP2OB
15
16 Stab-on
nearest gnd
XDSAG1ACC
P1 Pilot Valve
Adr= 4 Press Xdr
1 Power
LG-1237
GP1PA
2
3 Chan A
4
5
P2 Pilot Valve
Adr= 5 Press Xdr
6
LG-1237
GP2PA
7
8
43
44 P3 Pilot Valve
45 Adr= 6 Press Xdr
46 9 Power LG-1237
GP1PB
10
SCOM 11 Chan B
Gnd 12
13
P4 Pilot Valve
Adr= 7 Press Xdr
14 LG-1237
GP2PB
15
16 Stab-on
nearest gnd
XDSAG1ACC
XDSA Jumper Settings: P1 Inner Valve
Adr= 8 Press Xdr
1 Power
LG-1237
GP1IA
Termination: Tx Only, JP1, JP2: 2
3 Chan A
Set to "IN" if end of line; 4 P2 Inner Valve
5 Press Xdr
Set to "OUT" if not end of line. 6 Adr= 9
GP2IA
7 LG-1237
Address: 8
Jumper Outer Pilot Inner
P3 Inner Valve
Adr=10 Press Xdr
JP3 0 1 0 Chan A 9 Power LG-1237
GP1IB
10
JP4 0 0 1 Chan A 11 Chan B
12 P4 Inner Valve
13 Adr=11 Press Xdr
14 GP2IB
JP5 0 1 0 Chan B 15 LG-1237
16 Stab-on
JP6 0 0 1 Chan B
nearest gnd
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-159
DPWA - DIN-rail Mounted Transducer Excitation Power
Distribution Terminal Board
DPWA is DIN-rail mounted and has an input voltage of 28 V dc ± 5%, provided
through 2-pin locking connectors (see Figure 9-93). Connectivity between the
terminal board and the external devices is through the Euro Block (Phoenix type)
terminal block, using screw terminations and twisted shielded pair, AWG#18,
wiring. DPWA provides three voltage output sources of 12 V dc ± 5%, with each
output rated at 0 to 0.4 A, and is compatible with interface board
DS200XDSAG#AC. Outputs are short circuit protected, and self recovering. Two
terminal boards per system are required when servicing redundant ports.
DPWA provides excitation power to the type LG-1237 Honeywell pressure
transducers (see Figure 9-94).
Note The DPWA terminal board includes two screw terminals for SCOM (ground)
that must be connected to a good shield ground.
DPWA P12 9
s P12V1
Peripherial 10
P28V dc from P12R1
P28V dc to P12Vdc,
control rack 1 P1 P12 V dc 1.2 Amp P12 11
s P12V2
2 Isolation 12
P12R2
P2
P12 13
s P12V3
Return 14
s P12R3
15
SCOM
P3 16
SCOM
100k
P4
20 k
1
1k 1k PSRet
SCOM 2
Bus SCOM
centering
bridge 100 k 100 k
SCOM
20 k 20 k
3
SCOM PS28VA
4 SCOM
5
PS28VB
6
SCOM
9-160 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Power Supply,
IS2020RKPS
Com
PS28C Mark VI Control Fuel Skid
1
2
PS28C 28V 3
"Normal"
P28_J2 100K 5
SCOM 20K XDSAG1ACC
6 P1
Pilot Valve
+ Adr= 4 Press Xdr
1 Power LG-1237 GP1PA
2
3 Chan A
4 P2
5 Pilot Valve
Adr= 5 Press Xdr
6 LG-1237 GP2PA
7
8
P3
Pilot Valve
Adr= 6 Press Xdr
Power for Chan B + 9 Power LG-1237 GP1PB
10
DPWA 12 Vdc +/-5% 11 Chan B
12 P4
1.2 Amp Pilot Valve
P1 13 Adr= 7 Press Xdr
P12 9 + 14 GP2PB
28 V LG-1237
to Return 10 15
12 V 16 Stab-on
P12 +
11
Isol Return 12
P2 nearest gnd
P12 13 +
Return 14
Grd1 15
XDSAG1ACC P1
Grd2 16 Inner Valve
+ Adr= 8 Press Xdr
P3 1 Power LG-1237 GP1IA
2
3 Chan A
VAIC 4 P2
5 Inner Valve
Adr= 9 Press Xdr
Return 100K VDCx 6 LG-1237 GP2IA
P4 1
7
SCOM 20K
2 Retx 8
P28_J1 100K 3 VDCx
SCOM 20K
4 Retx P3
Inner Valve
P28_J2 100K + Adr= 10 Press Xdr
5 VDCx 9 Power GP1IB
20K LG-1237
SCOM 6 Retx 10
11 Chan B
12 P4
Power Supply 13 Inner Valve
Adr=11 Press Xdr
Monitoring 14 GP2IB
LG-1237
15
16 Stab-on
nearest gnd
Figure 9-94. DPWA Power Distribution to XDSA and Smart Pressure Transducers
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-161
VPRO/TREG - Turbine Emergency Trip
Operation
The VPRO board in the Protection Module <P> provides the emergency trip
function. Up to three trip solenoids can be connected between the TREG and TRPG
terminal boards. TREG provides the positive side of the 125 V dc to the solenoids
and TRPG provides the negative side. VPRO provides emergency overspeed
protection and the emergency stop functions. It controls the 12 relays on TREG, nine
of which form three groups of three to vote inputs controlling the three trip
solenoids. A second TREG board may be driven from VPRO through J4.
VPRO also connects to the TPRO terminal board and has an Ethernet connection for
IONet communications with the control modules (refer to Figure 9-95). Details of
the TREG board are shown in Figure 9-96.
x 16 x 15 S
x 18 x 17 E
x 19 Cable to VPRO-T8 R J
x 20 JY1
x 22 x 21 6
x 23 J P5
x 24 COM
x 5 P28A
P28B
To TPRO E
x T
x 26 x 25 H
x 28 x 27 R
x 30 x 29 To TPRO J J P
x 31 3 4 P
x 32 JX1 A
34 x 33 R O
x
x 35 Cable to VPRO-S8 A W
x 36
x 38 x 37 F N L
E
x 40 x 39 VPRO R
x 42 x 41 x x x
x 44 x 43
x 46 x 45
x 48
x 47
x
x Cable to VPRO-R8
To Second TREG
(optional)
Shield 37-pin "D" shell
Bar type connectors
with latching
BarrierType Terminal fasteners
Blocks can be
unplugged
from board for
maintenance
Figure 9-95. Trip Emergency Terminal Board, VPRO Board, and Cabling
9-162 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Trip
Terminal Terminal Board TREGH1A <P>
Solenoid JX1
Board TRPG VPRO
1 or 4 KE1 KX1 KY1 KX1 RD
02 - + 01 Section X
KX2 J3
KY1 KZ1 RD
J2 J2 ID
Mon KX3 RD
04 KZ1 KX1
Optional
P28X1 Mon
Economizing 03
Resistor, K4X KX1,2,3
Trip Solenoid 28Vdc
100 ohm,
2 or 5 KE2 KX2 KY2 <P>
70W 04 - + 05 JY1
VPRO
KY1 RD
KY2 KZ2 Section Y
J2 J2 J3
KY2 RD
Mon
KZ2 KX2 ID
08 KY3 RD
07
Trip P28Y1 Mon
Solenoid K4Y KY1,2,3
28Vdc
3 or 6 KE3 KX3 KY3
06 - + 09
JZ1 <P>
KY3 KZ3 KZ1 VPRO
J2 J2 RD Section Z
Mon
KZ2 J3
KZ3 KX3 RD
12 ID
11 KZ3 RD
PWR_N1 02
P28Z1 Mon
for test 06
Sol Pwr Monitor K4Z KZ1,2,3
10 JX1 28Vdc
Mon JY1
J2 J2 JZ1
- N125V
+ P125V KE1,2,3 JX1
P28VV 2 JY1
30 RD
PWR_P1 JX1 3 JZ1
31 PWR_P2 JY1 Mon
for test probe JZ1 KE1,2,3
Three Economizing Relay Circuits
Trip Interlock
K4CL JX1 P125X seven circuits
To TSVO P28VV 2 To Exc 35 TRP1H
Boards on J1
RD JY1 NS
3 JX1
SMX Systems K4CL JZ1 36 TRP1L
K4CL JY1 TRP NS
Servo Clamp JZ1
Mon 13
N125X
To Relay 14 ETRPH
K25A on J2 P28VV CL
J2 16
TTUR JX1 K4X ETRPL
2 JY1 E-Stop
RD 15
3 JZ1 K4Y JUMPR
JH1 Mon
P125X K4Z 17 JUMPR
JX1
N125X
JY1 18 Second E-STOP
BCOM when applicable
JZ1
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-163
Features
TREG is entirely controlled by VPRO, and the only connections to the control
modules are the J2 power cable and the trip solenoids. In Simplex systems a third
cable carries a trip signal from J1 to the TSVO terminal board, providing a
Servovalve clamp function upon turbine trip.
9-164 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Specification
Table 9-39. TREG Board Specifications
Item Specification
Number of Trip Solenoids (TREG) 3 Solenoids per TREG (total of 6 per VPRO)
Trip Solenoid Rating 125 V dc standard with 1 Amp draw
24 V dc is alternate with 1 Amp draw
Trip Solenoid Circuits Circuits rated for NEMA class E creepage and clearance.
Circuits can clear a 15 A fuse with all circuits fully loaded.
Solenoid Response Time Solenoid L/R time constant is 0.1 sec.
Suppression MOV across the solenoid
Relay outputs 3 Economizer relay outputs, 2 second delay to energize
Driver to breaker relay K25A on TTUR
Servo clamp relay on TSVO
Solenoid Control Relay Contacts Contacts are rated to interrupt inductive solenoid loads at
125 V dc, 1 A
Bus voltage can vary from 70 to 145 V dc
Trip Inputs 7 trip interlocks to VPRO protection module, 125/24 V dc
1 Emergency Stop hardwired trip interlock, 24 V dc
Configuration Overview
Like all I/O boards, TREG is configured using the toolbox. This software usually
runs on a data-highway connected CIMPLICITY station or workstation. Table 9-40
summarizes the configuration choices and defaults. For details refer to GEH-6403
Control System Toolbox for Configuring the Mark VI Turbine Controller.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-165
K4CL_Fdbk Drive Control Valve Servos Closed, use ONLY for Steam Point Edit (Input BIT)
Turbine Simplex - Card Point
Relay Output Servo Valve Clamp used Used, Unused
K25A Synchronizing Check Relay on TTUR - Card Point Point Edit (Input BIT)
SynchCheck Synch Check Relay K25A Used Used, Unused
SystemFreq System Frequency in Hz 50 or 60
ReferFreq Select Generator Frequency Reference for PLL, standard PR Std or Sg Space
PR input or from Signal Space
TurbRPM Rated Load Turbine RPM 0 to 20,000
VoltageDiff Maximum Voltage Difference in kV rms for Synchronizing 0 to1,000
FreqDiff Maximum Frequency Difference in Hz for Synchronizing 0 to 0.5
PhaseDiff Maximum Phase Difference in Degrees for Synchronizing 0 to 30
GenVoltage Minimum Generator Voltage in kVolts RMS for 1 to 1,000
Synchronizing
BusVoltage Minimum Bus Voltage in kVolts rms for Synchronizing 1 to 1,000
Card Points (Signals) Description - Point Edit (Enter Signal Connnection) Direction Type
See Point Edit names above
Diagnostics
Descriptions of the TREG diagnostics are contained in the VPRO section. The
diagnostics cover the trip relay driver and contact feedbacks, solenoid voltage,
economizer relay driver and contact feedbacks, K25A relay driver and coil, servo
clamp relay driver and contact feedback, and the solenoid voltage source.
Connectors JX1, JY1, and JZ1 on the terminal board have their own ID device that is
interrogated by the I/O board. The ID device is a read-only chip coded with the
terminal board serial number, board type, revision number, and the plug location.
Installation
The three trip solenoids, economizing resistors, and the emergency stop are wired
directly to the first I/O terminal block. Up to seven trip interlocks can be wired to the
second terminal block. The wiring connections are shown in Figure 9-97.
9-166 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Power 125 V dc To TSVO
To TRPG, 12 wires boards on
SMX
systems
x
JZ1
x 1 SOL 1 or 4
PWR_N1 x 2
x 3 RES 1A
RES 1B x 4
6
x 5 SOL 2 or 5
PWR_N2 x
RES 2B x 8
x 7 RES 2A
PWR_N3 x 10
x 9 SOL 3 or 6
12
x 11 RES 3A
RES 3B x
14
x 13 E-TRP (H)
E-TRP (H) x
x 15
E-TRP (L) x 16 JUMPER
x 18
x 17
x 20
x 19 JY1 VPRO
x 22
x 21 Z
x 23
x 24
x
x
x 25
x 26
x 27
x 28
PWR_P2 (for probe) x 29 VPRO
x 30 JX1
x 31 PWR_P1 (for probe) Y
x 32
x 33
x 34
x 35 Contact TRP1 (H)
Contact TRP1 (L) x 36
Contact TRP2 (L) x 38
x 37 Contact TRP2 (H)
x 39 Contact TRP3 (H)
Contact TRP3 (L) x 40
x 41 Contact TRP4 (H)
Contact TRP4 (L) x 42
x 43 Contact TRP5 (H)
Contact TRP5 (L) x 44
Contact TRP6 (L) x 46
x 45 Contact TRP6 (H)
x 47 Contact TRP7 (H)
Contact TRP7 (L) x 48
x
VPRO
X
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-167
VPRO/TPRO - Turbine Protection
The Turbine Protection Module (VPRO) and associated terminal board (TPRO)
provide an independent emergency overspeed protection system. The protection
system consists of triple redundant VPRO boards in a module separate from the
turbine control system, controlling the trip solenoids through TREG. Figure 9-98
shows the cabling to VPRO from the TPRO terminal boards.
x 20 x 19 JY1 R J
x 22 x 21 Cables to VPRO-T8 6
x 23 J P5
x 24 COM
x 5 P28A
P28B
JY5 E
x T
x 26
x 25 H
x 28
x 27 R
x 29 J J
x 30 P
x 32
x 31 3 4 A P
x 33 JX1 Cables to VPRO-S8 R O
x 34
x 36 x 35 JX5 A W
x 38 x 37 F N L
E
x 40 x 39 VPRO
x 41 R
x 42 x x x
x 44 x 43
x 46 x 45 Cables to VPRO-R8
x 48
x 47
x
x
To TREG
To Second TREG
(optional)
Shield 37-pin "D" shell
Bar type connectors
with latching
BarrierType Terminal fasteners
Blocks can be unplugged
from board for maintenance
Figure 9-98. Turbine Protection Terminal Board, VPRO Board, and Cabling
Figure 9-99 shows how the VTUR and VPRO processor boards share in the turbine
protection scheme. Either one can independently trip the turbine via the relays on
TRPG or TREG. Figure 9-100 provides details of the TPRO terminal board.
9-168 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
VTUR Special speed cable
JR5 TTUR
JS5
JT5
J5
Two
JR1
xfrs
JS1
Optional 3 Relays
JT1
Daughter Gen Synch
Board
335 V dc from <Q>
J3 J4 J5
JR1
TRPG
JS1
J3
JT1
To second
TRPG board 9 Relays
J4 J4 (optional) (3 x 3 PTR's)
J1
J2
125 VDC
J2 J1
TREG Trip signal to
JX1
TSVO TB's
JY1
VPRO
JZ1
J3
To second 12 Relays
J4 TREG Board
(9 ETR's,
(optional)
J5 3 Econ Relays)
JH1
J6
P125 V dc from <PDM>
NEMA class F
JX1 Two
xfrs
JY1
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-169
Termination Board TPRO VPRO R8 VPRO S8 VPRO T8
Protection Protection Protection
1 Noise Suppression
JX1
Gen. Volts
120 V ac NS
2
from PT
Noise Suppression J6 J6 J6
3 ID
Bus Volts
120 Vac JY1
NS
from PT 4
To TTUR
1
Thermocouple Inputs Overspeed
13 CJ Overspeed Overspeed
TCX1H NS Em Stop Em Stop Em Stop
14 Three TC ccts to X ID
TCX1L NS Sync Sync Sync
1
19 CJ Check Check Check
TCY1H NS JZ1 Overtemp Overtemp Overtemp
20 Three TC ccts to Y
TCY1L NS 1
25 CJ
TCZ1H NS
26 Three TC ccts to Z J5 J5 J5
TCZ1L NS ID
P28VV
5
P28V,X
P24V1 Current P28V,Y J3 J3 J3
Limiter P28V,Z
7
V dc VDC
6 JPA1
20mA1 20 ma
J4 J4 J4
8 250 ohms To R8,S8, T8
mAret
Open
One of the above ccts
Ret
JPB1
9 Current P28VV
P24V2 To TREG and
Limiter
10 Trip Solenoids
20 mA2
250
To R8, S8, T8
ohms
Two of the above ccts
JX5
#1 MX1H 31 Filter
Emergency Clamp
Magnetic NS
MX1H 32 AC
Speed Coupling
Pickup 3 Circuits
ID
#2 MY1H 37 Filter
Emergency Clamp JY5
Magnetic NS
MY1L 38 AC
Speed Coupling
Pickup 3 Circuits
ID
#3 MZ1H 43 Filter
Emergency Clamp JZ5
Magnetic NS
MZ1L 44 AC
Speed Coupling
Pickup 3 Circuits ID
9-170 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Operation
The main purpose of the <P> Protection Module is emergency overspeed (EOS)
protection for the turbine. In addition, the module has backup synchronization check
protection, three analog current inputs, and nine thermocouple inputs, primarily
intended for exhaust over-temperature protection on gas turbines.
The Protection Module is always triple redundant with three completely separate and
independent sections named X, Y, and Z. Any one of these sections can be powered
down and replaced while the turbine is running without jeopardizing the protection
system. Each section contains its own I/O interface, processor, power supply, and
Ethernet communications (IONet) to the control modules. The communications
allow initiation of test commands from the control module to the Protection Module
and the monitoring of EOS system diagnostics in the control module and on the
operator interface. Communications are resident on the VPRO board which is the
heart of the system. The VPRO board has a VME interface to allow programming
and testing in a VME rack; however, the backplane is neutralized when plugged into
the Protection Module to eliminate any continuity between the three independent
sections.
Features
Speed Control and Overspeed Protection
Speed control and overspeed protection is implemented with six passive, magnetic
speed pickups. The first three are monitored by the control module(s) which use the
median signal for speed control and the primary overspeed protection. The second
three are separately connected to the X, Y, and Z sections of the Protection Module.
Provision is made for nine passive magnetic speed pickups or active pulse rate
transducers (TTL type) on the TPRO terminal board with three being monitored by
each of the X, Y, and Z sections. Separate overspeed trip settings are programmed
into the application software for the primary and emergency overspeed trip limits,
and a second emergency overspeed trip limit must be programmed into the I/O
configurator to confirm the EOS trip point.
The speed is calculated by counting passing teeth on the wheel and measuring the
time involved. Another protection feature is the calculation of the rate of change of
speed which is compared with 100%/sec and transmitted to the control module to trip
the unit if it is detected after the turbine reaches a predetermined steady-state speed.
This steady-state speed limit is a tuning constant located in the controller’s
application software. Another speed threshold which is monitored by the EOS
system is 10% speed. This is transmitted to the control module to verify that there is
no gross disagreement between the first set of three speed pickups being monitored
by the controller (for speed control and the primary overspeed protection) and the
second set of three speed pickups being monitored by the EOS system.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-171
Backup Synch Check Protection
Backup synch check protection is provided in the <P> Protection Module. The
generator and bus voltages are supplied from two, single phase, potential
transformers (PTs) secondary output supplying a nominal 115 V rms. The maximum
cable length between the PTs and the turbine control is 100 meters of 18 AWG
twisted, shielded wire. Each PT is magnetically isolated with a 1,500 V rms rated
barrier and a circuit load less than 3 VA. The synch algorithms are based on phase
lock loop techniques. Phase error between the generator and bus voltages is less than
+/-1 degree at nominal voltage and 50/60 Hz. A frequency range of 45 to 66 Hz is
supported with the measured frequency within 0.05% of the input frequency. The
algorithm is illustrated under TTUR, generator synchronizing.
Each PT input is internally connected in parallel to the X, Y, and Z sections of the
Protection Module. The triple redundant phase slip windows result in a voted logical
output on the TREG terminal board which drives the K25A relay. This relay’s
contacts are connected in series with the synch permissive relay (K25P) and the auto
synch relay (K25) to insure that no false command is issued to close the generator
breaker. Similarly, contacts from the K25A contact are connected in series with the
contacts from remote, manual synchronizing equipment to insure no false
commands.
Power Supply
Each VPRO board has its own on-board power supply. This generates 5 V dc and 28
V dc using 125 V dc supplied from the cabinet PDM. The entire TMR VPRO
module therefore has three power supplies for high reliability.
Specification
Table 9-41. VPRO Board Specifications
Item Specification
Number of Inputs TPRO: 9 Passive Speed Pickups
1 Generator and 1 Bus Voltage
9 Thermocouples
1 4−20 mA current or voltage
2 4−20 mA current
VPRO: 3 Passive Speed Pickups
1 Generator and 1 Bus Voltage
3 Thermocouples
1 4−20 mA current or voltage
2 4−20 mA current
7 Trip interlocks
2 Emergency Stop
9-172 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Number of Outputs TREG: 3 Trip Solenoids per TREG
3 Economizer relays
1 Breaker relay command, K25A on TTUR
1 Servo clamp relay contact, to TSVO boards
VPRO: 6 Trip Solenoids
6 Economizer relays
1 Breaker relay command, K25A on TTUR
1 Servo clamp relay contact, to TSVO boards
Power Supply Voltage TPRO: 28 V dc from X, Y, and Z boards, voted
VPRO: Input supply 125 V dc (70−145 V dc)
Output 5 V dc and 28 V dc
Frame Rate Up to 100 Hz
MPU Characteristics Output resistance 200 ohms with inductance of 85 mH.
Output generates 150 V p-p into 60 K ohms at the TPRO terminal
block, with insufficient energy for a spark.
The maximum short circuit current is approximately 100 mA.
The system applies up to 400 ohm normal mode load to the input
signal to reduce the voltage at the terminals.
MPU Cable Sensors can be up to 300 m (984 ft) from the cabinet, assuming
that shielded pair cable is used, with typical 70 nF single ended or
35 nF differential capacitance, and 15 ohms resistance.
MPU Pulse Rate Range 2 Hz to 14 kHz
MPU Pulse Rate Accuracy 0.05% of reading; resolution is 15 bits at 100 Hz
Noise of the acceleration measurement is less than ± 50 Hz/sec
for a 10,000 Hz signal being read at 10 ms.
MPU Input Circuit Sensitivity Minimum signal is 27 mV pk at 2 Hz
Minimum signal is 450 mV pk at 14 kHz
Generator and Bus Voltage Two Single-Phase Potential Transformers, 115 V rms secondary
Sensors Voltage accuracy is 0.5% of rated Volts rms
Frequency Accuracy 0.05%
Phase Difference Measurement better than 1 degree.
Allowable voltage range for synchronizing is 75 to 130 V rms.
Each input has a load of less than 3 VA.
Thermocouple Inputs Same specifications as for VTCC board
Analog Inputs Same specifications as for VAIC board
Configuration
Table 9-42. Typical VPRO-TPRO Configuration
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-173
OvrTemp_Trip Iso-thermal Overtemperature Trip Setting for Exhaust −60 to 2,000
Thermocouples in Degree F
CPD_Corner Overtemperature Trip Compressor Discharge 0 to 450
Pressure in psi at which CDP Bias Starts
CPD_Slope Overtemperature Trip Compressor Discharge Pressure −10 to 0
Bias Slope in Degree F/psi
TA_Trip_Enab1 Steam, Enable Trip Anticipation on ETR1 Enable, Disable
RatedRPM_TA Steam, Rated RPM, used for Trip Anticipation calc 0 to 20,000
Auto Reset Automatic Restoring of Thermocouples removed from Enable, Disable
scan
DiagSolPwrA When using TREL/TRES, Sol Power, BusA, diagnostic Enable, Disable
enable
Min_MA_Input Minimum MA for Healthy 4−20 mA Input 0 to 21
Max_MA_Input Maximum MA for Healthy 4−20 mA Input 0 to 21
AccelCalType Select Acceleration calculation type Slow, Med, Fast
9-174 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Cold Junction Cold Junction for Thermocouples 1-3 Point Edit (Input FLOAT)
TMR_DiffLimt Difference Limit for Voted TMR Cold Junction Inputs in −60 to 2,000
Deg F
AnalogIn1 First of Three Analog Inputs - Card Point Point Edit (Input FLOAT)
Input Type Type of Analog Input Unused, 4−20 mA, ± 10 V
Low_Input Input MA at Low Value −10 to 20
Low_Value Input Value in Engineering Units at Low Value −3.402e+38 to 3.402e+38
High_Input Input MA at High Value −10 to 20
High_Value Input Value in Engineering Units at High MA −3.402e+38 to 3.402e+38
InputFilter Filter Bandwidth in Hz Unused, 12 Hz, 6 Hz, 3Hz, 1.5
Hz, 0.75 Hz
Trip_Enable Enable Trip for this MA Input Enable, Disable
TripSetpoint Trip Setpoint in Engineering Units −3.402e+38 to 3.402e+38
TripTimeDelay Time Delay before Tripping Turbine after Signal 0 to 10
exceeds Setpoint in seconds
TMR_DiffLimt Difference Limit for Voted TMR Inputs in Per Cent of 0 to 100
(High_Value-Low_Value)
J3:IS200TREGH1A First TREG board (see TREG section for configuration) Connected, Not Connected
Card Points (Signals) Description - Point Edit (Enter Signal Connection) Direction Type
L3DIAG-VPRO1 Card Diagnostic Input BIT
L3DIAG-VPRO2 Card Diagnostic Input BIT
L3DIAG-VPRO3 Card Diagnostic Input BIT
PR1_Zero L14HP_ZE Input BIT
PR2_Zero L14IP_ZE Input BIT
PR3_Zero L14LP_ZE Input BIT
Spare Spare Input BIT
OS1_Trip L12HP_TP Input BIT
OS2_Trip L12IP_TP Input BIT
OS3_Trip L12LP_TP Input BIT
Dec1_Trip L12HP_DEC Input BIT
Dec2_Trip L12IP_DEC Input BIT
Dec3_Trip L12LP_DEC Input BIT
Acc1_Trip L12HP_ACC Input BIT
Acc2_Trip L12IP_ACC Input BIT
Acc3_Trip L12LP_ACC Input BIT
TA_Trip Trip Anticipate Trip L12TA_TP Input BIT
TA_StpLoss L30TA Input BIT
OT_Trip L26TRP Input BIT
MA1_Trip L3MA_TRP1 Input BIT
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-175
MA2_Trip L3MA_TRP2 Input BIT
MA3_Trip L3MA_TRP3 Input BIT
SOL1_Vfdbk When TREG, Trip Solenoid 1 Voltage Input BIT
: : Input BIT
SOL6_Vfdbk When TREG, Trip Solenoid 6 Voltage Input BIT
L25A_Cmd L25A Breaker Close Pulse Input BIT
Cont1_TrEnab Config_Contact 1 Trip Enabled Input BIT
: : Input BIT
Cont7_TrEnab Config_Contact 7 Trip Enabled Input BIT
Acc1_TrEnab Config - Accel 1 Trip Enabled Input BIT
: : Input BIT
Acc3_TrEnab Config - Accel 3 Trip Enabled Input BIT
OT-TrEnab Config - Overtemp Trip Enabled Input BIT
GT_1Shaft Config - Gas Turb, 1 Shaft Enabled Input BIT
GT_2Shaft Config - Gas Turb, 2 Shaft Enabled Input BIT
LM_2Shaft Config - LM Turb, 2 Shaft Enabled Input BIT
LM_3Shaft Config - LM Turb, 3 Shaft Enabled Input BIT
LargeSteam Config - Large Steam 1, Enabled Input BIT
MediumSteam Config - Medium Steam, Enabled Input BIT
SmallSteam Config - Small Steam, Enabled Input BIT
STag_GT_1S Config - Stag 1 Shaft, Enabled Input BIT
STag_GT_2S Config - Stag 2 Shaft, Enabled Input BIT
ETR1_Enab Config - ETR1 Relay Enabled Input BIT
: : Input BIT
ETR6_Enab Config - ETR6 Relay Enabled Input BIT
K4CL_Enab Config - Servo Clamp Relay Enabled Input BIT
K25A_Enab Config - Sync Check Relay Enabled Input BIT
L5CFG1_Trip HP Config Trip Input BIT
L5CFG2_Trip IP Config Trip Input BIT
L5CFG3_Trip LP Config Trip Input BIT
OS1_SP_CfgEr HP Overspeed Setpoint Config Mismatch Error Input BIT
OS2_SP_CfgEr IP Overspeed Setpoint Config Mismatch Error Input BIT
OS3_SP_CfgEr LP Overspeed Setpoint Config Mismatch Error Input BIT
ComposTrip1 Composite Trip 1 Input BIT
ComposTrip2 Composite Trip 2 Input BIT
ComposTrip3 Composite Trip 3 Input BIT
L5ESTOP1 ESTOP1 Trip, TREG, J3 Input BIT
L5ESTOP2 ESTOP2 Trip, TREG, J4 Input BIT
L5Cont1_Trip Contact1 Trip Input BIT
9-176 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
: : Input BIT
L5Cont7_Trip Contact7 Trip Input BIT
LPShaftLock LP Shaft Locked Input BIT
Bus Freq SFL 2 Hz Input FLOAT
GenFreq SF 2 Hz Input FLOAT
Gen VoltsDiff DV_ERR KiloVolts rms-Gen Low is Negative Input FLOAT
GenFreqDiff SFDIFF2 Slip Hz – Gen Slow is Negative Input FLOAT
GenPhaseDiff SSDIFF2 Phase degrees – Gen Lag is Negative Input FLOAT
PR1_Accel HP Accel in RPM/SEC Input FLOAT
PR2_Accel IP Accel in RPM/SEC Input FLOAT
PR3_Accel LP Accel in RPM/SEC Input FLOAT
PR1_Max HP Max Speed since Last Zero Speed in RPM Input FLOAT
PR2_Max IP Max Speed since Last Zero Speed in RPM Input FLOAT
PR3_Max LP Max Speed since Last Zero Speed in RPM Input FLOAT
SynCk_Perm L25A_PERM - Sync Check Permissive Output BIT
SynCk_ByPass L25A_BYPASS - Sync Check Bypass Output BIT
Cross_Trip L4Z_XTRP - Control Cross Trip Output BIT
OnLineOS1Tst L97HP_TST1 - On Line HP Overspeed Test Output BIT
OnLineOS1X L43EOST_ONL - On Line HP Overspeed Test, with Output BIT
auto reset
OnLineOS2Tst L97IP_TST1 - On Line IP Overspeed Test Output BIT
OnLineOS3Tst L97LP_TST1 - On Line LP Overspeed Test Output BIT
OffLineOS1Tst L97HP_TST2 - Off Line HP Overspeed Test Output BIT
OffLineOS2Tst L97IP_TST2 - Off Line IP Overspeed Test Output BIT
OffLineOS3Tst L97LP_TST2 - Off Line LP Overspeed Test Output BIT
TrpAntcptTst L97A_TST - Trip Anticipate Test Output BIT
LokdRotorByp L97LR_BYP - Locked Rotor Bypass Output BIT
HPZeroSpdByp L97ZSC_BYP - HP ZeroSpeed Check Bypass Output BIT
TestETR1 L97ETR1 - ETR1 Test, True denergizes relay Output BIT
: : Output BIT
TestETR4 L97ETR4 - ETR4 Test, True denergizes relay Output BIT
PTR1 L20PTR1 - PrimaryTrip Relay CMD for Diagnostic only Output BIT
: : Output BIT
PTR6 L20PTR6 - Primary Trip Relay CMD for Diagnostic only Output BIT
PR_Max_Rst Max Speed Reset Output BIT
CJBackup Estimated TC Cold Junction Temperature in Deg F Output FLOAT
OS1_Setpoint HP Overspeed Setpoint in RPM Output FLOAT
OS2_Setpoint IP Overspeed Setpoint in RPM Output FLOAT
OS3_Setpoint LP Overspeed Setpoint in RPM Output FLOAT
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-177
OS1_TATrpSp PR1 Overspeed Trip setpoint in RPM for Trip Anticipate Output FLOAT
Fn
CPD Compressor Discharge Pressure for Overtemperature Output FLOAT
Trip CPD Bias
DriveFreq Drive (Gen) Freq (Hz), used for non standard drive Output FLOAT
config.
Diagnostics
Board diagnostics cover the thermocouple limits, reference voltage, cold junction,
analog input health, and contact input test failure. Relay diagnostics cover the trip
relay driver and contact feedbacks, solenoid voltage, economizer relay driver and
contact feedbacks, K25A relay driver and coil, and the servo clamp relay driver and
contact feedback. Voltage diagnostics cover the solenoid power bus, and the voltage
to the solenoids.
Connectors JX1, JY1, JZ1, JX5, JY5, and JZ5 on the terminal board have their own
ID device which is interrogated by the I/O board. The ID device is a read-only chip
coded with the terminal board serial number, board type, revision number, and the
plug location.
Installation
The generator and bus potential transformers, and the analog inputs are wired to the
first TPRO terminal block. The magnetic speed pickups are wired to the second
block. Jumpers JP1A and JP1B are set to give either a 4−20 mA or voltage input on
the first of the three analog inputs. The wiring connections are shown in Figure 9-
101.
9-178 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Turbine Protection
JZ1
Termination Board TPRO ma VOLTS
x JP1A
x 1 Gen (H) Gen
Gen (L) x 2
Bus (L) x 4
x 3 Bus (H) Volts OPEN RETURN
x 5 P24V1
20mA1 x 6
mAret x 8
x 7 VDC
Analog JP1B
x 9 P24V2
20mA2 x 10 Inputs
20mA3 x 12
x 11 P24V3
TC1X (L) x 14
x 13 TC1X (H)
To VPRO-Z
TC2X (L) 16
x 15 TC2X (H)
x JZ5 JY1 J6
x 17 TC3X (H)
TC3X (L) x 18
x 19 TC1Y (H)
TC1Y (L) x 20
TC2Y (L) x 22
x 21 TC2Y (H) Thermocouple
24
x 23 TC3Y (H) Inputs
TC3Y (L) x
x
To J5
JY5
x
x 25 TC1Z (H)
TC1Z (L) x 26
x 27 TC2Z (H)
TC2Z (L) x 28
TC3Z (L) 30
x 29 TC3Z (H) To VPRO-Y
x JX1
MX1 (L) x 32
x 31 MX1 (H) J6
x 33 MX2 (H)
MX2 (L) x 34 To J5
MX3 (L) x 36
x 35 MX3 (H) Magnetic
x 37 MY1 (H) Speed JX5
MY1 (L) x 38
x 39 MY2 (H) Pickups
MY2 (L) x 40
x 41 MY3 (H)
MY3 (L) x 42
MZ1 (L) x 44
x 43 MZ1 (H)
MZ2 (L) x 46
x 45 MZ2 (H)
x 47 MZ3 (H)
MZ3 (L) x 48
x
To J5
To VPRO-X
Up to two #12 AWG wires per Terminal Blocks can be J6
point with 300 volt insulation unplugged from terminal board
for maintenance
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-179
VME Rack Power Supply
The VME rack power supply mounts on the side of the VME control and interface
modules, as shown in Figures 9-102 and 9-106. It supplies + 5, ± 12, ± 15, and ± 28
V dc to the VME backplane. It runs off 125 V dc cabled in from the Power
Distribution Module (PDM). A special 335 V dc output is provided for powering
flame detectors connected to TRPG. A low voltage version (LVPS) for 24 V dc
operation is also available. Note that a different power supply is used on the
standalone control rack, which only powers the Mark VI controller, VDSK, and
VCMI.
Cable Harness
to VME Rack Side View
PSA PSB
POWER
SUPPLY
Pull to Toggle
On
Off
Normal
Fault
Available
125 Vdc
28 V dc 335 from
(special) V dc PDM
Figure 9-102. VME Rack Power Supply, Front, Side, and Bottom Views
Operation
The power supply contains no user serviceable parts and the cover must not be
removed. The power supply contains three circuit boards, an input board with
control, monitoring and auxiliary functions, a module board with power supply
modules, and an output board with four more power modules and output filtering.
9-180 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Twelve power modules, shown in Figure 9-103, are mounted to the inside surface of
the heat sink under these boards:
• Five +28 V dc supplies
• Two combined +5 V dc supplies
• One –28 V dc supply
• One +12 V dc supply
• One –12 V dc supply
• One +15 V dc supply
• One –15 V dc supply
The input board holds the control and monitoring circuits, plus a 335 V dc power
supply circuit along with an auxiliary 24 V dc power supply for the control logic.
Schematics of the power supply are shown in Figures 9-104 and 9-105.
Output Filtering
Power Supply Modules Mounted under the
M-100 M-101 M-102 M-103 Circuit Boards on the Heat Sink
+5V +5V +28V +28V
Output Board
Module Board
M-304 M-305 M-306 M-307
+12V -12V +15V -15V
125 V dc
Power Input
Figure 9-103. Inside View of VME Power Supply Showing Power Modules
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-181
Power Input
125 VDC IS2020RKPSG1AC 400 W Power Supply
PS125 suppression startup relay
fuse Continued on next page
P125 2
N125 1 Green-- Normal
3 On/Off
NC Red----- Fault
4 switch
Yellow-- Avail
enable
P335V
1.68 W
PS335 + Ret
P335VDC P28V P28V P28V P28V P28V
1
2 50/100 W 50/100 W 50/100 W 50/100 W 50/100 W
+ Ret + Ret + Ret + Ret + Ret 3 PS28A
3 2
1
3 PS28B
2
1
3 PS28C
2
1
PSA 24 22 20 18 16 14 12 10 8 6
*PS28C
"Normal"
To Safety *PS28C
Ground "Isolation"
s s s s s
PCOM
Test
PCOM
Points
SCOM
Slots 1 thru 5 Slots 6 thru 9 Slots 10 thru 13 Slots 14 thru 17 Slots 18 thru 21
9-182 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
IS2020RKPSG1AC 400 W Power Supply
P125 (power)
enable
28 26 3220 30
18 8 6 12 10 16 14 20,24, 18,22,
28,32 26,30
PSA PSB
s s s s
ACOM
ACOM
s s N12V
N15V
s PCOM
PCOM SCOM
s
N28V
*SCOM
Figure 9-105. VME I/O Rack Power Supply and Cables (continued)
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-183
Specification
Table 9-43. Power Supply Specification
Item Description
Input Voltage 70 to 145 V dc floating supply
Up to 10 V pp ripple
Under voltage shutdown on input voltage, latching, cycle shutdown switch to recover
Isolation True isolation from Input to Output, 1500 Volts
Output Voltages Output Voltage Voltage Regulation Capacity Over Voltage Shutdown
P5 +5 V dc Less than ± 3% 150 Watts 20% ± 5%
P15 +15 V dc Less than ± 3% 100 Watts 20% ± 5%
N15 −15 V dc Less than ± 3% 100 Watts 20% ± 5%
P12 +12 V dc Less than ± 3% 25 Watts 20% ± 5%
N12 −12 V dc Less than ± 3% 10 Watts 20% ± 5%
P28 +28 V dc Less than ± 5% 100 Watts 20% ± 5%
N28 −28 V dc Less than ± 5% 50 Watts 20% ± 5%
P335 +335 V dc Less than ± 5% 1.68 Watts 10% to 20%
Total Output Maximum of 400 Watts
Short Circuit Short circuit protection on all power supplies, with self recovery
Temperature Ambient Air Convection Cooling 0 to 60 degree C
Indicating Lights Green: Normal Status is OK
Red: Fault Power is applied but supply is shutdown due to:
Trouble with the supply, latched off
Low input voltage, latched off
Yellow: Available Power is applied, but switch is OFF
Power The 5 V dc supply comes up first, then all the others
Sequencing
Diagnostics
Incoming and outgoing voltages and currents are monitored for control and
protection purposes. The following protective actions can occur:
• An input 110 V dc undervoltage condition sets the fault latch, shuts off all
power supplies, and lights the Red LED. Upon recovery, the fault can be reset
with the on/off switch.
• Any power supply output overvoltage fault turns off the bad power supply and
lights the Red LED. Reset by turning off the power supply.
• Undervoltage on the +5 Volt supply (output less than 4.7 Volts) cuts off all the
power supplies until the 5 Volts comes back. The red LED is lit.
• The 335 V dc supply has an overvoltage circuit that lights the Red LED and
shuts down the 335 Volts and other supplies. The output has current limiting.
Test points for all these voltages are located at the left-hand side of the VME rack.
9-184 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Installation
The power supply is mounted to the right hand side of the VME rack on a sheet
metal bracket, as shown in Figure 9-106. The 125 V dc input, 28 V dc output, and
335 V dc output connections are at the bottom. Two connectors, PSA and PSB, at the
top of the assembly mate with a cable harness carrying power to the VME rack.
Power cables to
VME Chassis
Fan
+/- 12 Volts x x x x x x x x x x x x x x x x x x x
PSA
to Fan, used PSB
with Controller Power
Supply
Plug Position
P28 Normal
Plug Position
P28 Isolated
VME Chassis,
21 slots for I/O
and Control, or x x x x x x x x x x x x x x x x x x x x x
for just I/O
J301
Power Supply
Test Points
GND
Rack Ethernet
ID Plug 125
Vdc
Input
from
P28C Power to External PDM
Peripheral Device (Move
Cable from
Plug from Normal to 335 V dc
PDM Monitor
Isolated Position)
Figure 9-106. Power Supply, VME Chassis, and Cabling to External Devices
Each of the five 28 V dc power modules supplies a section of the VME rack. These
sections are labeled A, B, C, D, E, and F. The P28C output at the bottom of the
power supply can be used to power an external peripheral device. To do this the
jumper plug shown on the bracket to the left of the rack must be moved from the
Normal position to the Isolated position below. This allows Module D to supply rack
sections D and E, and Module E to supply the external load via P28C. Note that
normally only P28C is used.
The fan is only used when the controller is mounted in the rack. It is powered by ±12
V from the top connector on the same bracket (located on the left side of the rack).
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-185
TTPW - Power Conditioning Board
Large steam turbines use 24 V dc electrical trip solenoid valves (ETSV). Power for
these valves is provided to the TRPL and TREL trip boards by a power transition
board TTPW. Wiring from the rack power supplies, through TTPW, to the trip board
is shown in Figure 9-107.
<R>
Power Single ETSV Applications:
VME Rack Supply
PL2
PS28C PL3
"Isolation" PS28C
<S>
Power
VME Rack Supply P1 T JA1 PwrA JP1 T
PL2 T R
P2 P P
PL3 W
PS28C P3 L ETSV
PS28C T
"Isolation"
B
discrete A
<T> wiring I T
Power R
Monitoring
VME Rack Supply E
PL2 L
PL3
PS28C
PS28C
"Isolation"
PL3
PS28C
"Isolation" PS28C
9-186 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Operation
The turbine ETSV is a 24 V dc device with a 24 watt, 20−22 ohm coil. Power is
wired from the three I/O rack supplies to TTPW, where the three 28 V supplies are
diode ORed to produce a single 28 V dc output. The primary output is 0−2 A (total),
22−30 V dc, and there are four secondary outputs of 0.25 A each as shown in Figure
9-108.
P1 P2 P3
TTPWG1B 2 1 2 1 2 1
SCOM 100k
Sig 11
P28S Gnd 12 10k
100k
15 SCOM P28V
Sig
P28T Gnd 16 10k
SCOM 100k
Sig 19
P28V Gnd 20 10k Bus Voltage
Centering Bridge
SCOM 1k 1k
(+) 25 P28V
P28V1 (-) 26
2.0 Amp
27 SCOM
(total) P28V2 (+) 28
(-)
1
To TRPL
2
JA1
(+) 31
P28V3 32
(-)
33
0.25 Amp P28V4 (+) 34
(-)
Outputs
(each) (+) 35
P28V5 (-) 36
(+) 37
P28V6 38
(-)
PCOM PCOM
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-187
Installation
Three 28 V dc supplies are wired from I/O racks R, S, and T to plugs P1, P2, and P3.
The primary 28 V dc output comes from plug JA1 and is wired to the trip board
TRPL. The power monitoring signals are wired to the top terminal block (TB1) and
go to an analog input board. The secondary voltage outputs are wired to the lower
terminal block (TB2) as shown in Figure 9-109.
28 V Power from
Racks R, S, T
x
x 1 P1 P28R
x 2 1
x 3 PCOM (Sig) (R)
PCOM (Gnd) x 4 2 PCOM
x 5
x 6
P28R (Gnd) x 8
x 7 P28R (Sig) P2
x 9 1 P28S
x 10 (S)
x 11 P28S (Sig) Monitoring 2 PCOM
P28S (Gnd) x 12
x 13 Signals to
x 14
x 15 P28T (Sig) TBAI Board P3
P28T (Gnd) x 16 1 P28T
x 17 (T)
x 18 PCOM
x 19 P28V (Sig) 2
P28V (Gnd) x 20
x 21
x 22
x 23
x 24
x 28 V Power to
TRPL Trip Board
x
x 25 P28V1 (Pos) JA1 1 P28V
P28V1 (Neg) x 26
x 27 P28V2 (Pos) (P28V)
P28V2 (Neg) x 28 2 PCOM
x 29
x 30
P28V3 (Neg)
x 31 P28V3 (Pos)
x 32 Power
x 33 P28V4 (Pos)
P28V4 (Neg) x 34 Outputs
P28V5 (Neg) x 36
x 35 P28V5 (Pos)
P28V6 (Neg) x 38
x 37 P28V6 (Pos)
x 39
x 40
x 41
x 42
x 43
x 44
x 45
x 46
x 47
x 48
x
9-188 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
PDM - Power Distribution Module
The Power Distribution Module (PDM) provides 125 V dc and 115 V ac (or 230 V
ac) to the Mark VI system for all racks and terminal boards. The PDM arrangement
is shown in Figure 9-110. There is a second version of the PDM for the control
cabinet in those systems using remote I/O cabinets.
Diagnostics to
VCMI via J301
in <R> Rack
Power Cables to
Interface Modules
125 V dc, 115/230 V ac
DIN rail
Termination
Output Power Board
Connectors
TB2 TB1
Power
TB3 Input Filters
Terminals Filtered DC
and AC power
to PDM
JTX1 AC/DC
115 V Converter
Cable to
Cable to PDM JZ2
Transformer or JZ3
inside AC/DC JTX2
JZ
Converter 230 V
TB1
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-189
Operation
The customer's 125 V dc and 115/230 V ac power is brought through power filters
into the PDM. The ac power is cabled out to one or two ac/dc converters which
produce 125 V dc. This dc voltage is then cabled back into the PDM and diode
coupled to the main dc power, forming a redundant power source, as shown in
Figure 9-110. This power is distributed to the VME racks and terminal boards.
Either 115 V ac or 230 V ac can be handled by the ac/dc converters. The transformer
cable must be plugged into either JTX1 for 115 V ac, or JTX2 for 230 V ac
operation.
Diagnostic information is collected in the PDM and wired out to a DIN rail mounted
terminal board. A cable then runs to the VCMI in rack <R> via J301.
9-190 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
125 VDC AC1 AC2
+ P125 - N125 115/230 VAC 115/230 VAC
TB2 5 6 3 4 1 2
TB1 1 2 3 4 5 6 7 8 9 10 11 12
Chassis Chassis
DS2020PDMAG6 DS200TCPD
FU29 AC Feeders
DCLO AC1N
DCHI AC1H AC2H AC2N J17
FU30
JZ4 J18
FU31
For Bus P125V JZ5 J19
Monitoring FU32 125 VDC
BJS J20 To TREG,
TB3 ACSHI JH1,
P125 VR JZ2 DACA#1
1 Contact
P125S Inputs
(+1.82V) 2 332k
JZ3 DACA#2 +
3
10k -
Chassis 4
5 TB3
10k 12 11 10
6
DC feeders
N125 S 7
SW1
FU1/FU2 J1R
(-1.82V) 8 332k [J2R
9
[J1S
J2S J1T
N125 VR
FU9/FU10 SW5
[
J1C J2T R1 R2
J1D
22 22
FU13/FU14
J8A ohm ohm
J8B 70 70
JZ1 W W
1
FU19/FU20 J8C
10 J8D
TB2 Door
9 FU34/FU35 SW6
1 2 3 4 6
J7X
FU38/FU39 SW8 J7Y
P125 VR 4 J7Z
N125 VR 7
11 J7A
12
R3 R4 1 J7W P125 V
FU21/FU22 2 N125 V
22 22 Door
J12A
ohm ohm
FU25/FU26 J12B
70 W 70 W 3 J12C
2 + P125 V 3 J15
2
R5, 50 ohm,* 70 W FU28 1
FU27
3.2 3.2 Amp
Amp 1
J16
2
R6, 50 ohm,* 70 W 3
Diagnostic Info
JPD
*Note: Field configurable
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-191
Diagnostic Monitoring
As shown in Figure 9-112, the 125 V dc is reduced by a resistance divider network to
signal level for monitoring. Other items monitored include the fuses in the feeders to
the relay output boards. In the interface cabinet this diagnostic data is monitored by
the VCMI; in the control cabinet it is cabled to the VDSK board and then to the
VCMI.
TB3
P125 VR
1 37-pin
332k P125S (+1.82V) connector
2
+28 Analog In 1
3
10k Chassis 29 P125_Grd
4
5 27 Analog In 2
6 10k
+26 N125_Grd 37-wire cable
7 N125 S (-1.82V)
N125 VR 8 332k + 7 Analog In 3
9 8 Spare01
One to one
+5 Analog In 4 compatability Connect to VCMI
6 Spare02 between via J301, in <Rx>
screw (TB) I/O Rack
and 37-pin
10 P5V connector
numbers.
9 DCOM
JPD
35 DIN1, Logic_In_1
P5V 34 DIN2, Logic_In_2
7
DCOM
8 33 DIN3, Logic_In_3
BAT
1
AC1 32 DIN4, Logic_In_4
2
AC2
3 31 DIN5, Logic_In_5
Spare
4
J19 Fuse31 30 DIN6, Logic_In_6
5
J20 Fuse32
6 16 DIN7, Logic_In_7
J17 Fuse29
9
9-192 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
AC1 AC2 To Safety
125 VDC Ground
115/230 115/230
Vac Vac
+P125 - N125 AC1H AC1N AC2H AC2N IS2020CCPD
TB1 1 2 3 4 5 6
Chassis
MOV Suppression
In+ Gnd In- In+ Gnd In- In+ Gnd In-
DCF1 ACF1 ACF2
120/250 V, 30 Amp 120/250 V, 30 Amp 120/250 V, 30 Amp Power Filters
Out+ Out- Out+ Out- Out+ Out-
DS200TCPD AC Feeders to
AC1H AC1N TRLY Boards
DCHI DCLO AC2H AC2N FU29
J17
FU30
P125V JZ4 J18
JZ5 FU31
J19
BJS FU32
J20
DACA#1
ACSHI
DACA#2
JZ2 JZ3
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-193
Interface Cabinet PDM Installation
The cabling, wiring connections, and fuse locations for the PDM in the Interface
cabinet are shown in Figure 9-114.
J1C Spare
J1D Spare
J7A TRPG#1
J7W TREG
J8A TRLY
J8B TRLY
JZ1 J8C TRLY
J8D TRLY
J12A TBCI
Ground reference J12B TBCI
Jumper BJS J12C TBCI
J15 Miscellaneous
J16 Miscellaneous
J17 TRLY
J18 TRLY
J19 TRLY
J20 TRLY
9-194 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Fuses in Interface and Control Cabinet PDM
Interface Cabinet PDM Fuses. Values of the fuses for the PDM
(DS2020PDMAG6) in the I/O (interface) cabinet are shown in Table 9-44.
Current Voltage
PDM Fuse* No. J Connector Rating Rating Vendor Catalog No.
FU1−FU6 J1R, S, T 15 Amps 125 V Bussman GMA-15A
FU7−FU10 J1C, D 5 Amps 125 V Bussman GMA-5A
FU13−FU20 J8A, B, C, D 15 Amps 125 V Bussman GMA-15A
FU21−FU26** J12A, B, C 1.5 Amps 250 V Bussman GMC-1.5A
FU27−FU28*** J15, 16 3.2 Amps 250 V Bussman MDL-3.2A
FU29 J17 15 Amps 250 V Bussman ABC-15A
FU30 J18 5 Amps 250 V Bussman ABC-5A
FU31−FU32 J19, 20 15 Amps 250 V Bussman ABC-15A
FU34−FU39 J7X, Y, Z 5 Amps 125 V Bussman GMA-5A
*All fuses are ferrule type 5 mm x 20 mm, except for FU27-FU32 which are 0.25" x 1.25 ".
**The short circuit rating for FU21-FU26 is 100 Amps
***The short circuit rating for FU27-FU28 is 70 Amps
Control Cabinet PDM Fuses. The PDM in the controller cabinet (IS2020CCPD)
does not supply power to any terminal boards except the TRLY boards. Values for
the fuses in the controller cabinet PDM are similar to those in the I/O cabinet PDM,
except the rating for fuses FU1−FU6 is 5 Amps instead of 15 Amps.
Note When more than one PDM is supplied from a common 125 V dc source,
remove all the BJS connections except one.
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-195
Low Voltage Power Supply
The low voltage rack power supply mounts on the side of the VME rack and runs off
a 24 V dc supply, refer to Figure 9-115. It supplies the VME rack with the same
voltages and currents as the 125 V dc version, but the 335 V output for powering
flame detectors is not available.
Cable Harness
to VME Rack Side View
PSA PSB
POWER
SUPPLY
Pull to Toggle
On
Off
Normal
Fault
Available
28 V dc 24 Vdc
(special)
9-196 • Chapter 9 I/O Board Descriptions Mark VI System Guide GEH-6421C, Vol. II
Specification
The cooling air ambient temperature specification for the low voltage power supply
is 65 ºC. Other specifications are similar to the 125 V dc version. Refer to Table 9-45
for details.
Item Description
Input Voltage 18 to 32 V dc floating supply
Up to 2 V pp ripple
Under voltage shutdown on input voltage, latching, cycle shutdown switch to recover
Isolation True isolation from input to output, 1500 V
Output Voltages Output Voltage Voltage Regulation Capacity Current Over Voltage Shutdown
P5 +5 V dc Less than ± 3% 150 W 30 A 20% ± 5%
P15 +15 V dc Less than ± 3% 50 W 3.33 A 20% ± 5%
N15 −15 V dc Less than ± 3% 50 W 3.33 A 20% ± 5%
P12 +12 V dc Less than ± 3% 50 W 4.17 A 20% ± 5%
N12 −12 V dc Less than ± 3% 25 W 2.08 A 20% ± 5%
P28 +28 V dc Less than ± 5% 50 W 1.78 A 20% ± 5%
N28 −28 V dc Less than ± 5% 25 W 0.89 A 20% ± 5%
Total Output Maximum 325 W
Short Circuit Short circuit protection on all power supplies with self recovery
Temperature Ambient air convection cooling 0 to 65 ºC
Indicating Lights Green: Normal Status is OK
Red: Fault Power is applied but supply is shutdown due to:
Trouble with the supply, latched off
Low input voltage, latched off
Yellow: Available Power is applied, but switch is off
Power The 5 V dc supply reaches voltage first, then all the others
Sequencing
GEH-6421C, Vol. II Mark VI System Guide Chapter 9 I/O Board Descriptions • 9-197
Glossary of Terms
ADL
Asynchronous Device Language, an application layer protocol used for I/O
communication on IONet.
application code
Software that controls the machines or processes, specific to the application.
ARCNET
Attached Resource Computer Network. A LAN communications protocol developed
by Datapoint Corporation. The physical (coax and chip) and datalink (token ring and
board interface) layer of a 2.5 MHz communication network which serves as the
basis for DLAN+. See DLAN+.
ASCII
American Standard Code for Information Interchange. An 8-bit code used for data.
attributes
Information, such as location, visibility, and type of data that sets something apart
from others. In signals, an attribute can be a field within a record.
baud
A unit of data transmission. Baud rate is the number of bits per second transmitted.
Bently Nevada
A manufacturer of shaft vibration monitoring equipment.
bind
A toolbox command in the Device menu used to obtain information from the SDB..
bit
Binary Digit. The smallest unit of memory used to store only one piece of
information with two states, such as One/Zero or On/Off. Data requiring more than
two states, such as numerical values 000 to 999, requires multiple bits (see Word).
block
Instruction blocks contain basic control functions, which are connected together
during configuration to form the required machine or process control. Blocks can
perform math computations, sequencing, or continuous control. The toolbox receives
a description of the blocks from the block libraries.
board
Printed wiring board.
Boolean
Digital statement that expresses a condition that is either True or False. In the
toolbox, it is a data type for logical signals.
bus
An electrical path for transmitting and receiving data.
bumpless
No disruption to the control when downloading.
byte
A group of binary digits (bits); a measure of data flow when bytes per second.
CIMPLICITY
Operator interface software configurable for a wide variety of control applications.
CMOS
Complementary metal-oxide semiconductor.
COM port
Serial controller communication ports (two). COM1 is reserved for diagnostic
information and the Serial Loader. COM2 is used for I/O communication
configure
To select specific options, either by setting the location of hardware jumpers or
loading software parameters into memory.
CT
Current Transformer, used to measure current in an ac power cable.
datagrams
Messages sent from the controller to I/O blocks over the Genius network.
data server
A PC which gathers control data from input networks and makes the data available
to PCs on output networks.
dead band
A range of values in which the incoming signal can be altered without changing the
output response.
device
A configurable component of a process control system.
DIN-rail
European standard mounting rail for electronic modules.
DLAN+
GE Industrial System's LAN protocol, using an ARCNET controller chip with
modified ARCNET drivers. A communications link between exciters, drives, and
controllers, featuring a maximum of 255 drops with transmissions at 2.5 MBPS.
DRAM
Dynamic Random Access Memory, used in microprocessor-based equipment.
EGD
Ethernet Global Data is a control network and protocol for the controller. Devices
share data through EGD exchanges (pages).
EMI
Electro-magnetic interference; this can affect an electronic control system
Ethernet
LAN with a 10/100 M baud collision avoidance/collision detection system used to
link one or more computers together. Basis for TCP/IP and I/O services layers that
conform to the IEEE 802.3 standard, developed by Xerox, Digital, and Intel.
event
A property of Status_S signals that causes a task to execute when the value of the
signal changes.
EX2000 (Exciter)
GE generator exciter control; regulates the generator field current to control the
generator output voltage.
fanned input
An input to the termination board which is connected to all three TMR I/O boards.
fault code
A message from the controller to the HMI indicating a controller warning or failure.
Finder
A subsystem of the toolbox for searching and determining the usage of a particular
item in a configuration.
firmware
The set of executable software that is stored in memory chips that hold their content
without electrical power, such as EEPROM.
flash
A non-volatile programmable memory device.
forcing
Setting a live signal to a particular value, regardless of the value blockware or I/O is
writing to that signal.
frame rate
Basic scheduling period of the controller encompassing one complete
input-compute-output cycle for the controller. It is the system dependent scan rate.
function
The highest level of the blockware hierarchy, and the entity that corresponds to a
single .tre file.
gateway
A device that connects two dissimilar LAN or connects a LAN to a wide-area
network (WAN), PC, or a mainframe. A gateway can perform protocol and
bandwidth conversion.
Graphic Window
A subsystem of the toolbox for viewing and setting the value of live signals.
health
A term that defines whether a signal is functioning as expected.
Heartbeat
A signal emitted at regular intervals by software to demonstrate that it is still active.
hexadecimal (hex)
Base 16 numbering system using the digits 0-9 and letters A-F to represent the
decimal numbers 0-15. Two hex digits represent 1 byte.
HMI
Human Machine Interface, usually a PC running CIMPLICITY software.
HRSG
Heat Recovery Steam Generator using exhaust from a gas turbine.
ICS
Integrated Control System. ICS combines various power plant controls into a single
system.
IEEE
Institute of Electrical and Electronic Engineers. A United States-based society that
develops standards.
initialize
To set values (addresses, counters, registers, and such) to a beginning value prior to
the rest of processing.
I/O drivers
Interface the controller with input/output devices, such as sensors, solenoid valves,
and drives, using a choice of communication networks.
I/O mapping
Method for moving I/O points from one network type to another without needing an
interposing application task.
IONet
The Mark VI I/O Ethernet communication network; controlled by the VCMIs.
insert
Adding an item either below or next to another item in a configuration, as it is
viewed in the hierarchy of the Outline View of the toolbox.
instance
Update an item with a new definition.
item
A line of the hierarchy of the Outline View of the toolbox, which can be inserted,
configured, and edited (such as Function or System Data).
IP Address
The address assigned to a device on an Ethernet communication network.
logical
A statement of a true sense, such as a Boolean.
macro
A group of instruction blocks (and other macros) used to perform part of an
application program. Macros can be saved and reused.
median
The middle value of three values; the median selector picks the value most likely to
be closest to correct.
module
A collection of tasks that have a defined scheduling period in the controller.
MTBFO
Mean Time Between Forced Outage, a measure of overall system reliability.
NEMA
National Electrical Manufacturers Association; a U.S. standards organization.
non-volatile
The memory specially designed to store information even when the power is off.
online
Online mode provides full CPU communications, allowing data to be both read and
written. It is the state of the toolbox when it is communicating with the system for
which it holds the configuration. Also, a download mode where the device is not
stopped and then restarted.
pcode
A binary set of records created by the toolbox, which contain the controller
application configuration code for a device. Pcode is stored in RAM and Flash
memory.
period
The time between execution scans for a Module or Task. Also a property of a
Module that is the base period of all of the Tasks in the Module.
pin
Block, macro, or module parameter that creates a signal used to make
interconnections.
PLC
Programmable Logic Controller. Designed for discrete (logic) control of machinery.
It also computes math (analog) function and performs regulatory control.
PLU
Power load unbalance, detects a load rejection condition which can cause overspeed.
Proximitor
Bently Nevada's proximity probes used for sensing shaft vibration.
PT
Potential Transformer, used for measuring voltage in a power cable.
QNX
A real time operating system used in the controller.
realtime
Immediate response, referring to process control and embedded control systems that
must respond instantly to changing conditions.
reboot
To restart the controller or toolbox.
RFI
Radio Frequency Interference; this is high frequency electromagnetic energy which
can affect the system.
register page
A form of shared memory that is updated over a network. Register pages can be
created and instanced in the controller and posted to the SDB.
RTD
Resistance Temperature Device, used for measuring temperature.
runtime
See product code.
runtime errors
Controller problems indicated on the front panel by coded flashing LEDS, and also
in the Log View of the toolbox.
sampling rate
The rate at which process signal samples are obtained, measured in samples/second.
Serial Loader
Connects the controller to the toolbox PC using the RS-232C COM ports. The Serial
Loader initializes the controller flash file system and sets its TCP/IP address to allow
it to communicate with the toolbox over Ethernet.
Server
A PC which gathers data over Ethernet from plant devices, and makes the data
available to PC-based operator interfaces known as Viewers.
SIFT
Software Implemented Fault Tolerance, a technique for voting the three incoming
I/O data sets to find and inhibit errors. Note that Mark VI also uses output hardware
voting.
signal
The basic unit for variable information in the controller.
Simplex
Operation that requires only one set of control and I/O, and generally uses only one
channel. The entire Mark VI control system can operate in Simplex mode, or
individual VME boards in an otherwise TMR system can operate in Simplex mode.
simulation
Running a system without all of the configured I/O devices by modeling the behavior
of the machine and the devices in software.
stall detection
Detection of stall condition in a gas turbine compressor.
SOE
Sequence of Events, a high-speed record of contact closures taken during a plant
upset to allow detailed analysis of the event.
Static Starter
See LCI.
Status_S pages
Devices share data through Status_S pages. They make the addresses of the points on
the pages known to other devices through the system database.
symbols
Created by the toolbox and stored in the controller, the symbol table contains signal
names and descriptions for diagnostic messages.
task
A group of blocks and macros scheduled for execution by the user.
TBAI
Analog input termination board, interfaces with VAIC.
TBAO
Analog output termination board, interfaces with VAOC.
TBCC
Thermocouple input termination board, interfaces with VTCC.
TBCI
Contact input termination board, interfaces with VCCC or VCRC.
TCP/IP
Communications protocols developed to inter-network dissimilar systems. It is a
de facto UNIX standard, but is supported on almost all systems. TCP controls data
transfer and IP provides the routing for functions, such as file transfer and e-mail.
TGEN
Generator termination board, interfaces with VGEN.
TMR
Triple Modular Redundancy. An operation that uses three identical sets of control
and I/O (channels R, S, and T) and votes the results.
toolbox
A Windows-based software package used to configure the Mark VI controllers, also
exciters and drives.
TPRO
Turbine protection termination board, interfaces with VPRO.
TPYR
Pyrometer termination board for blade temperature measurement, interfaces with
VPYR.
TREG
Turbine emergency trip termination board, interfaces with VPRO.
trend
A time-based plot to show the history of values, similar to a recorder, available in the
Historian and the toolbox.
TRLY
Relay output termination board, interfaces with VCCC or VCRC.
TRPG
Primary trip termination board, interfaces with VTUR.
TRTD
RTD input termination board, interfaces with VRTD.
TSVO
Servo termination board, interfaces with VSVO.
TVIB
Vibration termination board, interfaces with VVIB.
UCVB
A version of the Mark VI controller.
validate
Makes certain that toolbox items or devices do not contain errors, and verifies that
the configuration is ready to be built into pcode.
VCMI
The Mark VI VME communication board which links the I/O with the controllers.
VME board
All the Mark VI boards are hosted in Versa Module Eurocard (VME) racks.
VPRO
Mark VI Turbine Protection Module, arranged in a self contained TMR subsystem.
Windows NT
Advanced 32-bit operating system from Microsoft for 386-based PCs and above.
word
A unit of information composed of characters, bits, or bytes, that is treated as an
entity and can be stored in one location. Also, a measurement of memory length,
usually 4, 8, or 16-bits long.
H
Health 9-139, 9-155
heat recovery steam generator 9-1
Historian 9-1, 9-3
humidity range 9-5, 9-7, 9-9
C
I
CIMPLICITY HMI 9-1
controller 9-155 I/O Processor Boards
VSCA 9-154, 9-155, 9-156, 9-157
VVIB 9-137
D IEC 9-1
data highways 9-1 IEEE 9-13, 9-16, 9-37
Data Terminal Equipment 9-154 IEEE 802.3 9-1, 9-20, 9-22, 9-125, 9-160
diagnostic alarms 9-1 IONet 9-155
DIN Board IONet port 9-24, 9-88, 9-90, 9-125, 9-126
DPWA 9-160 IPC 9-24, 9-45, 9-46
DSCB 9-154, 9-157, 9-158
DVIB 9-137, 9-138 L
DSVO 9-102
DTE (see Data Terminal Equipment) 9-154 LAN 9-24, 9-88, 9-102, 9-106
LCI static starter 9-24, 9-64, 9-65
low voltage rack power supply 9-34
E LVDT 9-154
engineering work stations 9-190
environmental 9-1 M
Euro block 9-108, 9-109, 9-141
Euro Block 9-137, 9-154, 9-157, 9-160 magnetic pickups 9-24, 9-125, 9-126
Mark VI controller 9-2, 9-24, 9-127, 9-128
mean time to repair 9-5, 9-7, 9-9
F Modbus (see Serial Modbus) 9-155, 9-156
fiber-optic 9-1, 9-5, 9-7, 9-9, 9-16, 9-39, 9-61, 9-70, 9- MTTR 9-93, 9-111, 9-162, 9-164, 9-168, 9-171
81, 9-98, 9-122, 9-150, 9-165
N
G network hubs 9-190
GE Fanuc 90-70 PLC 9-1, 9-2, 9-10, 9-11, 9-12, 9-14,
9-15, 9-19, 9-22, 9-25, 9-37, 9-43, 9-49, 9-50, 9- S
58, 9-59, 9-60, 9-61, 9-68, 9-69, 9-70, 9-77, 9-78,
9-79, 9-92, 9-93, 9-96, 9-97, 9-110, 9-111, 9-116, SCOM 9-137, 9-138, 9-154, 9-157
9-118, 9-122, 9-125, 9-131, 9-132, 9-141, 9-142, Serial Modbus 9-155, 9-156
9-162, 9-164, 9-168, 9-171, 9-172, 9-180, 9-181, Simplex 9-137
9-184, 9-189, 9-192 Standards (see Codes and Standards) 9-1
Geiger Mueller 9-25, 9-37, 9-59, 9-97, 9-142, 9-189, 9- synchronization 9-1
192 system reliability 9-7
U
UCVB 9-91, 9-165, 9-190
UCVD 9-38, 9-112, 9-114, 9-139, 9-141, 9-143, 9-144,
9-145, 9-172, 9-174
UCVE 9-2, 9-3
UDH 9-2, 9-5, 9-7, 9-9, 9-8
unhealthy 9-155
unit data highway 9-20, 9-24, 9-36, 9-37, 9-38, 9-39, 9-
40, 9-41, 9-42, 9-43, 9-44, 9-45
V
VAIC 9-24, 9-34, 9-35, 9-45, 9-46, 9-47, 9-56, 9-57, 9-
64, 9-65, 9-74, 9-75, 9-90, 9-102, 9-106, 9-125, 9-
126, 9-127, 9-128, 9-137, 9-138, 9-154, 9-157, 9-
158, 9-160
VAOC 9-131, 9-133
VCCC 9-15, 9-69, 9-70, 9-71
VDSK board 9-1
VGEN 9-108, 9-112
vibration 9-9
VME 9-2, 9-12, 9-14, 9-15, 9-16, 9-20, 9-22, 9-23, 9-
24, 9-25, 9-34, 9-36, 9-44, 9-45, 9-52, 9-56, 9-62,
9-64, 9-66, 9-74, 9-76, 9-77, 9-88, 9-93, 9-96, 9-
102, 9-109, 9-111, 9-113, 9-122, 9-125, 9-127, 9-
131, 9-137, 9-140, 9-147, 9-164, 9-166
VME rack power supply 9-15, 9-69
VPRO 9-7, 9-9
VRTD 9-97, 9-111, 9-139, 9-141, 9-186
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