Practical Workbook

Name: Hirpara Daivik Bharat Bhai

Roll Number: 202211028
Branch: Computer Science and Engineering
Batch: 2022
Subject: EC261
Session: 2023-24

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 Certificate

This is to certify that Mr. Daivik Hirpara of B. Tech

of semester III Enrolment Number 202211028
Branch Computer Science and Engineering (CSE)
has been found satisfactory in the continuous internal
evaluation of laboratory, practical and term work in
the subject EC261 for the academic year 2023-2024.

Date: Sign of Faculty:

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 List of Experiments

S. No. Name of experiment Date of Date of Faculty’s

experiment submission sign
1. Basic familiarity with logic 19/9/23 26/9/23
gate. Verify the truth table of
given 74-series IC

2. (i) Make the different basic 27/9/23 3/10/23

logic gates using the universal
gate.
(ii) Make half adder and
subtractor using universal gate.
3. (i) Make full adder and full 4/10/23 10/10/23
subtractor.
(ii) Make BCD to grey code
convertor and vice versa.
(iii) Make 2 Bit Adder Circuit
4. (i) Make 2 bit Comparator 11/10/23 17/10/23
(ii) Make 4×1 multiplexer using
2x1 multiplexer
(iii) Make 4×2 encoder and 2×4
decoder

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Experiment 1

Aim of The Experiment:-

Basic familiarity with logic gate. Verify the truth table of given
74-series IC.
(i) AND
(ii) NAND
(iii) NOT
(iv) NOR
(v) OR
(vi) Xor

Components Required:-

• Breadboard
• IC
• LED
• Wires
• Voltage source (+5V)

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Theory:-

A logic gate is an idealized or physical device implementing a

Boolean function, a logical operation performed on one or more
binary inputs that produces a single binary output.

Different Logic Gates are :-

AND Gate:-

An AND gate is a logic gate having two or more inputs

and a single output. An AND gate operates on logical
multiplication rules. In this gate, if either of the inputs
is low (0), then the output is also low. If all of the
inputs are high (1), then the output will also be high.

NAND Gate:-
A NAND gate (“not AND gate”) is a logic gate that
produces a low output (0) only if all its inputs are true,
and high output (1) otherwise. Hence the NAND gate
is the inverse of an AND gate, and its circuit is
produced by connecting an AND gate to a NOT gate.

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NOT Gate:-
A NOT gate, often called an inverter, is a nice digital
logic gate to start with because it has only a single
input with simple behavior. A NOT gate performs
logical negation on its input. In other words, if the
input is true, then the output will be false. Similarly, a
false input results in a true output.

NOR Gate:-
A NOR gate (“not OR gate”) is a logic gate that
produces a high output (1) only if all its inputs are
false, and low output (0) otherwise. Hence the NOR
gate is the inverse of an OR gate, and its circuit is
produced by connecting an OR gate to a NOT gate.

OR Gate:-
An OR gate is a logic gate that performs logical OR
operation. A logical OR operation has a high output
(1) if one or both the inputs to the gate are high (1). If
neither input is high, a low output (0) results.

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XOR Gate:-

XOR” an abbreviation for “Exclusively-OR.” The

simplest XOR gate is a two-input digital circuit that
outputs a logical “1” if the two input values differ, i.e.,
its output is a logical “1” if either of its inputs are 1,
but not at the same time (exclusively).

Observation:-

Nand Gate:-

Truth table:

A B NAND

0 0 1

0 1 1

1 0 1

1 1 0

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NOT Gate:-

Truth table:

A NOT

0 1

1 0

AND Gate:-

Truth table:

A B AND

0 0 0

0 1 0

1 0 0

1 1 1

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XOR Gate:-

Truth table:

A B XOR

0 0 0

0 1 1

1 0 1

1 1 0

OR Gate:-

Truth table:

A B OR
0 0 1
0 1 1
1 0 1
1 1 0

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NOR Gate:-

Truth table:

A B NOR
0 0 1
0 1 0
1 0 0
1 1 0

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Conclusion:-

We have verified the truth table for all logic gates

including NAND, NOT, AND, XOR, NOR, OR
gates.
*-*-*-*-*

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Experiment 2

Aim of The Experiment :-

Perform the following:

(i) Make the different basic logic gates using the universal gate.
(ii) Make half adder and subtractor using universal gate.

Components Required:-

• Breadboard
• IC
• LED
• Wires
• Voltage source (+5V)
• NAND GATE (7400)
• NOR GATE (7402)

Software :-
• Logisim

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Theory:-

Universal Gates:-

• A universal gate is a gate which can implement any

Boolean function without need to use any other gate type.
• The NAND and NOR gates are universal gates.
• In practice, this is advantageous since NAND and NOR
gates are economical and easier to fabricate and are the
basic gates used in all IC digital logic families.
• In fact, an AND gate is typically implemented as a NAND
gate followed by an inverter not the other way around!!
• Likewise, an OR gate is typically implemented as a NOR
gate followed by an inverter not the other way around!!

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Half Adder Circuit :-

• A combinational logic circuit which is designed to add

two binary digits is called as a half adder.
• The half adder provides the output along with a carry
value (if any).
• The half adder circuit is designed by connecting an EX-
OR gate and one AND gate.
• It has two input terminals and two output terminals for
sum and carry.

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Characteristics Equations of Half adder :-

The characteristic equations of half adder, i.e. equations of sum

(S) and carry (C) are obtained according to the rules of binary
addition. These equations are given below:-
The sum (S) of the half-adder is the XOR of A and B.
Sum, S=A⊕B=AB′+A′B
The carry (C) of the half-adder is the AND of A and B.
Carry, C=A⋅B

Truth Table:-

A B Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

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Half Subtractor Circuit :-

• A half-subtractor is a combinational logic circuit that have

two inputs and two outputs (i.e. difference and borrow).
• The half subtractor produces the difference between the
two binary bits at the input and also produces a borrow
output (if any).
• In the subtraction (A-B), A is called as Minuend bit and B
is called as Subtrahend bit.

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Characteristics Equations of Half subtractor :-

The characteristic equations of the half subtractor, i.e.

equations of the difference bit (d) and the output borrow bit (b)
are obtained by following the rules of binary subtraction. These
equations are given as follows :-
The difference bit (d) of the half subtractor is given by XORing
the two inputs A and B.
Difference, d=A⊕B=A′B+AB′
The borrow (b) of the half subtractor is the AND of A’
(compliment of A) and B.
Borrow, b=A′B

Truth Table:-

A B Difference Borrow
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0

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Observations:-

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Conclusion:-
We have verified the truth table of all gates using universal
gates. We have also verified the truth table of half adder and
half subtractor circuit using universal gates.

*-*-*-*-*

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Experiment 3

Aim of The Experiment :-

Perform the following:

(i) Make full adder and full subtractor.
(ii) Make BCD to grey code convertor and vice versa.
(iii) Make 2 Bit Adder Circuit.

Components Required:-

• Breadboard
• IC
• LED
• Wires
• Voltage source (+5V)
• AND GATE (7408)
• OR GATE (7432)
• XOR GATE (7486)

Software :-
• Logisim

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Theory:-

Full Adder:-

• A combinational logic circuit that can add two binary

digits (bits) and a carry bit, and produces a sum bit and a
carry bit as output is known as a full-adder.
• In other words, a combinational circuit which is designed
to add three binary digits and produces two outputs (sum
and carry) is known as a full adder. Thus, a full adder
circuit adds three binary digits, where two are the inputs
and one is the carry forwarded from the previous addition.

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Characteristic Equations of Full Adder

The characteristic equations of the full adder, i.e equations of

sum (S) and carry output (Cout) are obtained according to the
Sum, S=A⊕B⊕C=A′B′+A′BC′+AB′C′+ABC
Sum, S=A⊕B⊕C=A′B′C+A′BC′+AB′C′+ABC
Carry, Cout =AB+AC+BC

Truth Table:-

A B C Sum Carry
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

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Full Subtractor:-

• A Full Subtractor is a combinational logic circuit which

performs a subtraction between the two 1-bit binary
numbers and it also considers the borrow of the previous
bit i.e., whether 1 has been borrowed by the previous
minuend bit.
• So, a Full Subtractor has three inputs, in which two inputs
corresponding to the two bits to be subtracted (minuend A
and subtrahend B), and a borrow bit, usually represented
as Bin, corresponding to the borrow operation. There are
two outputs, one corresponds to the difference D output
and the other Borrow output Bo.

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Characteristic Equations of Full Subtractor

The characteristic equations of the full subtractor, i.e. equations

of the difference (d) and borrow output (b) are obtained by
following the rules of binary subtraction.

Difference, d=A⊕B⊕bin
d=A′B′bin+AB′b′in+A′Bb′in+ABbin
Borrow, b=A′B+(A⊕B)′bin

Truth Table:-

A B C Difference Borrow
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

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Binary to Grey Code Convertor

Formula:-
𝐺𝑛−1 = 𝐵𝑛 ⊕𝐵𝑛−1

Grey Code to Binary Convertor

Formula:-
𝐵𝑛−1 = 𝐵𝑛 ⊕𝐺𝑛−1

Note:- In both the cases Most significant bit (MSB) will

remain same.

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2 Bit Adder Circuit :-

Truth Table:-

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Observation:-

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Conclusion:-

We have verified the truth table of Full adder and Subtractor.

We have also verified the truth table of BCD to grey code
convertor and vice versa. We also made two bit adder circuit.

*-*-*-*-*

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Experiment 4

Aim of The Experiment :-

Design the following using logic gates
(i) 2-bit magnitude comparator
(ii) 4 × 1 multiplexer using 2 × 1 multiplexer
(iii) 4 × 2 encoder and 2 × 4 decoder

Components Required:-

• Breadboard
• IC
• LED
• Wires
• Voltage source (+5V)
• AND GATE (7408)
• OR GATE (7432)
• XOR GATE (7486)
• NOT GATE (7402)

Software :-
• Logisim

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Theory:-

2-Bit Comparator

• A magnitude digital Comparator is a combinational circuit

that compares two digital or binary numbers in order to
find out whether one binary number is equal, less than, or
greater than the other binary number.

• We logically design a circuit for which we will have two

inputs one for A and the other for B and have three output
terminals, one for A > B condition, one for A = B
condition, and one for A < B condition.

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Characteristic Equation
• A > B : A1B1’ + A0B1’B0’ + A1A0B0’
• A < B : A1’B1 + A0’B1B0 + A1’A0’B0
• A = B : A1’A0’B1’B0’ + A1’A0B1’B0 + A1A0B1B0 +
A1A0’B1B0’
• A = B : A1’B1’ (A0’B0’ + A0B0) + A1B1 (A0B0 +
A0’B0’)
• A = B : (A0B0 + A0’B0’) (A1B1 + A1’B1’)
• A = B : (A0 Ex-Nor B0) (A1 Ex-Nor B1)

Truth Table

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2x1 Multiplexer

In 2×1 multiplexer, there are only two inputs, i.e., A0 and A1,
1 selection line, i.e., S0 and single outputs, i.e., Y. On the basis
of the combination of inputs which are present at the selection
line S0, one of these 2 inputs will be connected to the output.

Logical Expression
• Y=S0'A0+S0A

Truth Table:

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4x1 Multiplexer

In the 4×1 multiplexer, there is a total of four inputs, i.e., A0,

A1, A2, and A3, 2 selection lines, i.e., S0 and S1 and single
output, i.e., Y. On the basis of the combination of inputs that
are present at the selection lines S0 and S1, one of these 4 inputs
are connected to the output.

Logical Expression
• Y=S1' S0' A0+S1' S0 A1+S1 S0' A2+S1 S0 A3

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Truth Table

4x1 Multiplexer using 2x1 Multiplexer

• In 2x1 multiplexer, there are only two inputs, i.e., A0 and

A1, 1 selection line, i.e., S0 and single outputs, i.e., Y.

• On the basis of the combination of inputs which are

present at the selection line S0, one of these 2 inputs will
be connected to the output. Using the outputs of 2 (2x1
Multiplexer) as input to another 2x1 Multiplexer we get
the desired 4x1 Multiplexer.

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4x2 Encoder

Let 4 to 2 Encoder has four inputs Y3, Y2, Y1 & Y0 and two
outputs A1 & A0. At any time, only one of these 4 inputs can be
‘1’ in order to get the respective binary code at the output.

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Logical Expression
• A1=Y3+Y2
• A0=Y3+Y1

Note: Y0 Pin is ‘Don’t Care’.

Truth Table:

Inputs Outputs
Y3 Y2 Y1 Y0 A1 A0
0 0 0 1 0 0
0 0 1 0 0 1
0 1 0 0 1 0
1 0 0 0 1 1

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2x4 Decoder

Let 2 to 4 Decoder has two inputs A1 & A0 and four outputs Y3,
Y2, Y1 & Y0. One of these four outputs will be ‘1’ for each
combination of inputs when enable, E is ‘1’.

Logical Expression
• Y3=E.A1.A0
• Y2=E.A1.A0′
• Y1=E.A1′.A0
• Y0=E.A1′.A0′

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Truth Table:

Enable Inputs Outputs

E A1 A0 Y3 Y2 Y1 Y0
0 x x 0 0 0 0
1 0 0 0 0 0 1
1 0 1 0 0 1 0
1 1 0 0 1 0 0
1 1 1 1 0 0 0

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Observations :-

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Conclusion:-
We have verified the truth table of 2-bit comparator. We have
also verified the truth table of 4*1 Mux using 2*1 Mux. we also
made 4x2 encoder and 2x4 decoder.

*-*-*-*-*

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