OCR ExamBuilder Test Export

Computer Science (A Level)
CS teacher
Please note that you may see slight differences between
this paper and the original.
Duration: Not set
Candidates answer on the Question paper.
OCR supplied materials:

Additional resources may be supplied with this paper.
Other materials required:

• Pencil
• Ruler (cm/mm)
Candidate Candidate
forename surname
Centre number Candidate number
INSTRUCTIONS TO CANDIDATES
• Write your name, centre number and candidate number in the boxes above. Please write clearly and in capital letters.
• Use black ink. HB pencil may be used for graphs and diagrams only.
• Answer all the questions, unless your teacher tells you otherwise.
• Read each question carefully. Make sure you know what you have to do before starting your answer.
• Where space is provided below the question, please write your answer there.
• You may use additional paper, or a specific Answer sheet if one is provided, but you must clearly show your candidate
number, centre number and question number(s).
INFORMATION FOR CANDIDATES

• The quality of written communication is assessed in questions marked with either a pencil or an asterisk. In History and
Geography a Quality of extended response question is marked with an asterisk, while a pencil is used for questions in
which Spelling, punctuation and grammar and the use of specialist terminology is assessed.
• The number of marks is given in brackets [ ] at the end of each question or part question.
• The total number of marks for this paper is 161.
• The total number of marks may take into account some 'either/or' question choices.
© OCR 2023. You may photocopy this page. 1 of 56 Created in ExamBuilder

1 * Modern computers tend to have magnetic or solid state (flash) hard drives. Discuss which hard drive you would
recommend for a keen video games player to use on their desktop PC.
[9]

2(a) The following is a program written using the Little Man Computer instruction set.
Explain the buses and registers used when the line SUB one is executed.
[5]
(b) Explain, giving an example, how pipelining in a CPU could speed up the execution of this program.
[3]

(c) Describe one issue the line BRP start may cause for a CPU using pipelining.
[2]
3 A processor contains a number of special registers.
Explain the need for the following registers.
(i) Program Counter (PC)
[2]
(ii) Memory Address Register (MAR)
[2]
(iii) Memory Data Register (MDR)
[2]

4 Computer software is used in Geography lessons to teachstudents about weather systems.
Describe how the following forms of output will be used by the software.
(i) Animation
[2]
(ii) Interactive presentation
[2]

5 A processor contains a number of special registers.
Name and describe three buses used to convey information between the special registers.
[6]

6 *Some problems require a large amount of computing power that goes well beyond a single CPU.
Discuss the different approaches that can be taken to provide increasingly larger amounts of computing power
and the types of problem they are suited to.
[12]

7 * A student, Dan, on a limited budget finds his computer is running slowly. He uses his computer for university
work and internet browsing.
Discuss what measures can be taken to improve Dan’s computer’s performance. You should explain what these
measures are, why they improve the performance and justify whether you would recommend them.
[9]

8
The complete program written using the Little Man Computer instruction set is shown below:
main INP entry

STA test
fail BRA entry
LDA one
ADD main
BRA
test SUB ten

BRZ pass
BRP test
BRA fail
pass LDA entry

OUT
HLT
entry DAT 10
ten DAT 1
one DAT
(i) Give one instruction in the program that when executed, changes the value in the Accumulator.
[1]
(ii) Give one instruction in the program that when executed, changes the value in the Program Counter.
[1]

(iii) State the value the code outputs for the input 18.
[1]
(iv) State the value the code outputs for the input 37.
[1]
(v) Describe the purpose of the program.
[2]
9 The Government Communications Headquarters (GCHQ) is responsible for monitoring communications in order
to keep the UK secure. A large part of its job involves trying to break into encrypted messages.
The code breakers at GCHQ have access to supercomputers (computers with many processors).
Describe why a supercomputer will be useful to GCHQ.
[2]

10(a) A digital coffee making machine has a CPU that uses the Little Man Computer Instruction Set.
Little Man Computer operates on a computer system based on the Von Neumann Architecture.
(i) State two features of the Von Neumann architecture.
[2]
(ii) Describe one feature, not part of the standard Von Neumann Architecture, which contemporary CPUs may
have in order to improve performance.
[2]
(b) Part of the coffee making machine’s code asks the user to press a button to select strength. The code outputs 1
which will switch on a green light to indicate a valid selection or outputs 0 to indicate an invalid selection.

The code is shown below:
INP
STA entry
LDA max
SUB entry
BRP accept
LDA redLight
BRA printAndEnd
accept LDA greenLight
printAndEnd OUT
HLT
greenLight DAT 1
redLight DAT 0
max DAT 5
entry DAT
Fig. 1
(i) Tick the appropriate boxes below to indicate which inputs will result in a green light (i.e. code outputs 1) and
which with a red light.
Input Green Light Red Light

1
2
3
4
5
6
7
8
9
[2]
(ii) Explain which registers and buses are used, and the values they store/carry, when the line LDA redLight
is executed (after it has been fetched and decoded). You should assume the address redLight refers to
memory location 11.

[6]
(iii) Write code in a high-level language or pseudocode that has the same functionality as the code in Fig. 1.
[3]
(iv) * Discuss the differences between assembly code and high-level languages. You should refer to:

• the advantages and disadvantages of writing programs in assembly code rather than a high-level
language
• when each approach might be used
• why the coffee machine was programmed in assembly code.
[9]

11 The company sets up a website to promote OCR smart watch. Part of the website is shown below. The
sentence ‘Download The Factsheet’ is a hyperlink to the file factsheet.pdf which is stored in the same folder as
the HTML file for the webpage.
Features
The new OCR Smart Watch:
1. Uses the CB2 RISC processor for long battery life
2. Stores up to 20hrs of music
3. Tracks fitness
Download The Factsheet
(i) Write the HTML to produce the extract from the webpage above. You can assume it will be placed within the
<body> tags of a pre-existing page. You do not need to specify the font.
[5]
(ii) Explain what happens when a search engine indexes the page. You do not need to discuss ranking.

[3]
(iii) Explain why using a RISC processor rather than a CISC processor is likely to result in increased battery life.
[3]
12 A CPU will repeatedly run the Fetch-Decode-Execute-cycle shown in Fig. 1.
Fig. 1
(i) Describe what happens during the ‘Fetch’ stage shown in Fig. 1.

You should refer to the use of specific registers in your answer.
[4]
(ii) A CPU may need to stop running the Fetch-Decode-Execute-cycle in order to handle an interrupt.
Tick one box to indicate where in Fig. 1 an interrupt would be handled.
[1]

13 The table below shows the Little Man Computer instruction set.
Mnemonic Instruction
ADD Add
SUB Subtract
STA
LDA Load
Branch always
BRZ
BRP
INP Input
OUT Output
End program
Write a program using the Little Man Computer instruction set that will allow a user to input two numbers and
then output the larger of the two numbers. The program should loop continuously.

[6]
14 Imogen buys a desktop computer. It comes with an operating system installed.
(i) Describe two ways that an operating system could manage physical memory.

2
[4]
(ii) Explain one benefit of memory management to the user.
[2]
(iii) Describe how virtual memory allows a user to run programs when physical memory is full.
[2]

15 CPUs can be designed to take a Complex Instruction Set Computer (CISC) or a Reduced Instruction Set
Computer (RISC) approach.
Describe one difference between CISC and RISC.
[2]

16(a) Amy’s processor makes use of pipelining during the fetch-decode-execute cycle.
The processor’s pipeline consists of the following stages:
• Fetching the instruction from memory

• Decoding the instruction
• Executing the instruction.
Instructions A, B, C and D need to be processed.
Identify the stage(s) and instruction(s) run during each pipeline below.
Pipeline 1
Pipeline 2
Pipeline 3
Pipeline 4
[4]

(b) Explain why pipelining can improve the performance of the processor.
[2]
17(a) The CPU uses pipelining to improve efficiency.
Explain what is meant by the term ‘pipelining’.
[3]
(b) * OCR Insurance’s computer system uses secondary storage across the company in servers, client machines
and for backup purposes.
For each of these, discuss whether magnetic storage or solid state storage would be most suitable, taking into
account the advantages and disadvantages of both.

[9]

18 Different computing devices in Arnold’s home use different processor architectures.
One processor architecture is the Harvard architecture.
(i) Describe the Harvard architecture.
[2]
(ii) Arnold has a smart washing machine.
Explain why the Harvard architecture is suitable for a device like this.
[2]

19(a) The processor contains registers including the accumulator and the program counter. The contents of these
registers are modified during the Fetch-Decode-Execute cycle.
(i) Describe how the accumulator is used during the Fetch-Decode-Execute cycle.
[2]
(ii) Describe how the program counter is used during the Fetch-Decode-Execute cycle.
[2]
(iii) State the name of three other registers that are used during the Fetch-Decode-Execute cycle.
[3]
(b) * A charity has several desktop computers in their office that use a CISC processor. They are considering buying
mobile devices for their staff to use when they are not in the office.

Discuss whether these mobile devices should use the same CISC processors that are used in their desktop
computers or if they should use a RISC processor instead.
You should include the following in your answer:
• the difference between each processor type

• the suitability of each processor type for mobile devices.

[12]

END OF QUESTION PAPER

Question Answer/Indicative content Marks Guidance
1 Mark Band 3–High Level (7–9 marks) 9 AO1: Knowledge and Understanding
The candidate demonstrates a thorough
knowledge and understanding of Magnetic The following is indicative of possible
and Flash storage. The material is factors / evidence that candidates may
generally accurate and detailed. refer to but is not prescriptive or
exhaustive:
The candidate is able to apply their – Magnetic hard drives work by magnetic
knowledge and understanding directly and patterns being read off platters that
consistently to the context provided. mechanically spin at high speeds.
Evidence / examples will be explicitly – Flash hard drives use memory chips.
relevant to the explanation. These can have their contents erased and
subsequently overwritten when an
The candidate provides a thorough electrical charge is applied.
discussion which is well balanced. – Magnetic hard drives are cheaper per GB
Evaluative comments are consistently and tend to be sold in much higher
relevant and well-considered. capacities than flash hard drives.
– Flash hard drives tend to have much
There is a well-developed line of reasoning higher read / write speeds than magnetic
which is clear and logically structured. The hard disks.
information presented is relevant and – Flash hard disks have no moving parts
substantiated. and therefore tend to have lower power
consumption and are not affected by their
Mark Band 2–Mid Level (4–6 marks) device moving.
The candidate demonstrates reasonable
knowledge and understanding of a
Magnetic and Flash based storage; the AO2.1: Application
material is generally accurate but at times
underdeveloped. The selected knowledge / examples should
be directly related to the specific question.
The candidate is able to apply their The following is indicative of possible
knowledge and understanding directly to factors / evidence that candidates may
the context provided although one or two refer to but is not prescriptive or
opportunities are missed. Evidence / exhaustive:
examples are for the most part implicitly
relevant to the explanation. – Many games tend to incorporate a lot of
media and as such a keen gamer is likely
The candidate provides a sound to need a lot of storage space.
discussion, the majority of which is – Games are fast paced and often
focused. Evaluative comments are for the competitive. High loading speeds can be
most part appropriate, although one or two beneficial.
opportunities for development are missed. – High performance is often important to
gamers and as such will pick highest
There is a line of reasoning presented with performing components.
some structure. The information presented – Hybrid approaches exist which offer ‘the
is in the most part relevant and supported best of both worlds’.
by some evidence. – Magnetic hard drives can be noisy (due
to parts moving at high speed), this can be
Mark Band 1–Low Level (1–3 marks) undesirable and distracting whilst gaming.
The candidate demonstrates a basic Conversely flash drives operate silently.

knowledge of Magnetic and Flash based

storage with limited understanding shown;
the material is basic and contains some AO3.3: Evaluation
inaccuracies. The candidate makes a
limited attempt to apply acquired Candidates will need to consider a variety
knowledge and understanding to the of issues in relation to the question and will
context provided. make some evaluative comments about
the issues and solutions they are
The candidate provides a limited discussing. The following is indicative of
discussion which is narrow in focus. possible factors / evidence that candidates
Judgements if made are weak and may refer to but is not prescriptive or
unsubstantiated. exhaustive:
The information is basic and

communicated in an unstructured way. The – Due to their high storage capacity
information is supported by limited magnetic hard disks are the best choice. A
evidence and the relationship to the gamer could have many games installed at
evidence may not be clear. one time. Whilst performance is not quite
that of flash drives, to have a similarly
0 marks sized flash drive would be prohibitively
No attempt to answer the question or expensive. A high quality magnetic drive
response is not worthy of credit. will provide good enough performance
leaving money to be spent elsewhere. As it
is being installed on a desktop there is no
need to worry about power consumption or
issues with the computer moving.
– Gamers need high performance and that
includes large amounts of data being
loaded quickly. The read / write speed of a
solid state drive means this is the natural
choice for the gamer's desktop.
Total 9

2 a – The address of is stored in the 5 Accept MBR instead of MDR

MAR
– This value is sent along the address
bus AND the fetch signal is sent on the
control bus.
– The contents of are sent from
memory to the processer on the data bus
and stored in the MDR
– The contents of the MDR and ACC are
sent to the ALU
– The result is stored back in the ACC
(1 per –)
b – An instruction can be fetched as the 3

previous one is being decoded …
– … and the one before that is being
executed.
– E.g. can be fetched, while
is being decoded and
is being executed.
(1 per –)
c – BRP could be followed by one of two 2

possible instructions, which one will only
be determined at execution
– Meaning the wrong one may be fetched
/ decoded
(1 per –)
Total 10

3 i –Is needed to store the address of the next 2

instruction (to be processed) Examiner's Comments
–Value is then sent to the MAR
–After sending the value the PC is Few candidates gained full marks for this
incremented / changed to address held in question. Some candidates demonstrating
CIR if the operation is a Jump confusion between which registers hold the
actual instruction/data and which hold the
memory location address of the
instruction/data.
ii – Contains the address of the instruction 2

(to be accessed in memory)… Examiner's Comments
– …address of instruction sent from PC
– Contains the address of the data (to be Again, some candidates demonstrated
accessed in memory)… confusion between registers. A common
– …address of data sent from CIR error was ‘address of next instruction’.
iii – Contains the instruction which has been 2

accessed from memory Examiner's Comments
– Contains the data which has been
accessed from memory Although most candidates did state that
– That is referenced by the MAR / this register holds data/instructions there
Instruction sent to CIR was a lack of clarity about where the
– acts as a buffer data/instruction was coming from/going to,
hence not clearly explaining the need for
the register.
Total 6

4 i Movement of images on the screen 2 Two mark points are: Movement and
Used to illustrate weather systems weather systems
which would otherwise not be possible
Examiner's Comments
Some good answers but many simply

rewrote the words in the question on the
linesof ‘An animation is when images are
animated.’ Responses needed to refer to
the scenario to earn full marks. Nothing
complicated was expected, for example
‘moving images to show how a weather
system develops’ would earn two marks.
ii The next image / stage presented is 2 Two mark points are: Output determined
determined by the input determined by by student input and an example (eg
the user question asked and answered or hyperlink
Questions may be asked about one / hot button chosen)
stage and the software will move to a
next stage determined by the response Examiner's Comments
to the question given
It was important to indicate that the output
from the software would be influenced by
the input from the student even if it was
only indicating whether answers to
questions were correct or not.
Total 4

5 Control bus… 6 These are the expected responses as they

…transmits control signals from the are the buses listed in the specification,
control unit (to other parts of the however, other responses are acceptable,
processor) for example named buses like ‘EIDE, a
Data bus… local bus’ and ‘Video bus to maintain
…carries the data (from one place to screen display’. Serial and parallel buses
another) are not acceptable because they are not
Address bus… named. Not a memory bus.
…carries the location address Control bus does not send program
(register) where the data is going (to or instructions. Examples would include
from) interrupt signals / read / write operation
carried out
Examiner's Comments
Understanding of the purpose of the three

bus types named in the specification
continues to improve although there is still
the desire among candidates to imbuethem
with rather more power than they have got.
Typical is the desire to say that the bus
‘stores’ something rather than acting as a
conduit. On a base level candidates can
picture data being sent around the
processor in the data bus and the details of
where it is being sent to are carried in the
address bus. The control bus simply
passes the control signals to the registers
from the control unit.
Total 6

6 Mark Band 3–High Level (9–12 marks) 2 Answers may include, but are not limited
to, some of the points below.
The candidate demonstrates a thorough 2 AO1: Knowledge and Understanding

knowledge and understanding of methods
of utilising large amounts of computing
power. The material is generally accurate
and detailed.
3 Processors have increasingly large clock

speeds and can be overclocked.
The candidate is able to apply their 5 Processors can have multiple cores.
knowledge and understanding directly and Super computers can have multiple
consistently to the context provided. processors (and GPUs).
Evidence/examples will be explicitly GPUs can be applied to problems other
relevant to the explanation. than graphics processing.
Problems can be distributed across a
The candidate is able to weigh up both number of computers working together.
sides of the argument which results in a
supported and realistic judgment as to AO2.1: Application
which approaches to provide increasingly Having multiple cores can speed up
larger amounts of computing power are smaller problems but this will not be
best. enough for larger problems.
There is a well–developed line of reasoning Supercomputers are prohibitively
which is clear and logically structured. The exceptionally expensive to buy and run for
information presented is relevant and all but large organisations.
substantiated. GPUs are becoming a cost efficient way of
tackling problems. GPUs tend to have
Mark Band 2–Mid Level (5–8 marks) large number of cores so can run on highly
The candidate demonstrates reasonable paralleliseable problems... …but only
knowledge and understanding of methods where the same instruction is being applied
of utilising large amounts of computing to multiple pieces of data (SIMD)
power; the material is generally accurate
but at times underdeveloped.
AO3.3: Evaluation
The candidate is able to apply their Increased clock speed is limited to smaller
knowledge and understanding directly to problems. Even doubling the clock speed
the context provided although one or two would only halve the time taken.
opportunities are missed. Parallel processing isn’t suited to all
Evidence/examples are for the most part problems. Most problems are only partially
implicitly relevant to the explanation. parallelisable. Writing algorithms for
parallel processing is more challenging
The candidate makes a reasonable than
attempt to come to a conclusion showing GPUs suited to a subset of science/
some recognition of which approaches to engineering problems where the same
provide increasingly larger amounts of calculation is repeated on multiple data
computing power are best. sets.

There is a line of reasoning presented with

some structure. The information presented
is in the most part relevant and supported
by some evidence.
Mark Band 1–Low Level (1–4 marks)

The candidate demonstrates a basic
knowledge of methods of utilising large
amounts of computing power; the material
is basic and contains some inaccuracies.
The candidate makes a limited attempt to
apply acquired knowledge and
understanding to the context provided.
The candidate provides nothing more than

an unsupported assertion.
The information is basic and

communicated in an unstructured way. The
information is supported by limited
evidence and the relationship to the
evidence may not be clear.
0 marks
No attempt to answer the question or
response is not worthy of credit.
Total 12

7 Mark Band 3–High Level 9 AO1.1 AO1: Knowledge and Understanding

(7-9 marks) (2) AO1.2
The candidate demonstrates a thorough (2) AO2.1 The following is indicative of possible
knowledge and understanding of a wide (2) AO3.3 factors/evidence that candidates may refer
range of ways a computer’s performance (3) to but is not prescriptive or exhaustive:
can be improved and justifies how these
measures improve performance; the Methods of improving performance
material is generally accurate and detailed.
The candidate is able to apply their – Replace CPU with faster CPU
knowledge and understanding directly and – Add more/Faster RAM
consistently to the context provided. – Add a graphics card
Evidence/examples will be explicitly – Upgrade to faster secondary storage
relevant to the explanation. The candidate – Update OS
provides a thorough discussion which is – Install a lighter weight OS
well-balanced. Evaluative comments are – Defragment the hard disk
consistently relevant and well-considered. – Check for viruses and spyware.
There is a well-developed line of reasoning
which is clear and logically structured. The AO2.1: Application
information presented is relevant and
substantiated. The selected knowledge/examples should
be directly related to the specific question.
Mark Band 2 –Mid Level The example below is not prescriptive or
(4-6 marks) exhaustive:
The candidate demonstrates reasonable
knowledge and understanding of a range – A newer CPU may have a faster clock
of methods of improving a computer’s speed and so execute more instructions
performance and justifies how many of per second. It may have multiple cores
these improve performance; the material is and so be able to execute several
generally accurate but at times programs simultaneously (or one in
underdeveloped. The candidate is able to parallel). It may have more cache
apply their knowledge and understanding meaning comparatively slower RAM can
directly to the context provided although be accessed less frequently.
one or two opportunities are missed. – More RAM means more programs can be
Evidence/examples are for the most part open simultaneously without the need to
implicitly relevant to the explanation. The use much slower virtual memory.
candidate provides a reasonable – Adding a graphics card will speed up the
discussion, the majority of which is rendering of 3D graphics as GPU has
focused. Evaluative comments are for the specialist instructions and can apply the
most part appropriate, although one or two same instruction to multiple pieces of
opportunities for development are missed. data simultaneously.
There is a line of reasoning presented with – The slower the secondary storage the
some structure. The information presented longer it takes to load files/program/data.
is in the most part relevant and supported A faster secondary storage device can
by some evidence. improve this. May choose to use flash
memory (i.e. SSD)
Mark Band 1-Low Level – OS makers often release updates and
(1-3 marks) some of these will improve performance.
The candidate demonstrates a basic – Some lighter weight operating systems
knowledge of how a computer’s use fewer system resources allowing the

performance can be improved. Limited system to devote more to running the

understanding is shown of how these user’s applications.
measures improve performance; the – A fragmented HDD runs slowly as time is
material is basic and contains some spent finding parts of the files. This is
inaccuracies. The candidate makes a reduced by defragmenting and storing
limited attempt to apply acquired the parts of the file contiguously.
knowledge and understanding to the – Malware can slow down a computer.
context provided. The candidate provides a Removing it will improve performance.
limited discussion which is narrow in focus.
Judgments if made are weak and AO3.3: Evaluation
unsubstantiated.
The information is basic and The following is indicative of possible
communicated in an unstructured way. The evaluation points that candidates may refer
information is supported by limited to but is not prescriptive or exhaustive:
evidence may not be clear. Hardware improvements (i.e. CPU, RAM,
secondary storage and GPU) have costs
0 marks attached but likely to have most impact.
response is not worthy of credit. The higher performance the hardware, the
more cost incurred.
(NB candidates aren't expected to know

relative costs of components.)
GPU unlikely to benefit student in this

scenario (unless their course requires
graphics processing).
Defragmenting HDD is free and so should

be performed.
Running anti-malware programs is free/low

cost and should be done as a precaution
against losing data anyway.
Moving to lighter weight software can

potentially be free if the user considers
open source software.
Examiner’s Comments
Candidates were assessed on the quality
of their extended response in this question.
Most candidates could cite some methods
for improving performance but not all
managed to then appropriately apply these
to the question. Many candidates did
recommend one or more measures
although some cases needed to include
justification. This resulted in some very

good responses and marks awarded

spanning the range of marks available.
Total 9

8 i LDA (1) 1
SUB (1)
ADD (1) (AO1.2)
INP (1)
(Max 1)
Most candidates identified correctly, an
instruction which changed the value in the
Accumulator but fewer correctly identified
an instruction which changed the value in
the Program Counter.
ii BRA (1) 1
BRP (1)
BRZ (1) (AO1.2)
(Max 1)
Most candidates identified correctly, an
instruction which changed the value in the
Accumulator but fewer correctly identified
an instruction which changed the value in
the Program Counter.
iii 20 1
(AO2.1)
Candidates invariably gave both correct
output values.
iv 40 1
(AO2.1)
Candidates invariably gave both correct
output values.
v Rounds up (the number input)… (1) 2 Rounds to multiple of ten gets one mark.
…To the nearest multiple of ten (AO2.2)

(and outputs it) (1)
Total 6

9 - The CPUs can work in parallel 2

- … on the same problem AO3.3
- try multiple keys simultaneously… (2)
- …to break the code
(1 per -, max 2) Examiner’s Comments
Only a few candidates scored well on both

parts of this question. In the first part of the
question, candidates rarely stated or
described parallel processing. Those who
did, then did not contextualise their
response.
Total 2

10 a i - (Single) Control Unit 2 (AO1.1) Accept acronyms ALU,CU

- (Single) Arithmetic Logic Unit
- (Special) registers within CPU Examiner’s Comments
- Instructions and Data stored in same
area of memory The majority of candidates answered this
- Instructions and Data stored in same question well although some candidates
format stated that ‘instructions and data are stored
- A single set of buses / same bus for in the same memory location’ more
instructions & data (to connect CPU to attention to detail is required at this level of
Memory and I/O) study.
(1 Mark per -, Max 2)
ii Two separate areas of memory… 2 (AO1.2) Accept any reasonable description.

…one for instructions & one for
data./instructions and data can be Do not accept “64-bit”
accessed concurrently.
e.g.
Different (sets of) buses… Performance boosting mode…
… one for instructions & one for data./ …Clock speed can be temporarily
instructions and data can be accessed increased for performance boost.
concurrently.
Out of Order Execution…
Pipelining… …Instructions can be executed before
…whilst an instruction is being executed earlier ones if they are ready.
the next can be decoded and the
subsequent one fetched. Super Scalar…
…Multiple instructions can be executed
Use of Cache… simultaneously.
…A small amount of high performance
memory is (next to the CPU) / which stores Examiner’s Comments
frequently used data/instructions
A whole range of features were accepted
Virtual cores/Hyper-threadingTM … for this question. Most candidates stated
…Treating a physical core as two virtual an appropriate feature but some then did
cores. not go on to describe how the feature
improved performance.
Multiple Cores…
…Each core acts as a separate processing
unit.
Onboard Graphics…
…Built in circuitry for graphics processing.
(1 Mark for identifying feature, 1 mark for

description)

b i Input Green Light Red Light 2 (AO3.3) Accept T for a tick. Penalise if blank table
elements have content.
1 ✓
2 ✓ Examiner’s Comments
3 ✓
Most candidates achieved the first mark on
4 ✓
this question. The second mark was lost by
5 ✓ those who ticked ‘red light’ for an input of
6 ✓ 5.
7 ✓
8 ✓
9 ✓
Rows 1-4 correct 1 Mark

Rows 5-9 correct 1 Mark
ii - The value 11 is stored in the MAR. 6 (AO1.2)

- 11 is sent down the address bus.
- A read signal is sent down the control
bus.
- 0 is sent (back from memory) down
the data bus. Examiner’s Comments
- 0 is stored in the MDR…
- …and then copied to the ACC Many candidates gave a comprehensive
(1 Mark per -, max 6) description of the fetch execute cycle but
did not apply their response to the
assembly code instruction given in the
question therefore losing marks.

iii - Takes in a value from user. 3 (AO Do not credit structured English
- If value is 5 or less it shows green 3.2) Example
- Otherwise it shows Red
value = input("Enter a Value")
(1 Mark per -, max 3) if value <=5 then
print("GREEN")
else
print(“RED”)
endif
Accept equivalents to <=5 (e.g. < 6) For

Green/Red (or 1/0) accept any
pseudocode equivalent (GreenLightOn(),
Output 1, print(1) Output Green etc.) as
long as the logic is correct.
Most candidates gained credit for writing

code to read the value from the user with
some then losing marks for either
specifying the incorrect condition e.g. IF
value < 5 and/or not outputting the result.
iv Mark Band 3-High Level (7-9 marks)1 9 AO1.1 AO1

The candidate demonstrates a thorough (2) AO1.2 Assembly code uses mnemonics to
knowledge and understanding of assembly (2) AO2.1 represent machine code
code and high level languages. The (2) AO3.3 instructions/opcodes.
material is generally accurate and detailed. (3) High level languages use more
natural/mathematical notation.
The candidate is able to apply their Assembly code consists of simple
knowledge and understanding directly and instructions
consistently to the context provided. As such many more lines of assembly
Evidence/examples will be explicitly code are required to perform the same task
relevant to the explanation. as a few lines of a high level language.
Assembly code is specific to the instruction
The candidate provides a thorough set of a given processor. High Level
discussion which is well balanced. languages are not architecture specific.
Evaluative comments are consistently
relevant and well-considered. AO2
Assembly code allows the programmer to
There is a well-developed line of reasoning choose the exact instructions so they can
which is clear and logically structured. The write code that is highly efficient.
substantiated. It also allows them to have direct control of
Mark Band 2-Mid Level (4-6 marks) how memory is used via addressing
The candidate demonstrates reasonable modes.
knowledge and understanding assembly Direct control of hardware.
code and high level languages; the High level language compilers have
material is generally accurate but at times optimisers that can also try and do this

underdeveloped. (and in some cases may outperform a

human writing in assembly code).
The candidate is able to apply their
knowledge and understanding directly to As high level code is more intuitive and
the context provided although one or two easier to read it is easier to follow, debug
opportunities are missed. and build as part of a team. It can also be
Evidence/examples are for the most part written in a much shorter time frame.
implicitly relevant to the explanation. The high level code can be recompiled for
different architectures.
The candidate provides a sound High level languages come in a variety of
discussion, the majority of which is paradigms so programmers can choose
focused. Evaluative comments are for the according to the problem/their preference.
most part appropriate, although one or two
opportunities for development are missed. AO3
Assembly language is best suited to
There is a line of reasoning presented with situations such as:
some structure. The information presented -compilers or interpreters don’t exist for the
is in the most part relevant and supported target CPU i.e. embedded systems
by some evidence. -highest possible performance is critical
-memory is very limited.
Mark Band 1-Low Level (1-3 marks) For larger projects which don’t fall under
The candidate demonstrates a basic the constraints above high level languages
knowledge assembly code and high level are likely to be preferable.
languages; the material is basic and
contains some inaccuracies. The candidate Examiner’s Comments
makes a limited attempt to apply acquired
knowledge and understanding to the Candidates were assessed on the quality
context provided. of their extended response in this question.
Most candidates could describe the basic
The candidate provides a limited differences between assembly code and
discussion which is narrow in focus. high level languages, with many giving
Judgments if made are weak and examples of where each would be best
unsubstantiated. The information is basic used. Some candidates gave clear and
and communicated in an appropriate justification for the coffee
unstructured way. The information is machine being programmed in assembly
supported by limited evidence and the code. In general, most candidates scored
relationship to the evidence may not be reasonably well on this question.
clear.
0 marks
Total 24

11 i - Tags to make “Features” a heading 5 (AO3.2) For making Features a heading only
(accept h1, h2, h3 etc.) accept strong/b if accompanied by code
- Correct use of ol to increase font size.
- Correct use of li tags
- Use of <a tag Around the text <h1>Features</h1>
“Download the Factsheet” The new OCR Smart Watch:
- correct use of href=”factsheet.pdf” <ol>
(1 Mark per -, max 5) <li>Uses the CB2 RISC processor
for long battery life</li>
<li>Stores up to 20hrs of
music</li>
<li>Tracks fitness</li>
</ol>
<a
href="factsheet.pdf">Download
The Factsheet</a>
Li close tags are optional
Surprisingly fewer candidates than

anticipated gained full marks on this
question. Many candidates gained some
marks. Marks were invariably lost on the
HTML for the hyperlink.
ii - A program called a spider/crawler/bot 3 (AO2.1)

- Traverses the web / following the links.
- It takes each word in the document Examiner’s Comments
- …It adds an entry for the page (under
the word) in the index… This question was poorly attempted. Many
- …alongside the word’s position on the candidates mentioned a crawler/spider
page. program but then failed to clearly describe
(1 Mark per -, Max 3) the process. Some candidates went on to
discuss ranking even though the question
specifically stated not to.
iii - RISC has a smaller instruction set 3 (AO1.2)

(than CISC)
- Requires fewer transistors / less Examiner’s Comments
complex circuitry
- Means less power is required. Most candidates achieved two marks on
(1 Mark per -, Max 3) this question with few referring to the fact
that RISC requires less complex circuitry.
Total 11

12 i 1 mark per bullet up to a maximum of 4 4 The bullets must be in the correct order,
marks, e.g.: AO1.1 except BP2, which can come anywhere
(2) from BP2 onwards
Data/address is copied from PC to AO2.1
MAR (2)
PC is incremented (by 1) (this can be
in any location from here down)
Data in MAR is passed onto the
Address Bus
Read signal is sent onto the control
bus
RAM copies the data from the location
specified by the address bus onto the
data bus
Data on the data bus is passed into the
MDR
Data is copied from the MDR to the
CIR
ii C 1
AO1.2
(1)
Total 5
13 Inputs two numbers 6 Example answer

..stores at least one of them start INP
Comparison / subtraction to decide AO3.2 STA x
which is larger INP
Jump / output if num1 larger STA y
Jump / output if num2 larger or nums SUB x
equal BRP first
Loops back to start after either output LDA x
OUT
BRA start
first LDA y
OUT
BRA start
x DAT
y DAT
Total 6

14 i Paging 4
…blocks of memory of equal size / AO1.2

fixed size
Segmentation
…blocks of memory split logically

/variable size
ii e.g. 2
Security AO1.2
…does not let programs access

memory reserved for other programs.
Multitasking
...allows multiple programs to run at

once
iii (Currently unneeded) pages moved 2

from memory to secondary storage
AO1.1
…to create room in memory
pages moved back to memory when

required
Total 8

15 1 mark per bullet up to a maximum of 2 2 Accept

marks, e.g: AO1.1 More than one clock cycle for each
(1) instruction in CISC …
Some instructions in CISC will rarely AO1.2 …one clock cycle for each instruction in
get used … (1) RISC
… In RISC instructions are used For BP’s 3 and 4
regularly
In assembly for CISC, a statement that
takes one mnemonic …
… (may) take multiple mnemonics in
RISC
Compilers for RISC need to be more
complex …
… than compilers for CISC
CISC architecture has complex
circuitry and is therefore more
expensive to manufacture…
…RISC architecture has simple
circuitry minimising manufacture cost.
Total 2

16 a 1 mark for each interval 4 AO1.2

(4)
Interval 1
A is fetched
Interval 2
A is decoded
B is fetched
Interval 3
A is executed
B is decoded
C is fetched
Interval 4
B is executed
C is decoded
D is fetched
b 1 mark per bullet up to a maximum of 2 2 AO1.2

marks: (2)
Reduces/removes latency
… CPU is not idle while waiting for next
instruction
Next instruction is fetched while current
one is decoded/executed
All parts of the processor can be used
at any instance in time.
Total 6

17 a Concurrent processing of multiple 3 AO1.1

instructions
One instruction can be fetched while
previous isbeing decoded…
And the one before is being executed.
In case of a branch pipeline is flushed.
Increases speed of execution
b Mark Band 3–High Level (7-9 marks) AO1.1 Data stored by altering the magnetic field
The candidate demonstrates a thorough (2), of a small section of the tape or disk; one
knowledge and understanding of magnetic AO1.2 orientation represents a binary value of 1,
and solid state storage. The material is (2), the opposite orientation represents a
generally accurate and detailed. AO2.1 binary value of 0. Written to using a read
(2), head.
The candidate is able to apply their AO3.3. Read head can then read the magnetic
knowledge and understanding directly and (3) field and retrieve the data.
consistently to the context provided. These read and write heads move across
Evidence/examples will be explicitly the disk or the tape moves under the
relevant to the explanation. heads.
Solid state devices store data using
The candidate provides a thorough semiconductors; drives can be based on
discussion which is well balanced. NAND Flash or DRAM. No moving parts
Evaluative comments are consistently are required.
relevant and well-considered. Backup involves copying potentially large
amounts of data to and from storage
There is a well-developed line of reasoning devices at regular intervals.
which is clear and logically structured. The Servers distribute data to client devices.
substantiated. AO2
Magnetic hard drives entirely suitable for
Mark Band 2-Mid Level (4-6 marks) storing operating system, software and
The candidate demonstrates reasonable data. Large capacity, cheap (by
knowledge and understanding of magnetic comparison) purchasing price and
and solid state storage; the material is reliability make them idea for heavy use in
generally accurate but at times an insurance office.
underdeveloped. Solid state drives have no moving parts
and offer an increase in speed and quicker
The candidate is able to apply their access to customer records. However,
knowledge and understanding directly to smaller capacity (in comparison) may be
the context provided although one or two an issue for larger data sets.
opportunities are missed. Backup systems may be required to
Evidence/examples are for the most part maximise storage whereas access speed
implicitly relevant to the explanation. is not so much of an issue
Limited lifespan of SSDs due to limited
The candidate provides a sound read/writes may restrict use in data heavy
discussion, the majority of which is applications.
focused. Evaluative comments are for the Servers will require quick access to data to
most part appropriate, although one or two serve multiple client machines but will also
opportunities for development are missed. be extremely read/write heavy.

There is a line of reasoning presented with AO3

some structure. The information presented Both suitable for the insurance office but
is in the most part relevant and supported for different purposes.
by some evidence. SSDs to store operating system and
program files will ensure quicker boot up
Mark Band 1-Low Level (1-3 marks) and loading of programs. May be useful for
The candidate demonstrates a basic both client and servers to store operating
knowledge of magnetic and solid state systems
storage; the material is basic and contains Magnetic hard drives to store large
some inaccuracies. The candidate makes quantities of data provides reliability and
a limited attempt to apply acquired large capacity at small (by comparison)
knowledge and understanding to the cost. May be most suitable for storing large
context provided. amounts of data on client devices and for
backup systems.
The candidate provides a limited Magnetic tape device may be suitable for
discussion which is narrow in focus. backing up customer data as too slow for
Judgments if made are weak and use on day-to-day basis.
unsubstantiated. The information is basic Use of solid state devices for storing
and communicated in an unstructured way. customer data that is frequently accessed
The information is supported by limited means needing to plan for replacement of
evidence and the relationship to the drives when read/write limit reached.
evidence may not be clear. Solid state devices better if used in mobile
devices (e.g. for mobile insurance workers)
0 marks as relatively small chance of damage if
No attempt to answer the question or dropped as no moving parts.
Total 12
18 i 1 mark per bullet up to a maximum of 2 2 (AO1.1) Accept unit instead of blocks (BP1)
marks, e.g: (1)
(AO1.2) Examiner’s Comments
Uses separate memory blocks for (1) Some candidates were vague in their
instructions and data response and were not clear that Harvard
Has separate buses (data and has separate memory blocks. Candidates
address) for data and instructions must be specific in their response.
Has fixed memory sizes for data and
Instructions
Instruction memory may be ROM
ii 1 mark per bullet up to a maximum of 2 2 (AO2.1) Examiner’s Comments

marks, e.g: (2) This question was not answered well.
Any 2 Many candidates repeated their response
Fixed instruction size (Max 2) to the previous question and did not
No need for memory to be shared answer the question correctly. Candidates
between data and instructions need to read questions carefully.
Removes need for secondary storage
Instructions would never be changed
Total 4

19 a i Holds all input/output 2

Holds results of calculations (from the Examiner’s Comments
ALU) Most candidates were able to access 1
Checked for conditional branching (e.g. mark for the result of ALU calculations, but
BRZ) few were able to give two uses. Some
Stores data which has come from the confused the accumulator with the program
MDR/RAM counter and the ALU.
ii Holds the address/location of the next 2

instruction (to be executed/fetched) Examiner’s Comments
Contents copied to the MAR at start of This question was generally well answered
FDE by candidates who gave clear responses.
Incremented (by one) on every cycle
Can be changed by branch/jump Misconception
instructions Some candidates thought that
the program counter kept track
of a count of the number of
instructions that had been
fetched.
iii Memory Address Register // MAR 3 Allow Memory Buffer Register for MDR
Memory Data Register // MDR
Current Instruction Register // CIR Examiner’s Comments
Index Register // IR Most candidates gained full marks on this
question and were able to correctly identify
three other registers. Some lost marks for
saying the ALU or control unit were
registers.
b Mark Band 3–High Level (9-12 marks) 12 AO1

The candidate demonstrates a thorough (AO1.1) CISC is a complex instruction set. The
knowledge and understanding of both (2), traditional approach to processor design.
CISC and RISC. The material is generally (AO1.2) Lots of instructions available although
accurate and detailed. (2), some instructions in CISC will rarely get
(AO2.1) used.
The candidate is able to apply their (3), RISC is a reduced instruction set. A
knowledge and understanding directly and (AO3.3). smaller number of instructions available,
consistently to the context provided. (5) several instructions can be combined to
Evidence/examples will be explicitly perform the same tasks as CISC
relevant to the explanation. processors. RISC instructions are used
regularly.
The candidate provides a thorough RISC has fewer transistors/less complex
discussion which is well balanced. circuitry whereas CISC integrated circuits
Evaluative comments are consistently are more expensive/complicated. RISC
relevant and well-considered. instructions take one cycle whereas CISC
may take several. RISC can only do
There is a well-developed line of reasoning complex things by combining multiple
which is clear and logically structured. The instructions whereas CISC is done in one
information presented is relevant and line. Compilers for RISC need to be more
substantiated. complex than compilers for CISC

Mark Band 2-Mid Level (5-8 marks) AO2

The candidate demonstrates reasonable CISC processors would run the same
knowledge and understanding of CISC software as the desktop machines. Would
and/or RISC; the material is generally be less power efficient and require larger
accurate but at times underdeveloped. battery and cooling mechanisms. More
expensive to purchase.
The candidate is able to apply their RISC processor requires software to be
knowledge and understanding directly to written specifically for it (cannot use CISC
the context provided although one or two instructions). More power efficient and so
opportunities are missed. requires less/no cooling and smaller
Evidence/examples are for the most part battery/longer battery life. RISC devices
implicitly relevant to the explanation. may require greater RAM as programs
tend to be larger than their CISC
The candidate provides a sound equivalents.
discussion, the majority of which is
focused. Evaluative comments are for the AO3
most part appropriate, although one or two Mobile use of CISC would save money on
opportunities for development are missed. software and increase compatibility but
cost more to purchase and be physically
There is a line of reasoning presented with larger (heat sink/larger battery) and/or
some structure. The information presented have a shorter battery life.
is in the most part relevant and supported RISC would require investment in software
by some evidence. but be cheaper to purchase and give a
better performance out of the office
Mark Band 1-Low Level (1-4 marks) (lighter/longer battery life). Some
The candidate demonstrates a basic compatibility issues may be reduced with
knowledge of CISC or RISC; the material is emulators and translators.
basic and contains some inaccuracies. The
candidate makes a limited attempt to apply Examiner’s Comments
acquired knowledge and understanding to Many candidates were able to discuss the
the context provided. difference in reduced or complex
instruction sets and gave some discussion
The candidate provides a limited of the increase in hardware requirements
discussion which is narrow in focus. for CISC. Few talked about the software
Judgments if made are weak and differences, and some assumed the charity
unsubstantiated. The information is basic would need to be programming the devices
and communicated in an unstructured way. which was not relevant to the question.
The information is supported by limited
evidence may not be clear.
0 marks
Total 19
Powered by TCPDF (www.tcpdf.org)

OCR ExamBuilder Test Export

Uploaded by

Copyright:

Available Formats

OCR ExamBuilder Test Export

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

OCR ExamBuilder Test Export

Uploaded by

Copyright:

Available Formats

Computer Science (A Level)

OCR supplied materials:

Other materials required:

Centre number Candidate number

INFORMATION FOR CANDIDATES

© OCR 2023. You may photocopy this page. 1 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 3 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 4 of 56 Created in ExamBuilder

Explain the need for the following registers.

(i) Program Counter (PC)

(ii) Memory Address Register (MAR)

(iii) Memory Data Register (MDR)

© OCR 2023. You may photocopy this page. 5 of 56 Created in ExamBuilder

(ii) Interactive presentation

© OCR 2023. You may photocopy this page. 6 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 7 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 8 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 9 of 56 Created in ExamBuilder

main INP entry

test SUB ten

pass LDA entry

© OCR 2023. You may photocopy this page. 10 of 56 Created in ExamBuilder

(v) Describe the purpose of the program.

Describe why a supercomputer will be useful to GCHQ.

© OCR 2023. You may photocopy this page. 11 of 56 Created in ExamBuilder

(i) State two features of the Von Neumann architecture.

© OCR 2023. You may photocopy this page. 12 of 56 Created in ExamBuilder

Input Green Light Red Light

© OCR 2023. You may photocopy this page. 13 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 14 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 15 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 16 of 56 Created in ExamBuilder

12 A CPU will repeatedly run the Fetch-Decode-Execute-cycle shown in Fig. 1.

© OCR 2023. You may photocopy this page. 17 of 56 Created in ExamBuilder

Tick one box to indicate where in Fig. 1 an interrupt would be handled.

© OCR 2023. You may photocopy this page. 18 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 19 of 56 Created in ExamBuilder

14 Imogen buys a desktop computer. It comes with an operating system installed.

© OCR 2023. You may photocopy this page. 20 of 56 Created in ExamBuilder

(ii) Explain one benefit of memory management to the user.

© OCR 2023. You may photocopy this page. 21 of 56 Created in ExamBuilder

Describe one difference between CISC and RISC.

© OCR 2023. You may photocopy this page. 22 of 56 Created in ExamBuilder

The processor’s pipeline consists of the following stages:

• Fetching the instruction from memory

Instructions A, B, C and D need to be processed.

© OCR 2023. You may photocopy this page. 23 of 56 Created in ExamBuilder

17(a) The CPU uses pipelining to improve efficiency.

Explain what is meant by the term ‘pipelining’.

© OCR 2023. You may photocopy this page. 24 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 25 of 56 Created in ExamBuilder

One processor architecture is the Harvard architecture.

(i) Describe the Harvard architecture.

(ii) Arnold has a smart washing machine.

© OCR 2023. You may photocopy this page. 26 of 56 Created in ExamBuilder

© OCR 2023. You may photocopy this page. 27 of 56 Created in ExamBuilder

You should include the following in your answer:

• the difference between each processor type