Lab 9 Encoders and Decoders

Sir Syed CASE Institute of Technology, Islamabad
EE2401 Digital Logic Design
Lab No. 9
Name of Student: Roll No. :
Date of Experiment: Report submitted on:
Marks obtained: Instructor’s Signature:
Instructor: Engr Safdar Munir

Use of Encoders and Decoders
1. Objectives
Having completed this experiment you would have learnt
1. The basic concept/purpose of Encoding and Decoding Circuits.

2. How to use Encoder and Decoder IC chips available in the market; in particular the
Encoder IC 74LS148 and the Decoder IC 74LS139.
2. Basic Information
Encoding Circuit (Encoder)
An encoder is a combinational logic circuit that has a limited number of output lines, i.e. “n” and
many more input lines (up to a maximum of 2n input lines). Depending upon which of the input
lines are activated, the output lines assume a specific state. Since the fewer lines at the output are
used to describe the state of inputs, this process is called encoding and the circuit, which
performs this operation, is called an Encoder. Fig 2.1 shows a circuit for a 4-to-3 lines (i.e. 4-
inputs and 3-outputs) encoder. The four bits D0, D1, D2 and D3 are applied at the inputs and x,
y, and v are the resultant outputs. The function of the circuit is very clearly defined by the input
output relationship shown in Table 2.1.
Fig 2.1
The circuit shown above is just to elaborate the basic theme of encoding, i.e. any combination of
the outputs, no matter how strange or odd, can be assigned to represent any particular input line.
However, usually the encoders are designed such that their outputs are either in plain binary or
BCD formats; although sometimes other output codes are also used, e.g. Grey code.
Inputs Outputs
D0 D1 D2 D3 X Y V
0 0 0 0 0 0 0
1 0 0 0 0 0 1
X 1 0 0 0 1 1
X X 1 0 1 0 1
X X X 1 1 1 1
Table 2.1
Digital Logic Design Lab (EE-2401) 2

Decoding circuit (Decoder)
A decoder is a combinational circuit that performs the reverse operation of that of an Encoder. In
other words, the decoder takes the binary information from its “n” input lines and depending
upon its inputs activates one of the many output lines (there can be a maximum of 2n unique
output lines for an “n” bit decoder). Fig 2.2 shows the logic diagram of a 2-to-4 lines decoder.
The functionality of this circuit is defined by the truth table shown in Table 2.2.
Fig 2.2
Note that A and B are the two input lines whose combination dictates which of the four outputs
are going to be activated, whereas E is the enable input of the chip, i.e. unless we enable this
chip (by applying a LOW at this E input), the outputs would not change even if we change the
inputs A and B. For such a case we say that the enable input E is active LOW. Also note that any
output becomes LOW when activated, while all non-activated outputs remain HIGH – i.e. the
outputs in this circuit are also active LOW.
Inputs Outputs
E A B D0 D1 D2 D3
1 X X 1 1 1 1
0 0 0 0 1 1 1
0 0 1 1 0 1 1
0 1 0 1 1 0 1
0 1 1 1 1 1 0
Table 2.2

3. Experimental Work
Material Required
a) Logic Trainer
b) Multimeter
c) Logic ICs:
74LS139 (Dual 2-to-4 Decoder)
74LS148 (8-to-3 Priority Encoder
d) Connecting wires
Procedure
1. Connect the logic Trainer to 220V AC power supply.
2. Install the IC 74LS139 (Dual 2-line-to-4 Decoder) on the trainer’s breadboard.
3. Connect the +VCC (pin # 16) and Ground (pin # 8) pins of the IC to +5V and Ground
supply of the trainer board.
4. Wire the circuit according to the schematic given in Fig 3.3. It should be kept in mind
that 74LS139 has Active HIGH inputs and Active LOW outputs.
5. Use the trainer’s LEDs to display the decoded outputs.
6. Indicate the status of each output LED in Table 3.1 for the input combinations shown in
the table.
7. Now install the IC chip 74LS148 (8-to-3 Priority Encoder) on the trainer’s breadboard.
8. Connect the +VCC (pin # 16) and Ground (pin # 8) pins of the IC to +5V and Ground
supply of the trainer board.
9. Wire the circuit. It should be kept in mind that 74LS148 has both inputs and outputs
Active LOW.
10. Use the trainer’s LEDs to display each encoded output for the set of inputs provided in
Table 3.2. Record the status of output LEDs in that table.
Fig 3.1 (74LS148) Encoder Fig 3

Decoder
Fig 3.3
Experimental Results
Inputs Output LEDs

G B A Y0 Y1 Y2 Y3
1 0 0
1 1 1
0 0 0
0 0 1
0 1 0
0 1 1
Table 3.1 (For Decoder)
Inputs Outputs
E1 0 1 2 3 4 5 6 7 A2 A1 A0
1 X X X x x x X X
0 1 1 1 1 1 1 1 1
0 X X X x x x X 0
0 X X X X X X 0 1
0 X X X X X 0 1 1
0 X X X X 0 1 1 1
0 X X X 0 1 1 1 1
0 X x 0 1 1 1 1 1
0 x 0 1 1 1 1 1 1
0 0 1 1 1 1 1 1 1
Table 3.2 (For Encoder)

4. In the Case of Trouble
 Check the power supply for correct voltage.
 Check the Vcc (pin # 16) and Ground (pin # 8) connections of the IC under test.
 Check all the wire connections and remove any possible breaks.
 Check the IC under test for its proper working according to its truth table. To do this use
Multimeter to measure voltage levels at the inputs and outputs of each gate in that chip.
5. Questions
1- Redraw Table 3.1 assuming that the inputs are also Active LOW for 74LS139.
2- Draw the circuit diagram to show how can we use 74LS139 (Dual 2-to-4 line decoder)
to construct a 3-to-8 line decoder

Lab 9 Evaluation Sheet
Name: Roll No:

Neat Wiring (2)
Task Completion (4)
Trouble Shooting (4)
Understanding(8)
Team Work (2)
Total: /20

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Sir Syed CASE Institute of Technology, Islamabad

EE2401 Digital Logic Design

Name of Student: Roll No. :

Date of Experiment: Report submitted on:

Marks obtained: Instructor’s Signature:

Instructor: Engr Safdar Munir

1. The basic concept/purpose of Encoding and Decoding Circuits.

Digital Logic Design Lab (EE-2401) 2

Digital Logic Design Lab (EE-2401) 3

Fig 3.1 (74LS148) Encoder Fig 3

Digital Logic Design Lab (EE-2401) 4

Inputs Output LEDs

Table 3.2 (For Encoder)

Digital Logic Design Lab (EE-2401) 5

Digital Logic Design Lab (EE-2401) 6

Name: Roll No:

Task Completion (4)

Trouble Shooting (4)

Team Work (2)

Digital Logic Design Lab (EE-2401) 7

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