TrilithIC BTS 771 G

Overview

Features
• Quad switch driver
• Free configurable as bridge or quad-switch
• Optimized for DC motor management applications
• Ultra low RDS ON @ 25 °C:
High-side switch: typ. 85 mΩ, P-DSO-28-9
Low-side switch: typ. 40 mΩ
• Very high peak current capability
• Very low quiescent current
• Space- and thermal optimized power P-DSO-Package
• Load and GND-short-circuit-protected
• Operates up to 40 V
• Status flag diagnosis
• Overtemperature shut down with hysteresis
• Short-circuit detection and diagnosis
• Open-load detection and diagnosis
• C-MOS compatible inputs
• Internal clamp diodes
• Isolated sources for external current sensing
• Over- and under-voltage detection with hysteresis

Type Ordering Code Package

BTS 771 G Q67007-A9274 P-DSO-28-9

Description
The BTS 771 G is a TrilithIC contains one double high-side switch and two low-side
switches in one P-DSO-28-9 -Package.
“Silicon instead of heatsink”
becomes true
The ultra low RDS ON of this device avoids powerdissipation. It saves costs in mechanical
construction and mounting and increases the efficiency.
The high-side switches are produced in the SIEMENS SMART SIPMOS® technology. It
is fully protected and contains the signal conditioning circuitry for diagnosis. (The
comparable standard high-side product is the BTS 621L1.)

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 BTS 771 G

For minimized RDS ON the two low-side switches are produced in the SIEMENS Millifet
logic level technology (The comparable standard product is the BUZ 103AL).
Each drain of these three chips is mounted on separated leadframes (see P-DSO-28-9
pin configuration). The sources of all four power transistors are connected to separate
pins.
So the BTS 771 G can be used in H-Bridge configuration as well as in any other switch
configuration.
Moreover, it is possible to add current sense resistors.
All these features open a broad range of automotive and industrial applications.

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 BTS 771 G

DL1 1 28 DL1

GL1 2 27 SL1

DL1 3 LS-Lead Frame 1 26 SL1

N.C. 4 25 DL1

DHVS 5 24 DHVS

GND 6 23 SH1

GH1 7 22 SH1
HS-Lead Frame
ST 8 21 SH2

GH2 9 20 SH2

DHVS 10 19 DHVS

N.C. 11 18 DL2

DL2 12 LS-Lead Frame 2 17 SL2

GL2 13 16 SL2

DL2 14 15 DL2

AEP02071

Figure 1 Pin Configuration (top view)

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 BTS 771 G

Pin Definitions and Functions

Pin No. Symbol Function
1, 3, 25, 28 DL1 Drain of low-side switch1
Leadframe 1 1)
2 GL1 Gate of low-side switch1
4 N.C. not connected
5, 10, 19, 24 DHVS Drain of high-side switches and power supply voltage
Leadframe 2 1)
6 GND Ground
7 GH1 Gate of high-side switch1
8 ST Status of high-side switches; open Drain output
9 GH2 Gate of high-side switch2
11 N.C. not connected
12, 14, 15, 18 DL2 Drain of low-side switch2
Leadframe 3 1)
13 GL2 Gate of low-side switch2
16, 17 SL2 Source of low-side switch2
20, 21 SH2 Source of high-side switch2
22, 23 SH1 Source of high-side switch1
26, 27 SL1 Source of low-side switch1

1)
To reduce the thermal resistance these pins are direct connected via metal bridges to the leadframe.

Bold type: Pin needs power wiring

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 BTS 771 G

DHVS
5, 10, 19, 24
8
ST
DST Diagnosis Biasing and Protection
C6V1

R I1 Driver
7
GH1 IN OUT
3.5 k Ω 1 2 1 2
DI1 R O1 R O2
C6V1 0 0 L L 20, 21
SH2
R I2 0 1 L H
9 10 k Ω 10 k Ω
GH2 1 0 H L
3.5 k Ω 1 1 H H 12, 14, 15, 18
DI2 DL2
C6V1 22, 23
6 SH1
GND
1, 3, 25, 28
DL1

2
GL1

13
GL2

26, 27 16, 17
SL1 SL2
AEB02072

Figure 2 Block Diagram

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 BTS 771 G

Circuit Description

Input Circuit
The control inputs GH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with
hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into
the necessary form for driving the power output stages.
The inputs GH1 and GH2 are connected to a standard N-channel logic level power-MOS
gate.

Output Stages
The output stages consist of an ultra low RDS ON Power-MOS H-Bridge. Protective circuits
make the outputs short circuit proof to ground and load short circuit proof. Positive and
negative voltage spikes, which occur when driving inductive loads, are limited by
integrated power clamp diodes.

Short Circuit Protection (valid only for the high-side switches)

The outputs are protected against
– output short circuit to ground, and
– overload (load short circuit).
An internal OP-Amp controls the Drain-Source-Voltage of the HS-Switches by
comparing the DS-Voltage-Drop with an internal reference voltage. Above this trippoint
the OP-Amp reduces the output current depending on the junction temperature and the
drop voltage.
In the case of overloaded high-side switches the status output is set to low.
If the HS-Switches are in OFF-state-Condition internal resistors RO1,2 from SH1,2 to GND
pull the voltage at SH1,2 to low values. On each output pin SH1 and SH2 an output
examiner circuit compares the output voltages with the internal reference voltage VEO.
This results in switching the status output to low. In H-Bridge condition this feature can
be used to protect the low-side switches against short circuit during the OFF-period.

Overtemperature Protection (valid only for the high-side-switches)

The chip also incorporates an overtemperature protection circuit with hysteresis which
switches off the output transistors and sets the status output to low.

Undervoltage-Lockout (UVLO)
When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis.
The High-Side output transistors are switched off if the supply voltage VS drops below
the switch off value VUVOFF.

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 BTS 771 G

Overvoltage-Lockout (OVLO)
When VS reaches the switch-off voltage VOVOFF the High-Side output transistors are
switched off with a hysteresis. The IC becomes active if the supply voltage VS drops
below the switch-on value VOVON.

Open Load Detection

Open load is detected by current measurement. If the output current drops below an
internal fixed level the error flag is set with a delay.

Status Flag
Various errors as listed in the table “Diagnosis” are detected by switching the open drain
output ST to low.

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 BTS 771 G

Truthtable and Diagnosis (valid only for the High-Side-Switches)

Flag GH1 GH2 SH1 SH2 ST Remarks
Inputs Outputs
0 0 L L 1 stand-by mode
Normal operation; 0 1 L H 1 switch2 active
identical with functional truth table 1 0 H L 1 switch1 active
1 1 H H 1 both switches
active
Open load at high-side switch1 0 0 Z L 1
0 1 Z H 1
1 X H X 0 detected
Open load at high-side switch2 0 0 L Z 1
1 0 H Z 1
X 1 X H 0 detected
Short circuit to DHVS at high-side switch1 0 0 H L 0 detected
0 1 H H 1
1 X H X 1
Short circuit to DHVS at high-side switch2 0 0 L H 0 detected
1 0 H H 1
X 1 X H 1
Overtemperature high-side switch1 0 X L X 1
1 X L X 0 detected
Overtemperature high-side switch2 X 0 X L 1
X 1 X L 0 detected
Overtemperature both high-side switch 0 0 L L 1
X 1 L L 0 detected
1 X L L 0 detected
Over- and Under-Voltage X X L L 1 not detected

Inputs: Outputs: Status:

0 = Logic LOW Z = Output in tristate condition 1 = No error
1 = Logic HIGH L = Output in sink condition 0 = Error
X = don’t care H = Output in source condition
X = Voltage level undefined

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Electrical Characteristics

Absolute Maximum Ratings

– 40 °C < Tj < 150 °C
Parameter Symbol Limit Values Unit Remarks
min. max.

High-Side-Switches (Pins DHVS, GH1,2 and SH1,2)

Supply voltage VS – 0.3 43 V –

HS-drain current IDHS – 10 * A * internally limited
HS-input current IGH –2 2 mA Pin GH1 and GH2
HS-input voltage VGH – 10 16 V Pin GH1 and GH2

Status Output ST

Status Output current IST –5 5 mA Pin ST

Low-Side-Switches (Pins DL1,2, GL1,2 and SL1,2)

Break-down voltage V(BR)DSS 50 – V VGS = 0 V; ID <= 1 mA

LS-drain current IDLS – 10 A –
LS-drain current IDLS – 20 A t < 1 ms; ν < 0.1
LS-drain current IDLS – 30 A t < 0.1 ms; ν < 0.1
lS-input voltage VGL – 10 14 V Pin GL1 and GL2

Temperatures

Junction temperature Tj – 40 150 °C –

Storage temperature Tstg – 50 150 °C –

Thermal Resistances (one HS-LS-Path active)

LS-junction case RthjCLS – 20 K/W measured to pin3 or 12

HS-junction case RthjCHS – 20 K/W measured to pin19
Junction ambient Rthja – 60 K/W –

Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.

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Operating Range
Parameter Symbol Limit Values Unit Remarks
min. max.
Supply voltage VS VUVOFF 34 V After VS rising
above VUVON
Input voltages VGH – 0.3 15 V –
Input voltages VGL –9 13 V –
Output current IST 0 2 mA –
HS-junction temperature TjHS – 40 150 °C –
LS-junction temperature TjLS – 40 150 °C –

Note: In the operating range the functions given in the circuit description are fulfilled.

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 BTS 771 G

Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V
unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.

Current Consumption

Quiescent current IS – 16 30 µA GH1 = GH2 = L

VS = 13.2 V
Tj = 25 °C
Quiescent current IS – – 35 µA GH1 = GH2 = L
VS = 13.2 V
Supply current IS – 2 3.5 mA GH1 or GH2 = H
Supply current IS – 4 7 mA GH1 and GH2 = H

Under Voltage Lockout (UVLO)

Switch-ON voltage VUVON – 5.4 7 V VS increasing

Switch-OFF voltage VUVOFF 3.5 4.2 – V VS decreasing
Switch ON/OFF hysteresis VUVHY – 1.2 – V VUVON – VUVOFF

Over Voltage Lockout (OVLO)

Switch-OFF voltage VOVOFF 36 37.8 43 V VS increasing

Switch-ON voltage VOVON 35 37.1 – V VS decreasing
Switch OFF/ON hysteresis VOVHY – 0.7 – V VOVOFF – VOVON

Short Circuit of Highside Switch to GND

Initial peak SC current ISCP 11 18 25 A Tj = – 40 °C

Initial peak SC current ISCP 9 14 22 A Tj = 25 °C
Initial peak SC current ISCP 5 8 14 A Tj = 150 °C

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Electrical Characteristics (cont’d)

ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V
unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.

Short Circuit of Highside Switch to VS

OFF-state VEO 2 3 4 V VGH = 0 V

examiner-voltage
Output pull-down-resistor RO 4 11 30 kΩ –

Open Circuit Detection of Highside Switch

Detection current IOCD 10 130 400 mA –

Switching Times of Highside Switch

Switch-ON-time; tON_H – 0.2 0.4 ms resistive load

to 90% VSH ISH = 1 A; VS = 12 V
Switch-OFF-time; tOFF_H – 0.2 0.4 ms resistive load
to 10% VSH ISH = 1 A; VS = 12 V

Control Inputs of Highside Switches GH 1, 2

H-input voltage VGHH – 2.8 3.5 V –

L-input voltage VGHL 1.5 2.3 – V –
Input voltage hysterese VGHHY – 0.5 – V –
H-input current IGHH 20 60 90 µA VGH = 5 V
L-input current IGHL 1 25 50 µA VGH = 0.4 V
Input series resistance RI 2.5 3.5 6 kΩ –
Zener limit voltage VGHZ 5.4 – – V IGH = 1.6 mA

Status Flag Output ST of Highside Switch

Low output voltage VSTL – 0.25 0.6 V IST = 1.6 mA

Leakage current ISTLK – 0.5 10 µA VST = 5 V
Zener-limit-voltage VSTZ 5.4 – – V IST = 1.6 mA

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 BTS 771 G

Electrical Characteristics (cont’d)

ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V
unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.

Control Inputs of Lowside Switches GL1, 2

Gate-threshold-voltage VGL(th) 0.8 1.6 2.5 V VGL = VDSL;

IDL = 1 mA
Transconductance gfs – 5 – S VDSL = 20 V;
IDL = 20 A

Switching Times of Lowside Switch

Switch-ON delay time; td_ON_L – 25 40 ns resistive load

VGS = 5 V; RGS = 50 Ω ISL = 1 A; VS = 12 V
Switch-ON time; tON_L – 95 140 ns resistive load
VGS = 5 V; RGS = 50 Ω ISL = 1 A; VS = 12 V
Switch-OFF delay time; td_OFF_L – 140 190 ns resistive load
VGS = 5 V; RGS = 50 Ω ISL = 1 A; VS = 12 V
Switch-OFF time; tOFF_L – 85 115 ns resistive load
VGS = 5 V; RGS = 50 Ω ISL = 1 A; VS = 12 V

Thermal Shutdown

Thermal shutdown junction TjSD 155 – 190 °C –

temperature
Thermal switch-on junction TjSO 150 – 180 °C –
temperature
Temperature hysteresis ∆T – 10 – °C ∆T = TjSD – TjSO

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 BTS 771 G

Electrical Characteristics (cont’d)

ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V
unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.

Output Stages

Leakage current IHSLK – 5 12 µA VGH = VSH = 0 V

of highside switch
Leakage current ILSLK – 20 100 µA VGL = 0 V
of lowside switch VDS = 18 V
Clamp-diode VFH – 0.8 1.5 V IFH = 3 A
of highside switch;
Forward-Voltage
Clamp-diode leakage- ILKCL – 2 10 mA IFH = 3 A
current (IFH + ISH)
of highside switch
Clamp-diode VFL – 0.8 1.5 V IFL = 3 A
of lowside switch;
forward-voltage
Static drain-source RDS ON H – 85 110 mΩ ISH = 1 A
on-resistance Tj = 25 °C
of highside switch
Static drain-source RDS ON L – 40 55 mΩ ISL = 1 A;
on-resistance VGL = 5 V
of lowside switch Tj = 25 °C
Static path on-resistance RDS ON – – 300 mΩ RDS ON H + RDS ON L;
ISH = 1 A

Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and
the given supply voltage.

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 BTS 771 G

ΙS
+ VS
CS CL
Ι FH1, 2 470 nF 100 µF
DHVS
Ι ST , Ι STLK ST 8 5, 10, 19, 24

DST Diagnosis Biasing and Protection VDSH2 VDSH1

C6V1
- VFH2 - VFH1

Ι GH1 GH1 7
R I1 Driver
VST IN OUT
3.5 k Ω 1 2 1 2
VSTL DI1
20 SH2 Ι SH2
R O1 R O2
VSTZ C6V1 0 0 L L
Ι GH2 GH2 9
R I2 0 1 L H
10 kΩ 10 k Ω 21 VUVON
VGH1 1 0 H L VUVOFF
3.5 k Ω 1 1 H H 12, 14, 15, 18 DL2 Ι DL2 VOVON
DI2
VGH2 C6V1 Ι LKL VOVOFF
GND 6
Ι GND 22, 23 SH1 Ι SH1
Ι LKCL1, 2

1, 3, DL1 Ι DL1
25, 28 Ι LKL
GL1 2

VGL1 VEO1 VEO2

VGL(th)1 GL2 13 VDSL1 VDSL2
VGL2 26, 27 16, 17 - VFL1 - VFL2
VGL(th)2
SL1 SL2
Ι SL1 Ι SL2

VDSH VDSL
RDSONH = RDSONL =
Ι SH Ι SL AES02079

Figure 3 Test Circuit

HS-Source-Current Named during Named during Named during

Short Circuit Open Circuit Leakage-Cond.
ISH1,2 ISCP IOCD IHSLK

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 BTS 771 G

Watchdog
Reset I
TLE 4268G VS = 12 V
Q
DO1

RQ CQ D CD GND CS
100 k Ω 22 F 100 nF 22 µ F
WD R VCC DHVS
RS
ST 8 5, 10, 19, 24
10 k Ω
DST Diagnosis Biasing and Protection
C6V1

R I1 Driver
GH1 7
IN OUT
3.5 k Ω 1 2 1 2
DI1 R O1 R O2
C6V1 0 0 L L 20 SH2
R I2 0 1 L H 21
GH2 9 10 k Ω 10 k Ω
1 0 H L
µP 3.5 k Ω 1 1 H H 12, 14, 15, 18 DL2
DI2 22, 23 SH1 M1
C6V1
GND 6
1, 3, DL1
25, 28
GL1 2

GL2 13
26, 27 16, 17
SL1 SL2 AES02074

Figure 4 Application Circuit

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 BTS 771 G

Package Outlines

P-DSO-28-9
(Plastic Dual Small Outline Package)

0.35 x 45˚

2.65 max
2.45 -0.2
7.6 -0.2 1)

0.2 -0.1

9
0.23 +0.0

x
8˚ ma
1.27 0.4 +0.8
0.35 +0.15 2) 0.1 10.3 ±0.3
0.2 28x

28 15

1 14
18.1 -0.4 1)

Index Marking
1) Does not include plastic or metal protrusions of 0.15 max rer side
2) Does not include dambar protrusion of 0.05 max per side GPS05123

Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
SMD = Surface Mounted Device Dimensions in mm

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This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.