L506 Hardware Design: LTE Module Series Version V2.7 Date 2020-02-29

L506 Hardware Design
LTE Module Series
Version： V2.7
Date：2020-02-29
Copyright© Shanghai Mobiletek Communication Ltd 1

Shanghai Mobiletek Communication Ltd
Notice
Some features of the product and its accessories described herein rely on the software installed,
capacities and settings of local network, and therefore may not be activated or may be limited by local
network operators or network service providers.
Thus, the descriptions herein may not exactly match the product or its accessories which you purchase.
Shanghai Mobiletek Communication Ltd reserves the right to change or modify any information or
specifications contained in this manual without prior notice and without any liability.
Copyright
This document contains proprietary technical information which is the property of Shanghai Mobiletek
L
Communication Ltd. copying of this document and giving it to others and the using or communication
of the contents thereof, are forbidden without express authority. Offenders are liable to the payment of
A
damages. All rights reserved in the event of grant of patent or the registration of a utility model or
design. All specification supplied herein are subject to change without notice at any time.
TI
FI NQ
DISCLAIMER
ALL CONTENTS OF THIS MANUAL ARE PROVIDED “AS IS”. EXCEPT AS REQUIRED BY
EN
APPLICABLE LAWS, NO WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
INCLUDINGBUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
AND FITNESS FOR A PARTICULAR PURPOSE, ARE MADE IN RELATION TO THE
LY
ACCURACY, RELIABILITY OR CONTENTS OF THIS MANUAL.

TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL
D
SHANGHAI MOBILETEKCOMMUNICATION LTD BE LIABLE FOR ANY SPECIAL,

INCIDENTAL, INDIRECT, OR CONSEQUENTIAL DAMAGES, OR LOSS OF PROFITS,
BUSINESS, REVENUE, DATA, GOODWILL SAVINGS OR ANTICIPATED SAVINGS
REGARDLESS OF WHETHER SUCH LOSSES ARE FORSEEABLE OR NOT.
N
O
C

Version History
Date Version Description of change Author
2016-03-09 V1.0 Initial
2016-06-02 V1.1 Add UART design description
2016-06-25 V1.2 Update Stencil file
2016-06-28 V1.3 Update Figure information
2016-06-29 V1.4 Update RF parameter
L
1． Add WIFI version information
2016-08-15 V1.5
2． Add storage and package part
A
2016-09-15 V1.6 Add CDMA parameter
TI
2017-04-06 V1.6.1 Added LD Series
FI NQ
2017-10-26 V1.6.2 Added L506A Series
EN
2017-11-10 V1.6.3 Update Band information
2018-04-29 V1.9 Update Product Model

LY
2018-11-10 V2.0 Update product baking instructions

D
2018-11-15 V2.1 Added L506X series
2018-11-21 V2.2 Update product model information
2018-12-26 V2.3 Update product Pin information
2019-07-26 V2.4 Added L506X(G) series

N
2019-09-29 V2.5 Update PCM description
2019-11-13 V2.6 Added L506SC series

O
2020-02-29 V2.7 Update edge and gprs spec

C

Contents
1 ABOUT THIS DOCUMENT ...................................... 7

1.1 Applicable scope ....................................................................................................................................... 7
1.2 Writing purpose ....................................................................................................................................... 7
1.3 Support and reference documents list .................................................................................................... 7
1.4 Terms and Abbreviations ........................................................................................................................ 8
2 PRODUCT OVERVIEW ......................................... 9
L
2.1 Package Dimensions .............................................................................................................................. 11
2.2 Product Function Outline ..................................................................................................................... 15
A
2.2.1 Hardware Diagram ....................................................... 15
2.2.2 Radio frequency function ............................................... 16
TI
FI NQ
3 INTERFACE DESCRIPTION ................................... 20

EN
3.1 PIN Definition ...................................................................................................................................... 20
3.1.1 Pin I/O parameter definition ........................................... 20
LY
3.1.2 Pin Map ................................................................ 20

3.1.3 PIN Definition and function description ................................ 21
D
3.2 Operating condition ............................................................................................................................. 27

3.3 Digital I/O characteristics ..................................................................................................................... 28
3.4 Power Interface ...................................................................................................................................... 28
3.4.1 Power supply pin description ........................................... 28
3.4.2 Power supply requirements .............................................. 29
3.4.3 Power Supply Design Guide .............................................. 30
N
3.4.4 Recommended Power supply circuit ....................................... 31

3.4.5 Power Supply Layout guide .............................................. 32
O
3.5 USIM interface ....................................................................................................................................... 32

3.5.1 Pin definition ......................................................... 32
3.5.2 Design Guide ........................................................... 33
C
3.5.3 USIM interface reference circuit ....................................... 33

3.6 PCM interface ........................................................................................................................................ 33
3.6.1 PCM interface definition ............................................... 33
3.6.2 PCM interface application .............................................. 35
3.7 USB2.0 interface .................................................................................................................................... 36
3.7.1 USB interface pin definition ........................................... 36
3.7.2 USB Interface application .............................................. 36
3.8 UART Interface...................................................................................................................................... 37
3.8.1 Pin description ........................................................ 37
3.8.2 UART interface application ............................................. 38
3.9 Power on/off and reset interface ........................................................................................................... 41
3.9.1 Pin definition ......................................................... 41

3.9.2 Power on sequence ...................................................... 41
3.9.3 Power off sequence ..................................................... 42
3.9.4 Reset sequence ......................................................... 43
3.9.5 Power on/off and reset interface application ........................... 43
3.10 Interactive interface............................................................................................................................. 45
3.10.1 Pin definition ........................................................ 45
3.10.2 interactive interface application ..................................... 45
3.11 Net Light interface ............................................................................................................................... 46
3.11.1 Pin define ............................................................ 46
3.11.2 Net light application ................................................. 46
3.12 SD card interface ................................................................................................................................. 47
L
3.12.1 Pin descriptions ...................................................... 47
3.12.2 SD card interface design guideline .................................... 48
A
3.12.3 SD card signal PCB line rules ......................................... 49
3.13 System boot configuration and download.......................................................................................... 49
TI
3.13.1 Pin definition ........................................................ 49
FI NQ
3.13.2 Boot configuration and force USB interface application ................ 49
3.14 WIFI interface (WIFI edition) ............................................................................................................ 50
EN
3.14.1 WIFI interface definition ............................................. 50
3.14.2 WIFI interface application ............................................ 51
3.15 Analog and Digital conversion (ADC) interface ................................................................................ 52
LY
3.16 I2C interface......................................................................................................................................... 52

3.16.1 I2C pin definition .................................................... 52
D
3.17 Antenna interface ................................................................................................................................. 53

3.17.1 RF signal PCB layout guide ............................................ 53
3.17.2 applications .......................................................... 54
4 PRODUCT CHARACTERISTICS ................................. 57

N
4.1 Absolute parameters .............................................................................................................................. 57

O
4.2 Operation condition ............................................................................................................................... 57

4.2.1 Operation voltage ...................................................... 57
4.2.2 Work mode .............................................................. 57
C
4.2.3 current consumption .................................................... 59

4.3 Working and storage temperature ....................................................................................................... 61
4.4 ESD performance .................................................................................................................................. 62
5 DESIGN GUIDELINE ........................................ 63

5.1 General design rules and requirements ............................................................................................... 63
5.2 Reference circuit .................................................................................................................................... 63
5.3 RF part design guideline ....................................................................................................................... 63
5.3.1 Early antenna design considerations................................................................................................. 63
5.4 EMC and ESD design advice ................................................................................................................ 64
5.5 PCB Recommended land pattern ......................................................................................................... 64

5.6 Products recommended upgrade .......................................................................................................... 66
6 MANUFACTURERS ........................................... 67
6.1 Steel mesh design ................................................................................................................................... 67
6.2 Temperature curve................................................................................................................................. 68
6.3 The Moisture Sensitivity Level (MSL) ................................................................................................. 69
6.4 Baking Requirements ............................................................................................................................ 70
7 PACKAGE STORAGE INFORMATION ............................. 71
L
7.1 Package information.............................................................................................................................. 71
7.1.1 Tape and reel information .............................................. 71
A
7.1.1 Package information .................................................... 71
7.2 Bagged storage conditions ..................................................................................................................... 72
TI
FI NQ
8 SAFETY INFORMATION ...................................... 73

EN
LY
D
N
O
C

1 About this document
1.1 Applicable scope

This document describes theL506series 4G LTE LCC Module (hereinafter referred to as L506), the
basic specifications, product electrical characteristics, design guidance and hardware interface
development guidance. Users need to follow this documentation requirements and guidance for design.
This document applies only to L506 products in the application development.
L
1.2 Writing purpose
A
This document provides the design and development basis for the product users. By reading this
document, users can have a whole understanding of the product, the technical parameters of the
TI
product have a clear understanding, and can be used in this document to complete the development of
FI NQ
wireless 4G Internet access functions.
This hardware development document not only provides the product functional features and technical
EN
parameters, but also provides product reliability testing and related testing standards, business
functions to achieve process, RF performance indicators and user circuit design guidance.
LY
D
1.3 Support and reference documents list

In addition to the hardware development documentation, we also provide a guide to the development
board based on this product manual and software development instruction manual, 1-1 is supported as
N
a list.
Table 1-1 support document list
O
No. Documents
C
1 《L506AT Command User Guide》
2 《L506_SPEC.docx》
3 《L506EVBUserManual》
4 《L506Schematic checklist》
5 《L506Layout checklist》
6 《L506_Reference Design_V3.pdf》
7 《L506_V3_DECAL.sch》
8 《L506_V3_DECAL.PCB》

1.4 Terms and Abbreviations
Table 1-2 is the Document relative Terms and Abbreviations。
Table1-2Terms and Abbreviations

Abbreviation Descriptions
ESD Electro-Static discharge
USB Universal Serial Bus
UART Universal Asynchronous Receiver Transmitter
L
SDCC Secure Digital Card Controller
USIM UniversalSubscriber Identification Module
A
SPI Serial Peripheral Interface
TI
I2C Inter-Integrated Circuit
FI NQ
PCM Pulse-coded Modulation
EN
I/O Input/output
LED Light Emitting Diode

LY
GPIO General-purpose Input/Output
GSM Global Standard for Mobile Communications

D
GPRS General Packet Radio Service
WCDMA Wideband Code Division Multi Access
UMTS Universal Mobile Telecommunication System
HSDPA High Speed Downlink Packet Access

N
HSUPA High Speed Uplink Packet Access

O
AGPS Assisted Global Positioning System
BER Bit Error Rate

C
DL Downlink
COEX WLAM/LTE-ISM coexistence
SMPS Switched-mode power supplies
LTE Long Term Evolution
FDD Frequency Division Duplexing
TDD Time Division Duplexing
DPCH Dedicated Physical Channel
DPCH_Ec Average energy per PN chip for DPCH. DPCH

2 Product Overview
L506 is a series module and design for global market, It include standard series and LD series. User
can choose the module based on the wireless network configuration. Inthis document, the supported
radio band is described in the following items. This product is a LCC interface of 4G wireless internet
module, with the high speed, small size, light weight, high reliability can be widely used in various
products and devices with wireless internet access:
Table2-1 L506 series module type correspond band
频段支持 L506(B*)C L506(B*)E L506(B*)CF L506A L506SC
L506LD L506ELD L506CFLD L506ALD
L506X(G)C L506X(G)E L506X(G)CF
L
GSM GSM900 ● ● ● ●
A
GSM1800 ● ● ● ●
CDMA2000/ BC0 ●
TI
EVDO
FI NQ
WCDMA UMTS850 ●
UMTS900 ● ● ● ●
EN
UMTS1900 ●
UMTS2100 ● ● ● ●
LY
TD-SCDMA TD-SCDMA ● ● ●
D
B34
TD-SCDMA ● ● ●
B39
LTE-TDD TDD_LTE B38 ● ● ● ●
TDD_LTE B39 ● ● ● ●
N
TDD_LTE B40 ● ● ● ●
O
TDD_LTE B41 ● ● ● ●
LTE-FDD FDD_LTE B1 ● ● ● ●
C
FDD_LTE B2 ●
FDD_LTE B3 ● ● ● ●
FDD_LTE B4 ●
FDD_LTE B5 ●(1) ●(1) ● ●
FDD_LTE B7 ●
FDD_LTE B8 ● ● ● ●
FDD_LTE B13 ●
FDD_LTE B17 ●

FDD_LTE B20 ●
GNSS(2) GPS L1 BAND ● ● ● ●
GLONASS ● ● ● ●
BEIDOU ● ● ● ●
*
B series products can support EXT BT interface
(1)
It is necessary to confirm whether the order contains BAND5
(2)
LD series and X(C/E/CF) series not support GNSS, XG(C/E/CF) support GNSS
Table2-2 Differences list between L506standard series ,L506LD series ,L506X series and L506SC
L
series.
Feature L506 Standard L506LD L506X(C/E/CF) L506XG(C/E/CF) L506SC
A
series series
PCM YES NO YES* YES* NO
TI
YES NO NO YES NO
FI NQ
GNSS
WIFI Interface YES NO NO NO NO

EN
Diversity reception YES NO NO NO NO
*
L506X(G)CF-2 not support PCM
LY
Data transmission specifications

D
⚫ LTE-FDD
- Uplink up to 50Mbps,
- Downlink up to 150Mbps
⚫ LTE-TDD
- Uplink up to 35Mbps,
- Downlink up to 130Mbps
N
⚫ TD-HSDPA/HSUPA
- Uplink up to 2.2 Mbps,
O
- Downlink up to 4.2Mbps
⚫ TD-SCDMA
C
- Uplink up to 128Kbps,
- Downlink up to 384Kbps
⚫ HSPA+
- Uplink up to 5.76 Mbps,
- Downlink up to 42 Mbps
⚫ UMTS
- Uplink/Downlink up to 384Kbps
⚫ 1xEV-DO
- Uplink up to 1.8Mbps,
- Downlink up to 3.1Mbps
⚫ EDGE Class 33:

- Max. 296Kbps(DL), Max. 236.8Kbps(UL)

⚫ GPRS Class 33:
- Max. 107Kbps(DL), Max. 85.6Kbps(UL)
Interface
⚫ SUB2.0
⚫ UART
⚫ USIM (3V/1.8V)
⚫ GPIO
⚫ ADC
⚫ SDIO
⚫ PCM
L
⚫ SPI
⚫ I2C
A
⚫ NETLIGHT
⚫ POWER KEY
⚫ RESET
TI
FI NQ
Dimensions（L×W×H）:30mm×30mm×2.8mm
EN
LY
D
N
O
TOP VIEW BOTTOM VIEW

Figure 2-1Product Physical Map
C
2.1 Package Dimensions

The product module is 87-PIN LCC package module, in addition to signal pin, also contains many
special heat welding disc to improve joint performance, mechanical strength and heat dissipation
performance, the heat release welding disc 12 and uniform distribution in the bottom of the PCB.
Package size is 30 x 30 mm, the height is 2.8 mm. Pin 1 position from the bottom of the belt angle
welding plate to identify, the missing corner where the direction of the corresponding module angle
pad, figure 2-2 is the product dimension type map:

L
A
TI
FI NQ
(a)Top Dimensions(Unit mm) (b)Top Detail(Unit mm)A

EN
LY
D
N
O
C
(c)Bottom Dimensions (Unit mm)

Note: antenna feed point in actual use of the customers don't need (PCB assembly, the stencil
file).

L
A
TI
FI NQ
EN
LY
D
N
(d)Bottom Detail B (Unit mm)

O
C

L
A
TI
FI NQ
EN
LY
D
N
(e)Bottom Detail C(Unit mm)

O
C

L
A
TI
FI NQ
EN
(e)Side view Dimensions(Unit mm)
Figure 2-2Module Dimensions
LY
D
2.2 Product Function Outline
2.2.1 Hardware Diagram

N
This product mainly includes the following signal group：USB Interface signal、USIM card Interface
signal、I2C Interface signal、UART Interface signal、PCM Interface signal、UART Interface signal、
O
WIFI Interface signal(WIFI Version)、SPI interface、Module startup、Module control signal、Power

supply and ground. The global architecture of the L506 module is described in the figure below.
C

MAIN ANT DIV ANT GNSS ANT
FLASH
GNSS DDR
RF SWITCH SAW
GNSS
LNA SDIO/IO
PCM/I2S
UART/SPI
GNSS IQ
Baseband
RF IQ SD CARD
RF
Transceiver CLK
RF
L
DATA
TDSCDMA/GSM PA+ASM RF FEM SIM CARD
VBAT
A
I/O STATUS
TI
RF VDD_RF
FI NQ
WCDMA/CDMA/TDD_LTE/FDD_LTE PMIC VBAT
PA
LDO
EN
19.2
MHZXO
VBAT VBAT
LY
Power on/off Reset

D
Figure 2-3 L506 System Functional Architecture
2.2.2 Radio frequency function

RF Function Overview：
N
⚫ TDD-LTE B38/B39/B40/B41
⚫ FDD-LTE B1/B2/B3/B4/B5/B7/B8/B12/B13/B17/B20
O
⚫ TD-SCDMA B34/B39
⚫ UMTS/HSDPA/HSPA+ B1/B2/B5/B8
⚫ GSM/GPRS/EDGE 900/1800 MHz
C
⚫ GPS/BEIDOU/GLONASS
The operating frequency range of the transmitter is shown in table 2-2.
Table 2-3RF frequency band
Working band Upstream band（Uplink） Downlink frequency（Downlink）

UMTS850 824 MHz — 849MHz 869 MHz — 894MHz
UMTS900 890 MHz — 915MHz 925 MHz — 960 MHz
UMTS1900 1850 MHz — 1910 MHz 1930 MHz — 1990MHz
UMTS2100 1920 MHz — 1980 MHz 2110 MHz — 2170 MHz
GSM900 890 MHz — 915MHz 925 MHz — 960MHz

GSM1800 1710 MHz — 1785MHz 1805 MHz — 1880MHz

CDMA BC0 869 MHz — 894 MHz 824 MHz — 849 MHz
TD-SCDMA B34 2010～2025 MHz 2010～2025 MHz
TD-SCDMA B39 1880～1920 MHz 1880～1920 MHz
TDD_LTE B38 2570 MHz~2620 MHz 2570 MHz~2620 MHz
TDD_LTE B41 2555～2655 MHz 2555～2655 MHz
FDD_LTE B1 1920 MHz~1980 MHz 2110 MHz~2170 MHz
FDD_LTE B2 1850 MHz — 1910 MHz 1930 MHz — 1990MHz
L
A
FDD_LTE B5 824 MHz — 849MHz 869 MHz — 894MHz
FDD_LTE B8
TI 880 MHz~915 MHz 925 MHz~960 MHz

FI NQ
EN
LY
GPS L1 BAND 1574.4 ～1576.44 MHz

GLONASS 1598 ～1606 MHz
D
BEIDOU B1 1559.05～1563.14 MHz
Table 2-4Conducted transmission power
Working Band Max Power Min Power

UMTS850 24dBm +1/-3dB <-50dBm
N

O

GSM900 33dBm ±2dB 5dBm ± 5dB
C
DCS1800 30dBm ±2dB 0dBm ± 5dB

GSM900(8-PSK) 27dBm ±3dB 5dBm ± 5dB
DCS1800(8-PSK) 26dBm +3/-4dB 0dBm ± 5dB
CDMA BC0 24dBm +1/-3dB <-50dBm
TD-SCDMA B34 24dBm +1/-3dB <-50dBm
TD-SCDMA B39 24dBm +1/-3dB <-50dBm
TDD_LTE B38 23dBm +/-2.7dB <-40dBm


FDD_LTE B1 23dBm +/-2.7dB <-40dBm
L
A
Table 2-5Conducted receive sensitivity
TI
Working Band Receive sensitivity(Typical) Receive sensitivity(MAX)
FI NQ
WCDMA B1 < -109dBm 3GPP

EN
LY
CDMA BC0 < -109dBm 3GPP

D
GSM900 < -109dBm 3GPP
DCS1800 < -108dBm 3GPP
TD-SCDMA B34 < -110dBm 3GPP
TD-SCDMA B39 < -110dBm 3GPP

N
Table 2-6 Reference sensitivity (QPSK)

O
Channel bandwidth
E-UTRA Band 1.4 MHz 3 MHz 5 MHz 10 MHz 15 MHz 20 MHz DuplexMode
C
1 -- -- -100 -97.2 -96.2 -95 FDD

2 -102.2 -99.7 -98 -95 -94.2 -93 FDD
3 -102.2 -99.7 -98 -95 -94.2 -93 FDD
4 -105.2 -101.7 -99 -96 -95.2 -96 FDD
5 -103.2 -101.7 -100.2 -97.2 -- -- FDD
7 -- -- -98 -95 -93.2 -92 FDD
8 -103.2 -101.7 -100.2 -97.2 -- -- FDD
12 -103.2 -101.7 -100.2 -97.2 -- -- FDD
13 -- -- -100.2 -97.2 -- -- FDD
17 -- -- -100.2 -97.2 -- -- FDD

20 -- -- -97 -94 -91.2 -90 FDD

38 -- -- -100 -97 -95.2 -94 TDD
39 -- -- -100 -97 -95.2 -94 TDD
40 -- -- -100 -97 -95.2 -94 TDD
41 -- -- -100 -97 -95.2 -94 TDD
L
A
TI
FI NQ
EN
LY
D
N
O
C

3 Interface Description
3.1 PIN Definition
3.1.1 Pin I/O parameter definition

The I/O parameter definition of the product is shown in table 3-1.
Table 3-1 I/O parameter definitions
L
Pin attribute symbol Description
PI Power input PIN
A
PO Power output PIN
AI Analog input
TI
FI NQ
AIO Analog signal input/output PIN
I/O Digital signal input/output PIN

EN
DI Digital signal input
DO Digital signal output

LY
DOH Digital output with high level

D
DOL Digital output with low level
PD Pull down
PU Pull up
AO Analog output
N
O
3.1.2 Pin Map

L506 haver different version, and the correspond pin definition show as special mark(* mark or #mark)
C
in the pin map. In the different hardware version the corresponding pin have differential using, detail
description show as below chart.All hardware interfaces which connect L506 to customers’ application
platform are through 87 pinspads (Metal half hole). Figure 3-1 is L506 outline diagram.

PCM_SYNC
BOOT_CFG
GNSS_ANT
PCM_OUT
PCM_CLK
PCM_IN
COEX3
VBAT
VBAT
GND
GND
GND
GND
GND
GND
DCD
RXD
DTR
TXD
RTS
CTS
RI
1
72#
69#
86
80
79
78
77
76
75
74
73
71
70
68
67
66
65
64
63
62
61
87
85 BOOT_CFG0
60 GND
GND 1
59 AUX_ANT
GND 2
58 GND
PWRKEY 3
57 GND
RESET 4
56 SDA
GND 5
55 SCL
SPI_CLK 6
54 FLIGHTMODE
SPI_MISO 7
53 USIM_DET
SPI_MOSI 8 GPIO_1/
52#
L
SPI_CS WAKEUP_OUT
9
51 NETLIGHT
GND 10
GPIO_2/
50#
USB_VBUS 11 L506 LCC TOP WAKEUP_IN
A
49 STATUS
USB_DN 12
48 SD1_DET
USB_DP 13
47 ADC1
GND 14
TI
46 ADC2
VDD_1V8 15
FI NQ
45# GPIO_0
USB_ID 16
44 VDD_EXT
USIM_DATA 17
43 GND
USIM_RST 18
EN
42* WIFI3V3_EN
USIM_CLK 19
41 GND
USIM_VDD 20
82 MAIN_ANT
GND 81
LY 84#
27*
28*
29*
30*
31*
32*
33*
34*
35*
36*
21
22
23
24
25
26
37
38
39
40
83
D
WLAN_32K_SLE
GPIO_3/BT_EN
VREG_L2_1V8
SDC1_DATA2
SDC1_DATA1
SDC1_DATA3
SDC1_DATA0
SDC1_CMD
SD_DATA0
SD_DATA1
SD_DATA2
SD_DATA3
WLAN_EN
SDC1_CLK
SD_CMD
SD_CLK
EP_CLK
COEX2
COEX1
VBAT
VBAT
GND
GND
Figure 3-1Pin Map View(Top View)

N
Note: 1.* flag pin in Figure 3-1 stand forWIFI/BT interface in the WIFI edition module. In without
O
WIFI interface edition, it’s reserved pin,suggest in your design let the pin open.
2. #flag pin in Figure 3-1 stand for multi-function pin. Detail description show as in
corresponding function description.
C
3.1.3 PIN Definition and function description
Table 3-2 Pin definition

Pin No. Pin description Pin No. Pin description
1 GND 2 GND
3 PWRKEY 4 RESET
5 GND 6 SPI_CLK

7 SPI_MISO 8 SPI_MOSI
9 SPI_CS 10 GND
11 USB_VBUS 12 USB_DN
13 USB_DP 14 GND
15 VDD_1V8 16 USB_ID
17 USIM_DATA 18 USIM_RST
19 USIM_CLK 20 USIM_VDD
21 SD_CMD 22 SD_DATA0
23 SD_DATA1 24 SD_DATA2
L
25 SD_DATA3 26 SD_CLK
A
27* SDC1_DATA2 28# GPIO_3
29* SDC1_DATA1 30* WLAN_EN
TI
FI NQ
31* SDC1_DATA3 32* SDC1_CMD
33* SDC1_DATA0 34* VREG_L2_1V8

EN
35* WLAN_32K_SLEEP_CLK 36* SDC1_CLK
37 GND 38 VBAT
LY
39 VBAT 40 GND
D
41 GND 42* WIFI3V3_EN
43 GND 44 VDD_EXT
45# GPIO_0 46 ADC2
47 ADC1 48 SD1_DET
N
49 STATUS 50# GPIO_2/WAKEUP_IN
51 NETLIGHT 52# GPIO_1/WAKEUP_OUT

O
53 USIM_DET 54 FLIGHTMODE
56 SDA
C
55 SCL
57 GND 58 GND
59 AUX_ANT 60 GND
61 GND 62 VBAT
63 VBAT 64 GND
65 GND 66 RTS
67 CTS 68 RXD
69# RI 70 DCD

71 TXD 72# DTR
73 PCM_OUT 74 PCM_IN
75 PCM_SYNC 76 PCM_CLK
77 GND 78 GND
79 GNSS_ANT 80 GND
81 GND 82 MAIN_ANT
83 COEX1 84 COEX2#
85 BOOT_CFG0 86 COEX3
87 BOOT_CFG1
L
A
Table 3-3 Pin Function Description
TI
Power interface
FI NQ
Pin Name Pin No. I/O Description Content
The power supply
Power supply voltage,
EN
for system Maximum
VBAT 38,39,62,63 PI VBAT=3.4V~4.2V.
load current must
above 2A.
LY
Module LDO output

power ,1.8V output,Max
D
If not use keep it

VDD_1V8 15 PO current 150mA,ForI/O,
open.
MCP, WLAN/BT, SLIC,
sensors.
Module LDO output Only use for
power,2.85V external SD Card
N
VDD_EXT 44 PO
output,Max current VDD. If not use
300mA. keep it open.
O
1,2,5,10,14,37
,40,41,43,57,5
GND Ground.
C
8,60,61,64,65,
77,78,80,81
System Control
System power on/off
PWRKEY 3 DI
input, activelow.
System reset input,
RESET 4 DI
active low.
The input signal, used Pull UP to
FLIGHTMODE 54 DI,PU to control the system VDD_1V8（PIN 15）
into flight mode, H: with 10K resistor
flight mode; L: normal

mode
Module status(GPIO)
Identify the system
NETLIGHT 51 DO
network status.
Module status
identify: High level
STATUS 40 DO
power on, low level
power off.
WIFI/BT interface（WIFI Version）
L
Pin name Pin No. I/O Description content
SD1_CMD 32 DO SDIO command
A
SD1_DATA0 33 I/O SDIO data WIFI SDIO, only
SD1_DATA1 29 I/O SDIO data WIFI version use,
TI
FI NQ
SD1_DATA2 27 I/O SDIO data if not use keep it
SD1_DATA3 31 I/O SDIO data open.

EN
SD1_CLK 36 DO SDIO clock
If not use keep it
WLAN_EN 30 DO WIFI module enable pin
open.
LY
WIFI module power If not use keep it

WIFI3V3_EN 42 DO
supply enable pin open.
D
WLAN_32K_SLEEP_C If not use keep it

35 DO WIFI module clock
LK open.
Only for WIFI use,
WIFImodule 1.8V power
VREG_L2_1V8 34 PO if not use keep it
supply
open.
N
SD interface
O
SD_CMD 21 DO SDIO command

SD_DATA0 22 I/O SDIO data Advice add the ESD
C
SD_DATA1 23 I/O SDIO data on you SD card

SD_DATA2 24 I/O SDIO data Slot. If not use
SD_DATA3 25 I/O SDIO data keep it open
SD_CLK 26 DO SDIO clock

L506 have internal
Input pin as SD card pull up, so SD card
detecting. slot should choose
SD_CARD_DET_N 48 DI，PU
H: SD card is removed insert detect PIN
L: SD card is inserted connect the
ground. If not use

keep it open
Default: GPIO
Optional: BT_EN pin If not use keep it
GPIO_3/BT_EN 28 I/O
for ext bt module open
enable
SIMinterface
Input pin as USIM
L506 have internal
carddetect pin.
USIM_DETECT 53 DI，PU pull up. If not use
H: USIM is removed
keep it open.
L: USIM is inserted
L
USIM Card data I/O,
which has been
A
pulled up with a 10KR
resistor to
TI
USIM_DATA 17 I/O USIM_VDD in module. Do
FI NQ
not pull
up or pull down in
EN
users’ application
circuit. All signals of
USIM_RESET 18 DO USIM Reset USIM
LY
USIM_CLK 19 DO USIM Clock interface should

beprotected with
D
USIM Card Power

output, output ESD/EMC.
Voltage depends on
USIM mode
automatically，and one
USIM_VDD 20 PO
is
N
3.0V±10%, another is
1.8V±10%.
O
Current is less than

50mA.
PCM interface
C

PCM_CLK 76 DO PCM data bit clock.
PCM data frame sync
PCM_SYNC 75 DO If not use keep it
signal.
open.
PCM_IN 74 DI PCM data input.
PCM_OUT 73 DO PCM data output.
FULL UART/DEBUG PORT
RTS 66 DI DET Request to send. If not use keep it

open.
If not use keep it
CTS 67 DO Clear to Send.
open.
If not use keep it
RX 68 DI Receive Data.
open.
Multiplexed as
MDM_DBG_UART_TX.
If not use keep it
RI 69# DO Ring Indicator.
open. Recommend
reserved the test
point for debug
L
If not use keep it
DCD 70 DO Carrier detects.
open
A
If not use keep it
TXD 71 DO Transmit Data.
open.
TI
Multiplexed as
FI NQ
MDM_DBG_UART_RX.
If not use keep it
DTR 72# DI DTE get ready.
EN
open. Recommend
reserved the test
point for debug
LY
I2C interface
D

I2C_SCL 55 DO I2C clock output. L506 internal have
I2C_SDA 56 I/O I2C data input/output. pulled up to 1.8V
GPIO
N
Default: GPIO
Optional: Input pin as
O
wake/interrupt
GPIO_2/WAKEUP_IN 50 I/O
signal to module from
host.
C
Default: GPIO If not use keep it

Optional: Output pin open.
GPIO_1/WAKEUP_OU
52 DO as wake/interrupt
T
signal to host from
module.
Default: GPIO
GPIO_0 45 DO Optional: output
control pin.
RF port


MAIN _ANT 82 AIO Main Antenna
AUX_ANT 59 AI diversity antenna
GNSS_ANT 79 AI GPS antenna
Others
Analog conversion
ADC1 47 AI digital input
interface1 If not use keep it
Analog conversion open.
ADC2 46 AI digital input
L
interface2
COEX1 83 I/O RF synchronizing If not use keep it
A
between wifi and open. Normal use
COEX3 86 I/O
LTE. can’t Pullup.
TI
FI NQ
Default: RF
synchronizing between
wifi and
EN
LTE.
COEX2 84# I/O Optional:Pull up to
LY
1.8V(L506 PIN 15
VDD_1V8)with 10K
D
resistor force module

Recommend placing
in USB download mode
test points for
Pull up to 1.8V(L506
debug. Normally
PIN 15 VDD_1V8)with
can’t Pullup.
BOOT_CFG0 85 DI, PD 10K resistor force
N
module in fastboot
mode
Pull up to 1.8V(L506
O
PIN 15 VDD_1V8)with
BOOT_CFG1 87 DI, PD 10K resistor force
C
module in fastboot
mode
3.2 Operating condition

Table 3-4 module recommendedoperatingcondition
Parameter Description Min. Typ. Max. Unit
VBAT Main power supply for 3.4 3.8 4.2 V

the module
3.3 Digital I/O characteristics

Table 3-5 1.8V Digital I/O characteristics
Parameter Description Min. Typ. Max. Unit
VIH High level input voltage 0.7*VDD_PX VDD_PX VDD_PX+0.3 V
VIL Low level input voltage -0.3 0 0.2* VDD_PX V
VOH High level output voltage VDD_PX-0.45 - VDD_PX V
L
VOL Low level output voltage 0 0 0.45 V
A
IOH High-level output current
- 2 - mA
(nopull down resistor)
IOL
TI
Low-level output current
FI NQ
- -2 - mA
(no pullup resistor)
Input high leakage
EN
IIH
current (no - - 1 uA
pull down resistor)
LY
IIL Input low leakage current

-1 - - uA
(nopull up resistor)
D
*Note: 1. These parameters are for digital interface pins, such as SPI, WIFI SDIO, GPIOs
(NETLIGHT,
FLIGHTMODE, STATUS, USIM_DET, SD1_DET), I2C, UART, PCM, COEXn, BOOT_CFGn.
2. L506 TF-card signal(SD_DATA0~SD_DATA3,SD_CLK,SD_CMD),USIM card
N
signal(USIM_CLK,USIM_DATA,USIM_RST) support dual-voltage(1.8V and 3.0V)mode, and the

DC character show in corresponding function block.
O
C
3.4 Power Interface
3.4.1 Power supply pin description
Table 3-6 DC Power Characteristics

DC Characteristic（V）
Pin No. Net Name Description
Min. Typ. Max.
38,39,62,63 Power supply for
VBAT 3.4 3.8 4.2
the module

1,2,5,10,14,37,40,
41,43,57,58,60,61, GND GND - - -
64,65,77,78,80,81
44 Power supply for
VCC_EXT - 2.85 -
external SD card
20 Power supply for
USIM_VDD - 1.8/3.0 -
VDD SIM
15 VDD_1V8 LDO 1.8V output - 1.8 -
88-99* Thermal and

GND welding fixed - - -
plate
L
Note: Pin88~Pin99 (total12pin) is design for the thermal welding fixed plate.
A
3.4.2 Power supply requirements
TI
FI NQ
There are four VBAT PIN power for the module, VBAT directly power supply for the module
baseband and PA, and operating rating is 3.4V~4.2V; In the weak network environment, the antenna
EN
will be maximum power emission. The peak current of the module under the 2G mode may reach the
peak current of 1.8A. power supply to reach 2A, the average current to reach 0.9A above. Due to the
LY
launch of GSM/GPRS time slot pulse can cause VBAT power source instantaneous voltage drop,
maximum peak current can reach 2A, So the max power supply current must more than 2 A. Figure
D
3-2 sign for GSM/GPRS instantaneous pulse diagram.

N
O
C
Figure 3-2 GSM/GPRS instantaneous pulse
Table 3-7 VBAT power supply interface characteristics

Symbol Description Min Typ Max Unit
VBAT Power supply

3.4 3.8 4.2 V
voltage
IVBAT(peak) Power supply p - 2* - A

current
IVBAT(average) Power supply

average 1 1.5 - A
current
IVBAT(power-off) Power supply
current
- - 20 uA
in power off
mode
IVBAT(power-save) Power supply
current
in power save - - 3 mA
L
mode(sleep
mode)
A
TI
FI NQ
3.4.3 Power Supply Design Guide
Make sure that the input voltage at the VBAT pin will never drop below 3.4V even during a transmit
EN
burst when the current consumption rises up to more than 2A. If the power voltage drops below 3.4V,
the RF performance of module may be affected. Using large tantalum capacitors (above 300uF) will be
the best way to reduce the voltage drops. If the power current cannot support up to 2A, users must
LY
introduce larger capacitor (typical 1000uF) to storage electric power. For the consideration of RF
D
performance and system stability, some multi-layer ceramic chip (MLCC) capacitors (0.1/1uF) need to
be used for EMC because of their low ESR in high frequencies. Note that capacitors should be put
beside VBAT pins as close as possible. Also User should keep VBAT net wider than 2 mm to
minimize PCB trace impedance on circuit board. The following figure is the recommended circuit.
N
O
C
Figure 3-3 VBAT input application circuit

Note: The Cd, Ce, Cb, Cc and Cf are recommended being mounted for L506, but the Ca, Cb, Ce,
Ccand Cf for tune.

In addition, in order to get a stable power source, it is suggested to use a Zener diode of which reverse
Zener voltage is 5.1V and dissipation power is more than 500mW.
Table 3-8: Recommended Zener diode models
NO. Manufacturer Part Number Power Package
1 On semi MMSZ5231BT1G 500mW SOD123
2 Prisemi PZ3D4V2H 500mW SOD123
3 Vishay MMSZ4689-V 500mW SOD123
4 Crownpo CDZ55C5V1SM 500mW 0805
L
3.4.4 Recommended Power supply circuit
A
If the voltage difference is not big,We recommend DCDC or LDO is used for the power supply of the
module, make sure that the peak current of power components can rise up to more than 2A. The
following figure is the reference design of +5V input linear regulator power supply. The designed
TI
FI NQ
output for the power supply is 3.8V.
EN
LY
D
Figure 3-4 Reference circuit of the LDO power supply

N
If there is a big difference between the input voltage and the desired output (VBAT) or better
efficiency ismore important, a switching converter power supply will be preferable. The following
figure is thereference circuit.
O
C
Figure 3-5 Reference circuit of the DCDC power supply

Note: DCDC may deprave RF performance because of ripple current intrinsically.

3.4.5 Power Supply Layout guide

The layout of the power supply section and the related components is of vital importance in the power
module design. If processes this part layout is not good, will lead to various effects, such as bad EMC,
effective the emission spectrum and receiving sensitivity, etc. So the power supply part design is very
important, when you design this part you should notes below contents: 1. DC DC switch power should
place away from the antenna and other sensitivity circuit; 2. Consider the voltage drop and the module
current requirement, the layout line should better above 100mil. If conditions allow should add a
power shape plane.
L
3.5 USIM interface
A
3.5.1 Pin definition
TI
The L506 integrated a ISO 7816-2 standard USIM port, and the module can automatic identify the
FI NQ
voltage demo according the USIM to allow the mobile equipment toattach to the network. Both 1.8V
and 3.0V SIM Cards are supported.
EN
Table 3-9USIM Electronic characteristic in 1.8V mode (USIM_VDD =1.8V)
LY
Symbol Parameter Min. Typ. Max. Unit

USIM_VDD LDO power output 1.75 1.8 1.95 V
D
USIM_V
0.65·USI
VIH High-level input voltage - DD +0.3 V
M_VDD
0.35·USI
VIL Low-level input voltage -0.3 0 V
M_VDD
N
USIM_V USIM_V
VOH High-level output voltage -- V
DD -0.45 DD
O
VOL Low-level output voltage 0 0 0.45 V

C
Table 3-10: USIM Electronic characteristic 3.0V mode (USIM_VDD =3.0V)

USIM_VDD LDO power output 2.75 3.0 3.05 V
0.65*USI USIM_V
VIH High-level input voltage - V
M_VDD DD +0.3
0.25·USI
VIL Low-level input voltage -0.3 0 V
M_VDD
USIM_V USIM_V
VOH High-level output voltage - V
DD -0.45 DD
VOL Low-level output voltage 0 0 0.45 V

3.5.2 Design Guide

USIM electronic characteristics as the table 3-8,3-9 show.
In order to meet the 3 GPP TS 51.010 1 protocol and EMC certification requirements. Suggest USIM
slot near the location of the module USIM card interface, to avoid running for too long, lead to serious
deformation of waveform and effect signal integrity, USIM_CLK and USIM_DATA signal lines
suggest ground protect. Between the USIM VCC & GND add a 1uF and a 33 pF capacitor in parallel,
Between the USIM_CLK& GND, USIM_RST& GND, USIM DATA& GND add a 33 pF capacitor in
parallel, for filter the RF signal interference.
L
A
3.5.3 USIM interface reference circuit
TI
FI NQ
EN
LY
D
N
O
Figure 3-6 USIM Reference circuit
Note:1.USIM_DATA have added the pull-up resistance in the module design.

C
2. L506 support hot-plug detect, if need the function, please add this pin.
3.6 PCM interface
3.6.1 PCM interface definition

L506 provides hardware PCM interface for external codec. L506 PCM interface can be used inshort
sync master mode only, and only supports 16 bits linear format：
Table 3-11 PCM interface definition
DC Characteristics（V）
Pin No. Signal name I/O Type
Min. Typ. Max.
PCM -0.3 1.8 1.9
75 PCM_SYNC synchronizing
signal
74 PCM_DIN PCM data input -0.3 1.8 1.9
73 PCM_DOUT PCM Data output -0.3 1.8 1.9
76 PCM_CLK PCM Data clock -0.3 1.8 1.9
L
A
TI
Figure 3-7 PCM_SYNC timing
FI NQ
EN
LY
D
N
Figure 3-8 Codec to L506 module timing

O
C
Figure 3-9 L506 to codec module timing
Table 3-12 PCM interface Timing

DC characters
Parameter Descriptions
Min. Typ. Max. Unit
T(sync) PCM_SYNC cycle - 125 - us
PCM_SYNC high level hold - 488 - ns

T(synch)
time
PCM_SYNC low level hold - 124.5 - us
T(syncl)
time
L
T(clk) PCM_CLK cycle - 488 - ns
A
PCM_CLK high level hold - 244 - ns
T(clkh)
time
T(clkl) PCM_CLK low level hold time - 244 - ns
TI
FI NQ
T(susync) PCM_SYNC establish time - 122 - ns
T(hsync) PCM_SYNC hold time - 366 - ns

EN
T(sudin) PCM_IN establish time 60 - - ns
T(hdin) PCM_IN hold time 60 - - ns

LY
From PCM_CLK rising edge to - - 60 ns

T(pdout)
D
PCM_OUTvalid time
From PCM_CLK falling edge - - 60 ns
T(zdout) to PCM_OUT high
impendence delay time
N
3.6.2 PCM interface application

O
L506 only support the host mode, PCM_SYNC,PCM_CLK is the output pin，PCM_SYN as the
synchronizing output 8kHz sync signal. PCM Data support 8bit or 16bit data.
C

0R
PCM_DIN PCM_OUT
0R
PCM_DOUT PCM_IN
0R
PCM_SYNC PCM_SYNC
0R
PCM_CLK PCM_CLK
GND GND
L506
CODEC
（DCE）
Figure 3-10 PCM application circuit（L506 in host mode）
L
Note:1.L506 PCM port DC character is base on 1.8 voltage, please pay attention the voltage
matching.
A
2. If your design need this function, you should add the crystal for PCM clock. About the
crystal type please contact our market.
TI
3. L506 default design base on NAU8814 as the codec chip, the detail design please refer to
FI NQ
《L506 reference design》.
EN
3.7 USB2.0 interface
LY
D
3.7.1 USB interface pin definition

L506 integrated a USB 2.0 port and low speed mode full speed mode and high speed mode
transmission speed between the AP and the host. Below table is the module USB pin definition
N
Table 3-13 USB interface pin definition

DC characteristic（V）
Pin No. Signal name I/O type
Min. Typ. Max.
O
12 USB_DM USB2.0 dateD- - - -
13 USB_DP USB2.0data D+ - - -
C
3.7.2 USB Interface application

USB bus is mainly used for data transmission, software upgrading, module testing. Work in the
high-speed mode of the USB line, if you need ESD design, ESD protection device must meet the
junction capacitance value <5pf, otherwise the larger junction capacitance will cause waveform
0R
VBUS VBUS
USB_DP USB_DP
0R
USB_DM USB_DM
GND GND
USB_ID
47K
L506(DCE) HOST(PC)
L
distortion, the impact of bus communication. Differential impedance of differential data line in 90ohm
A
+ 10%. In your application must add a 47Kohm resistor between USB_VBUS to ground.
TI
FI NQ
Figure 3-11 USB application
EN
3.8 UART Interface
LY
D
3.8.1 Pin description

L506 module provides a flexible 7-wire UART (universal asynchronous serial transmission)
interface.UART as a full asynchronous communication interface, Support the standard modem
handshake signal control, Comply with the RS - 232 interface protocols. And also support four wire
serial bus interface or the 2-wire serial bus interface mode, and the module can be through the UART
N
interface for serial communication with the outside (DET) and the AT command input, etc.L506
module is a DCE (Data Communication Equipment) and client PC is a DTE (Data Terminal
O
Equipment).AT commands are entered and serial communication is performed through UART
interface. The pin signal is defined as shown in below table.
C
Table 3-14 UART pin definition

Pin No. Pin I/O type Descriptions
71 UART_TX DO UART data transmission
68 UART_RX DI UART data receive
69 UART_RI DO Ring Indicator.
66 UART_RTS DO UARTDET request to send
72 UART_DTR DI DTE get ready.

67 UART_CTS DI UART Clear to Send.
70 UART_DCD DO UART Carrier detects.
Note：UART_RI,UART_DTR can be used as two line UART interface for system debugging, See
table 3-3 Pin functional description.
3.8.2 UART interface application

UART_RI, UART_DTR default status is the system log port, so we recommend that users keep
reserved the interface and test points in design. The L506 UART is 1.8V interface. A level shifter
L
should be used if user’s application is equipped with a 3.3V UART interface. The level shifter
TXB0108RGYR provided by Texas Instruments is recommended. The reference design of the
A
TXB0108RGYR is in the following figures. About the application as below:
L506 DCE
TI
FI NQ
Client(DET)
Serial Port Serial Port
EN
TXD1 TXD
RXD1 RXD
LY
RTS1 RTS
D
CTS1 CTS
DTR1 DTR
DCD1 DCD
RING1 RING
N
GND GND
O
Figure 3-12UART 4 Line connection mode

C

L506(DCE) Client (DTE)

TXD1 TXD
RXD1 RXD
RTS1 RTS
CTS1 CTS
DTR1 DTR
DCD1 DCD
L
RING1 RING
A
GND GND
TI
FI NQ
Figure 3-13UART 2 Line connection mode
EN
L506 (DCE) Client (DTE)
LY

TXD1
D
TXD
RXD1 RXD
RTS1 RTS
CTS1 CTS
N
DTR1 DTR
O
DCD1 DCD
RING1 RING
C
GND GND
Figure 3-14UART Full mode

L
A
TI
FI NQ
Figure 3-15UART in debug mode
EN
L506 UART isCOMS 1.8V level, if the AP voltage level is not the 1.8V should add a voltage transfer
module in your application. Below is SP3238E application diagram.
LY
D
N
O
C
Figures 3-16Voltage transfer Reference Circuit

3.9 Power on/off and reset interface

L506 can be powered on by pulling PWRKEY pin down to ground. This pin is already internal pulled
up to 1.8V in module, so external pull-up resistor is not necessary. Placing a100nF capacitor and an
ESD protection diode close to the PWRKEY pin is strongly recommended. Please refer to the
following figure for recommended reference circuitL506 also have a RESET pin to reset module. This
function is used as an emergency reset only when AT command “AT+CPOF” and the PWRKEY pin
has no effect. User can pull RESET pin to ground, then module will reset. This pin is already pulled up
L
with a 40KΩ resistor to 1.8V in module, so external pull-up resistor is not necessary. Placing a100nF
capacitor and an ESD protection diode close to the RESET pin is strongly recommended. Please refer
A
to the following figure for recommended reference circuit, you can pull-down this pin to ground and
hold about 200 MS and then release will force the module enter reset state.
TI
Table 3-15power on/off and reset key define
FI NQ
Pin No. Net name I/O Typ. descriptions
3 PWRKEY DI L506 power on/off pin(internal pull-up to
EN
1.8V)
4 RESET DI L506 RESET pin(internal pull-up to 1.8V)
LY
D
3.9.2 Power on sequence

Table 3-16 power on timing chart.
Ton Power on low level pulse 100 500 -- ms
Ton(status) Power on time(According to the 15 -- 25 s

STATUS pin judgment)
N
Ton(uart) Power on time (according the UART 10 -- 20 s

pin judgement)
O
VIH Input high level voltage of 1.17 1.8 2.1 V

PWRKEY pin
VIL Input low level voltage of PWRKEY -0.3 0 0.3 V
C
pin

L
A
Figures 3-17Power on Timing sequence
TI
Note: the STATUS pin can be used to identify whether has been power on, when the module has
FI NQ
access to electricity and initialization is completed, the STATUS output high level, or has
maintained low level.
EN
LY
3.9.3 Power off sequence

The following methods can be used to power down. These procedures will make module disconnect
D
from the network and allow the software to enter a safe state, and then save data before completely
powering the module off.
● Method 1: Power off L506 by pulling the PWRKEY pin down
● Method 2: Power off L506 by AT command “AT+CPOF”
●
N
Method 3: over-voltage or under-voltage automatic power down.

● Method 4: over-temperature or under-temperature automatic power down.
Note: 1. About the AT command “AT+CPOF” detail please refer document [1].
O
2. Over-voltage or under-voltage may cause automatic power down.

3. Over-temperature or under-temperature may cause automatic power down.
C
Table 3-17 Power off timing chart.

Toff The time of active low level 2.5 -- -- s
pulse on PWRKEY pin to power off
module
Toff(status The time from power-off issue to 6 -- -- s
) STATUS pin outputlow level
(indicating power off)
Toff(uart) The time from power-off issue to 6 -- -- s
UART port off
Toff-on The buffer time from power-off 0 -- -- V
issue to power-onissue
VIH Input high level voltage of 1.17 1.8 2.1 V

PWRKEY pin
VIL Input low level voltage of PWRKEY -0.3 0 0.3 V
pin
User can power off the L506 by pulling PWRKEY down to ground for a specific time. The power off
scenario is illustrated in the following figure.
L
A
TI
FI NQ
EN
Figures 3-18 Power off Timing sequence
LY
Note: the STATUS pin can be used to identify whether has been power on, when the module has
access to electricity and initialization is completed, the STATUS output high level, or has
D
maintained low level.
3.9.4 Reset sequence

L506 can lower module RESET pin to restart the module.
Table 3-18 Reset pin electrical properties
N
Symbol Net name Min. Typ. Max. Unit
Treset Reset pin low level hold time 50 100 500 ms

O
VIH Reset pin input high level 1.17 1.8 2.1 V
VIL Reset pin input low level -0.3 0 0.3 V

C
Note: it is recommended that only in an emergency, such as module without response, use the
RESET pin. In addition, under the module power off status the RESET pin is invalid.
3.9.5 Power on/off and reset interface application

RESIN_N
Pulse 81
4.7K
47K
POWER_ON_OFF
100
Pulse
4.7K
L
47K
A
L506
TI
FI NQ
Figure 3-19: Reference power on/off reset circuit
Another way to control the PWRKEY pin is directly using a push button switch. Need to set a button near the
EN
TVS to ESD protection. The image below for reference circuit:
LY
D
N
O
C
Figure 3-20: power on/off and reset recommended circuit (physical buttons)

3.10 Interactive interface

Table 3-19 list the interface is mainly with the application processor interactive interface, including
query, wake up four types, status indication, flight mode interface.
Table3-19Interactive interface
Pin No. Signal I/O type Descriptions
50 GPIO_2/WAKEUP_IN DI Default: GPIO
Optional: Input pin as wake up interrupt
L
signal to module from host.
A
52 GPIO_1/WAKEUP_OU Default:GPIO
T Optional: Output pin as the module wake up
the AP
TI
FI NQ
49 STATUS DO APinquire the module status
54 FLGHTMODE DI Pull up to 1.8V made the system enter in

EN
flight mode, at this mode will tune off all
the wireless function
45 GPIO_0 DO General GPIO module output (used for
LY
keyboard backlighting, etc.)

28 GPIO_3 I/O GPIO
D
3.10.2 interactive interface application

L506 provides three shook hands with application processor communication signals. Application
N
processor can query whether the module boot normal work through STATUS. Through the
WAKEUP_OUT query module is in sleep mode, and sleep in the module, through WAKEUP_IN
O
wake module. Similarly, when application processor in the sleep state, the L506 modules can through
WAKEUP_OUT wake application processor.
C
⚫ STATUS：Module sleep instructions, high level indicator to sleep, low level instructions for the
awakened state;
⚫ WAKEUP_IN： The host can lower the signal awakens the module，If, low level has maintained,
module can't sleep.
⚫ WAKEUP_OUT: when L506 need to communicate with the AP, module can be set this pin for low
level to awaken application processor.
⚫ FLGHTMODE：Through the external output high level module into flight mode;

FLIGHTMODE pin can be used to control module to enter or exit the flight mode. In flight mode, L506 internal
radio frequency circuit is closed. FLIGHTMODE reference circuit as shown in the figure below:
L
A
TI
FI NQ
EN
Figure 3-21:Flight mode recommended circuit (physical buttons)
LY
D
3.11 Net Light interface
3.11.1 Pin define

N
Table 3-20 LED pin definitions

Pin No. Net name I/Otype description
O
51 NETLIGHT DO Module net state identify control LED port

C
3.11.2 Net light application

The L506 module has 1 pins for controlling the LED display, which can be used as an indicator of
network connection status. Different network states are represented by the mode of the flashing light.
This pin is an GPIO，with An external NPN Transistor，External connect VBAT can directly drive
LED. Drive current capacity varies according to external NPN model ， recommend use
DTC143ZEBTL，Drive current biggest can reach 100 mA, below is the reference circuit.

VLED
LED
R1
L506
R2
Figure 3-22 Status indicator reference circuit
L
Note: R1, R2 value according to the voltage VLED and LED working current.
A
Table 3-21 NETLIGHT status
Net Status Module working status
Always on
TI Searching Network/Call Connect

FI NQ
200ms ON, 200ms OFF Data Transmit
EN
800ms ON, 800ms OFF Registered network
OFF Power off / Sleep

LY
Note: NETLIGHT output low level as “ON”, and high level as “OFF”.
D
3.12 SD card interface

N
3.12.1 Pin descriptions

O
L506provides a 4-bit SD/MMC interface with clock rate up to 52MHz. The operation voltage of
MMC/SD interface is 2.85V with SD/MMC memory cards up to 128G(FAT4), which is compatible
with SDIO Card Specification (version 3.0), Secure Digital (Physical Layer Specification, version 3.0)
C
and Multimedia Card Host Specification MMC (version 4.4)
Table 3-22 SD characteristics

VDD_EXT** LDO output - 2.85 - V
High-level input 0.625*VDD_

VIH - VDD_EXT+0.3 V
voltage EXT
Low-level input 0.25*VDD_EX
VIL -0.3 0 V
voltage T

High-level output 2.75*VDD_E

VOH 2.85 VDD_EXT V
voltage XT
Low-level output 0.125*VDD_E
VOL 0 0 V
voltage XT
SD card I/O load capacity for linear output displacement, concrete can be calculated according to the
following chart;
L
A
TI
Figure 3-23 VOL/VOH IV curve
FI NQ
EN
3.12.2 SD card interface design guideline
L506 VDD_EXT for external SD card interface ofpower supply, in the card slot position should add
LY
the ESD protection circuit; If you need to support SD hot plug design need to add SD_DET signals.
Due to the default hot plug pin of L506 check for low level to identify the card insert status, so you
D
need to choose the detect PIN connected to the ground when SD card is inserted into the SD slot,
below is the reference circuit.
N
O
C
Figure 3-24SD card recommended circuit

3.12.3 SD card signal PCB line rules

Due to the SD signal is the high-speed digital interface, so it’s layout rules should be in accordance
with the high speed digital rules.
1.Protect other sensitive signals/circuits from SDC corruption.
2. Protect SDC signals from noisy signals (clocks, SMPS, etc.).
3. 50 Ω nominal, ±10% trace impedance.
4. CLK to DATA/CMD length matching < 1 mm.
5. Total routing length < 50 mm recommended.
6. Spacing to all other signals = 2x line width.6 Bus capacitance < 15 pF.
L
3.13 System boot configuration and download
A
TI
L506 can configure BOOT_CONFIG (Boot Configuration) pin to Configuration module power-on
FI NQ
mode and the forced entry USB download mode.
EN
LY
D
Table 3-23 Boot configurationand force USB download

N
Pin No. Net name Function description note

85 BOOT_CFG0 Pull up this pin change boot
O
configurationregister value
87 BOOT_CFG1 Pull up this pin change boot
C
configurationregister value
84 COEX2(Syste FOCE_USB_BOOT( Pull up this pin change boot Multiplex
m on) before system configurationregister value pin
on)
3.13.2 Boot configuration and force USB interface application

1.8V
SW1
COEX2/FORCE_USB_BOOT
10K
SW2
BOOT_CFG0
SW3
BOOT_CFG0
L
L506
A
Figure 3-25boot configuration and force USB download recommended circuit
TI
FI NQ
3.14 WIFI interface (WIFI edition)

EN
3.14.1 WIFI interface definition
LY
L506 WIFI edition definition as below

D
Table 3-24 WIFI interface definition

PIN Net name Description Region
33 SDC1_DATA0
29 SDC1_DATA1
N
27 SDC1_DATA2
SDIO CPU
31 SDC1_DATA3
O
32 SDC1_CMD
36 SDC1_CLK
C
30 WLAN_EN WIFI module enable control CPU
83 COEX1 COEX_UART_TX, LTE and WIFI CPU

coexistence synchronization
84 COEX2 COEX_UART_RX, LTE and WIFI CPU
coexistence synchronization
35 WLAN_32K_SLEE WLAN Clock PMIC
P_CLK
15 VDD_1.8V PMIC （ VREG_L11_1P8 ） LDO PMIC
1.8Voutput, power supply to WLAN

SDIO 1.8V
34 VREG_L2_1V8 PMIC LDO 1.8V output power supply PMIC

to WLAN VDDIO_XTAL
3.14.2 WIFI interface application

L506 default support QCA9377, application diagram is as follows:
⚫ This reference based on QCA9377 do external WLAN.
⚫ Because of WLAN chip on electric timing and power supply capacity, L506 pin 34, pin 15 both are 1.8 V
LDO output, but they cannot mix use.
⚫ Figure 3-27(a) TPS22921YFPR and ISL91127 WLAN3.3 V power solutions, customers can also choose
L
other DCDC power supply, ensure WLAN3.3 V power supply capacity is greater than 600 mA
⚫ Figure 3-?(b) is the MOBILETEK WIFI module WM1601 application, detail please refer 《L506 reference
A
design》.
33 PIN
TI 29 PIN
FI NQ
27 PIN
31 PIN
32 PIN
36 PIN
EN
30 PIN
L506
LY
83 PIN
84 PIN
D
35 PIN
34 PIN
15 PIN 42 PIN 15 PIN
N
O
Figure 3-26WIFI interface application circuit (Base on QCA9377)

C

L506
(WIFI PORT) WM1601
SDC1 SDIO SDIO
WLAN_EN WLAN_EN
COEX2(RX) COEX2
COEX1(TX) COEX1
WLAN_32K_SLEEP_CLK 32K_CLK_IN
VREG_L2_1P8 L2_1V8
VREG_L11_1P8 L11_1V8
GPIO# WLAN_RST
L
GPIO# WAKEUP_OUT
GPIO# WLAN_RF_KILL
WLAN_3V3
WIFI3V3_EN
A
TI DCDC/LDO
FI NQ
(600mA CurrentLoading)
EN
Figure 3-27WIFI interface application circuit (MOBILTEK WM1601)
LY
3.15 Analog and Digital conversion (ADC) interface

D
L506 integrated two analog-to-digital conversion interface, specific parameters are as follows:
Table 3-25 ADC1, ADC2 characters

characters Min. Typ. Max. Unit
N
ADCresolution -- 15 -- Bits
Transfer time -- 442 -- ms

O
Input voltage range 0.3 -- VBAT V
Input resistance 1 -- -- MΩ
C
Note: 1. use "AT + CADC" and "AT + CADC2" can read ADC1 and ADC2 voltage on the pin.
More information please refer to the document [1].
2. The need for special software version to support access to the ADC.
3.16 I2C interface
3.16.1 I2C pin definition

I2C is used to communicate with peripheral equipment and can be operated as either a transmitter or
receiver, depending on the device function. Both SDA and SCL are bidirectional lines connected with
I2C interface. Its operation voltage is 1.8V. High speed mode transmission rate can reach 400 KBPS,
Because L506 have internal pulled up to the I2C interface, so in your design needn’t pull up. Figure
3-15 is the reference design:
L
A
TI
Figure 3-28 I2C reference design
FI NQ
Note: 1. L506 I2C only support host mode.
2. Only special software version support inquire the I2C.
EN
3.17 Antenna interface
LY
D
3.17.1 RF signal PCB layout guide

L506 provides RF antenna interface. Customer’s antenna should be located in the host board and
connected to module’s antenna pad through micro-strip line or other types of RF trace and the trace
impedance must be controlled in 50Ω. we recommends that the total insertion loss between the
antenna pad and antenna should meet the following requirements:
N
● GSM900/GSM850<0.5dB
O
● DCS1800/PCS1900 <0.9dB
● WCDMA 2100/1900<0.9dB
● WCDMA 900/850<0.5 dB
C
● TDSCDMA 900/850<0.5dB
● CDMA BC0<0.5dB
● LTE (F<1GHz) <0.5dB
● LTE (1GHz<F<2GHz) <0.9dB
● LTE (2GHz<F) <1.2dB
To facilitate the antenna tuning and certification test, a RF connector and an antenna matching
circuitshould be added. The following figure is the recommended circuit.
The antenna feed point is defined as shown in below table：
Table 3-26 antenna pin definition

Pin No. Signal I/O Typ. Description
82 MAIN_ANT AI/AO Module main antenna
59 AUX_ANT AI LTE diversity antenna feed point
79 GNSS_ANT AI GNSSantenna feeder connector
3.17.2 applications
For convenience of antenna tuning and certification test, should increase RF connectors and the
antenna matching circuit, below is a recommended circuit:
L
A
TI
FI NQ
EN
LY
D
Figure 3-29Main antenna matching circuit diagram（MAIN_ANT）
In this figure, the components R1, C1, C2 and R2 is used for antenna matching, the value of
N
components can only be got after the antenna tuning, usually, they are provided by antenna vendor. By
default, the R1, R2 are 0 Ohm resistors, and the C1, C2 are reserved for tuning.
O
The RF test connector in the figure is used for the conducted RF performance test, and should be
placed as close as to the module’s antenna pin. The traces impedance between components must be
controlled in 50ohm.
C

L
A
Figure 3-30 LTE Diversity antenna matching circuit diagram（AUX_ANT）
Note：LTE diversity antenna recommend leaving. Because there are many high frequencies of TDD
TI
LTE design, such as band38 band40 and Band41. Due to the high insertion loss RF line, if there is no
FI NQ
diversity antenna, receiving sensitivity of the spectrum in the certification will be a risk.
EN
LY
D
N
O
Figure 3-32GNSS passive antenna matching circuit diagram（GNSS_ANT）
In above figures, the components C1 and L1, L2 are used for antenna matching, the values of the
C
components can only be obtained after the antenna tuning usually, and they are provided by antenna
vendor. GNSS can be used by NMEA port. User can select NMEA as output through UART or USB.
NMEA sentences are automatic and no command is provided. NMEA sentences include GSV, GGA,
RMC, GSA, and VTG. Before using GNSS, user should configure L506 in proper operating mode by
AT command.
Please refer to related document for details. L506 can also get position location information through
AT directly.
In the diagram above, component C1, L1 and L2 for antenna match, the element's value depends on
the antenna after debugging. In figure 3-18, C2 for dc isolation. In the active antenna circuit, the user
must use an external "/ DCDC VDD voltage, its value should be according to the properties of the
active antenna, VDD can close to avoid without additional current consumption when using GNSS. In
figure 3-19, the user can increase a external LNA gain to get better.
L506 merges GNSS (GPS/GLONASS) satellite and network information to provide a high-availability
solution that offers industry-leading accuracy and performance. This solution performs well, even in
very challenging environmental conditions where conventional GNSS receivers fail, and provides a
platform to enable wireless operators to address both location-based services and emergency
mandates.
●Tracking sensitivity:-159 dBm（GPS） -158 dBm（GLONASS）
●AcquisitionSensitivity: -148dBm
●Cold-start sensitivity:-142 dBm
●CN:C/N0 = S - (-170) S= Input Signal Intensity
●Accuracy (Open Sky): 2.5m (CEP50)
●TTFF (Open Sky:) Hot start <1s Cold start 35s
L
●Receiver Type:16-channel, C/A Code
●GPS L1 Frequency:1575.42±1.023MHz
A
●GLONASS: 1597.5~1605.8 MHz
●BEIDOU: 1559.05~1563.14 MHz
TI
●Update rate Default:1 Hz
FI NQ
●GNSS data format:NMEA-0183
●GNSS Current consumption (WCDMA/GSM Sleep mode): 100mA (Total supply current)
EN
Antenna Layout guideline
LY
In layout design, antenna RF transmission line must ensure the characteristic impedance = 50 ohm.
The characteristic impedance depend on substrate board, line width and the distance from the ground
D
plane. As shown in figure 3-20 is the layout of antenna feed point of reference for clearance area.
N
O
C
Figure 3-33 antenna feed point

4 Product characteristics
4.1 Absolute parameters

The following table shows the state of the absolute maximum work in abnormal situation.Exceed the limit
value will likely result in permanent damage to the module.
Table 4-1L506 absolute parameters

Parameter Min. Max. Unit
VBAT absolute voltage parameter -0.5 6.0 V
L
USB_VBUSabsolute voltage parameter -0.5 5.25 V
A
I/O absolute voltage parameter： -0.3 2.1 V
PWRKEY,RESET,SPI,GPIO,I2C,PCM,UART,SD1_DET,USIM_DET
I/O absolute voltage parameter： -0.3 3.05 V
TI
FI NQ
SD and USIM
EN
LY
4.2 Operation condition

D
4.2.1 Operation voltage

This product is a DC input voltage range of 3.4 V to 4.2 V, the typical value of 3.8 V, as s
hown in below table.
N
Table 4-2 Input DC voltage

Parameter Min. Typ. Max. Unit
O
VBAT Voltage 3.4 3.8 4.2 V
USB_VBUS Votage 2.0 5.0 5.25 V

C
About L506 dc electric property, please refer to part 3.3 digital I/O characteristics.
4.2.2 Work mode

Table 4-3 work mode
Mode Description
(GSM/WCDMA In this case, the current consumption of module
Normal operation /TD-SCDMA/EVDO/LTE) will bereduced to the minimal level.
mode Sleep In sleep mode, the module can still receive paging
message and SMS.

(GSM/WCDMA Software is active. Module is registered to the

/TD-SCDMA/EVDO/LTE) GSM/WCDMA/TD-SCDMA/EVDO/LTE network, andthe
Idle module is ready to communicate.
(GSM/WCDMA Connection between two subscribers is in progress.
/TD-SCDMA/EVDO) In thiscase, the power consumption depends on
taking network settings such as DTX off/on, FR/EFR/HR,
hopping sequences, antenna.
(GPRS/EDGE/WCDMA/TD Module is ready
-SCDMA/EVDO/LTE)Sta forGPRS/EDGE/WCDMA/TD-SCDMA/EVDO/LTE
ndby data transfer, but no data is currently sent or
received. Inthis case, power consumption depends
L
on network settings and EDGE/HSPA+ /LTE
configuration.
A
(GPRS/EDGE/WCDMA/TD There isGPRS/EDGE/WCDMA/TD-SCDMA/EVDO/LTE
-SCDMA/EVDO/LTE)Dat data transfer in progress. In this case, power
a transfer consumptionis related to network settings (e.g.
TI
FI NQ
power control level); uplink/downlink data rates
and GPRS configuration (e.g. used multi-slot
settings).
EN
Minimum mode AT command “AT+CFUN” can be used to set the module
to a minimumfunctionality mode without removing
LY
the power supply. In this mode, the RF

part of the module will not work or the USIM card
D
will not be accessible, orboth RF part and USIM card

will be closed, and the serial port is still
accessible. The power consumption in this mode is
lower than normal mode.
Flight mode Use the "AT + CFUN = 7" command or lower FLIGHTMODE
N
pins, the module can be configured to flight mode

under without removing the power supply condition.
O
In this case, the RF part does not work, but still

can use the serial port and USB, the power
consumption is lower than normal working mode.
C
Power off Through the "AT + CPOF" command or lower PWRKEY pin
can power off L506. At this mode, the module of
internal power supply will be closed, and the
system is stop running also. The UART and USB are
unavailable.
Sleep mode In sleep mode, the module power consumption to a
minimum, but the module is still able to receive
paging information and SMS.

4.2.3 current consumption

The power consumption in suspended mode and without USB connection is listed in the table below.
Table 4-4 working current consumption (VBAT=3.8V)

GNSS (Without USB)
（AT+CFUN=0） @ -140dBm，Positioning, Typical：72mA
Power off
Power off current 20uA
GSM Sleep/Idle
GSM/GPRS supply current Sleep mode @ BS_PA_MFRMS=2 Typical:3mA
L
（GNSS off，without USB） Idle mode @ BS_PA_MFRMS=2 Typical：20mA
UMTS sleep/idle
A
WCDMA current Sleep mode @DRX=9 typical：3.6mA
（GNSS off，without USB） Idle mode @DRX=9 typical：19mA
TD-SCDMA current
TI Sleep modetypical：4mA
FI NQ
（GNSS off，without USB） Idle modetypical：20mA
EVDO current Sleep modetypical：3.8mA
EN
（GNSS off，without USB） Idle mode typical：20mA
LTE Sleep/Idle
LY
LTE supply current Sleep mode typical：3.8mA

（GNSS off，without USB） Idle mode typical：TBD
D
GSM Talking
GSM 900 @Power level #5 typical：254mA
DCS1800 @Power level #0 typical：182mA
UMTS Talking
N
WCDMA B1 @power 24dBm typical：565mA

O

C
TD-SCDMA 1900 @power 24dBm typical：150mA
TD-SCDMA 2000 @power 24dBm typical：143mA
CDMA BC0 @power 24dBm typical：TBD
GPRS Data transmission
GSM 900 @power level #5 typical：460mA

( 1RX,4 TX)
DCS1800 @power level #0 typical：425mA
( 1RX,4 TX)

GSM 900 @power level #5 typical：360mA

( 3RX, 2TX)
DCS1800 @power level #0typical：267mA
( 3RX, 2TX)
EDGE Data transmission
GSM 900 @power level #8typical：210mA

( 1RX,4 TX)
( 1RX,4 TX)
GSM 900 @power level #8typical：317mA
( 3RX, 2TX)
L
( 3RX, 2TX)
A
HSDPA Data transmission
TI
FI NQ

EN
LY
TD-SCDMA Data transmission
TDSCDMA 1900 @power 24dBm typical：141mA

D
TDSCDMA 2000 @power 24dBm typical：149mA
EVDO Data transmission
BC0 @power 24dBm typical：500mA
LTE Data transmission

N
LTE-FDD B1 @5Mbps typical：716mA

@10Mbps typical：722mA
O
C


LTE-FDD B8 5Mbps typical：591mA
L
LTE-FDD B20 typical：600mA
LTE-TDD B38 @5Mbps typical：420mA
A
TI
FI NQ
EN
LY
D
N
4.3 Working and storage temperature

The operating temperature and storage temperature of L506 is listed in the following table.
O
Table 4-5Operating temperature

C
Parameter Typ. Max. Unit

Min.
Normal operation
-30 25 80 ℃
temperature
Extended operation
-40 25 85 ℃
temperature*
Storage temperature -45 25 90 ℃
*Note: Module is able to make and receive voice calls, data calls, SMS and make
GPRS/WCDMA/HSPA+/LTE traffic in -40℃~ +85℃. Temperatures outside of the range -30℃~
+80℃might slightly deviate from ETSI specifications.

4.4 ESD performance

L506 is electrostatic sensitive device, therefore, the user in the production, assembly and operation of
the module must pay attention to the electrostatic protection. L506 ESD performance parameters in the
following table:
Table 4-6ESD performance parameters (temperature 25 ℃, humidity: 45%)
Net contact air
VBAT GND ±5KV ±10KV
Antenna port ±4KV ±8KV
UART ±2KV ±4KV
L
USB ±3KV ±6KV
Other PADS ±2KV ±4KV
A
TI
FI NQ
EN
LY
D
N
O
C

5 Design guideline
This chapter provides a general design of the products instruction, the user can refer to design
guidance for design, make products to achieve better performance.
5.1 General design rules and requirements

Users in the design of this product is peripheral circuit, the first to ensure the external power supply
circuit can provide enough power supply capacity, And the requirements for high speed signal lines
L
USB control 90 ohm + / - 10% difference impedance. For general signal interface, require the user to
us in strict accordance with the requirements of design, in line with the interface signal level matching,
A
in case the level of damage to the module. This product its own radio frequency index is good,
customers need to design in accordance with the requirements the mainboard side antenna circuit and
TI
corresponding impedance control, otherwise it will affect the whole RF index.
FI NQ
EN
5.2 Reference circuit
LY
Request system board VPH_PWR side power supply ability of power supply to achieve more than 2 A,
meet the demand of modules, peak current, and the system side the power of the average current will
D
reach more than 0.9 A. System board side power supply cord shall ensure enough line width, and
wants to form a good return with the ground plane, moreover should increase in the power supply
circuit design the method of micro level energy storage capacitor, guarantee the instantaneous power
supply capacity, and the power supply ripple control within the 100 mv, the specific function of each
N
functional module can be found in the corresponding description, overall reference circuit design
please refer《L506 reference design》.
O
C
5.3 RF part design guideline
5.3.1 Early antenna design considerations

⚫ Pre-project evaluation
The selection of the antenna position must first ensure that the antenna and the base station are kept in
the horizontal direction, this produces the highest efficiency; Secondly, try to avoid placing the switch
in the power supply or data line, chip and other devices or chips that produce electromagnetic
interference. At the same time, the position of the hand can be avoided, so as to prevent the human

body to produce attenuation; But also to reduce the radiation and the structure of the realization of the
need to take into account. So, At the beginning of the design need to structure, ID, circuit, antenna
engineers together to evaluate the layout.
⚫ Antenna matching circuit
If the module's radio frequency port and the antenna interface need to be transferred, the main board
circuit design, The design of microstrip line or strip line between the module RF test base and the
antenna interface between the microstrip line or the strip line by characteristic impedance 50 ohm, at
the same time, reserved double L type matching circuit; If the antenna's RF connector can be directly
stuck in the module's RF test base, can save the module of the RF port and the antenna interface
between the transfer.
L
A
5.4 EMC and ESD design advice
TI
FI NQ
Users should take full account of the EMC problem caused by signal integrity and power integrity in
the design of the whole machine, In the module of the peripheral circuit layout, for power and signal
EN
lines, etc., to maintain the spacing of 2 times line width. Can effectively reduce the coupling between
the signal, so that the signal has a clean, the return path. When the peripheral power supply circuit is
designed, the decoupling capacitor should be placed close to the module power supply pin, High
LY
frequency high speed circuit and sensitive circuit should be far from the edge of PCB, and the layout
D
of the layout as far as possible to reduce the interference between each other, and the sensitive signal is
protected. The circuit or device that may interfere with the operation of the system board is designed.
This product is embedded in the system board side, design, need to pay attention to the ESD protection,
the key input and output signal interface, such as (U) SIM card interface need to be placed close to the
protection of ESD devices. In addition to the motherboard side, the user is required to design the
N
structure and PCB layout, ensure that the metal shield is fully grounded, and set up an unobstructed
discharge passage for the electrostatic discharge.
O
C
5.5 PCB Recommended land pattern
We recommend that users in the design of main board PCB DEF，In the middle of the 12 geothermal
solder design according to size in below figure. Recommended at 87 of peripheral signal pads to the
module with a length of 1.0 mm.Recommended PCB pads as shown in below.

L
A
TI
FI NQ
EN
LY
D
Figure 5-1RECOMMENDED LAND PATTERN (Unit: mm)（detail A）

N
O
C

L
A
TI
FI NQ
EN
LY
Figure 5-2RECOMMENDED LAND PATTERN (Unit: mm)（detail B）

D
5.6 Products recommended upgrade

N
L506 default through the USB firmware updates, so products to facilitate the software update, when
the design proposal to set aside the USB test points or interface to facilitate subsequent product of the
O
firmware upgrade.
C

6 Manufacturers
6.1 Steel mesh design

⚫ At the bottom of the module pad thermal, can be reduced by way of steel mesh
openings, reduce the risk of short circuit between the thermal and the module of the module Pin, have
certain effect;
⚫ Module pad thermal welded steel mesh openings are recommended for reference. Figure
6-1 and Figure 6-2 is recommended for steel mesh and size.
L
A
TI
FI NQ
EN
LY
D
N
O
C
Figure 6-11Steel mesh (unit mm)(detail A)

L
A
TI
FI NQ
EN
LY
D
Figure 6-2 Steel mesh (unit mm) (detail B)

Note: The direction mark point only for identify the pin 1 position, should not embody in the steel
mesh file.
N
6.2 Temperature curve

O
In order to ensure soldering quality, special attention should be paid to the control of temperature
curve pipes. The soldering profile shown below is only a general recommendation and should be
C
adjusted according to the specific application and manufacturing.

L
A
Figure 6-3 The reference temperature curve
TI
FI NQ
6.3 The Moisture Sensitivity Level (MSL)
EN
L506 module complies with the humidity level 3. At a temperature of <30 degrees and relative
humidity of <60% of the environmental conditions, dry pack to perform J-STD-020C specification
according to IPC / JEDEC standard. At a temperature of <40 degrees and a relative humidity of <90%
LY
of the environmental conditions, in the case of unopened shelf life of at least six months. After
unpacking, Table 6-2 shows the module shelf life at different times corresponding to the level of
D
humidity.
Table6-2: Moisture sensitivity level and floor life
The Moisture Sensitivity Level Floor Life(out of bag) at factory ambient≦+30
(MSL) /60%RH
1 Unlimited at ≦+30 /85%
N
2 1 Year
2a 4 weeks
O
3 168 hours
4 72 hours
C
5 48 hours
5a 24 hours
Mandatory bake before use. After bake,it must be

6 reflowed within the time limit specified on the
label.
After unpacking,<30 degrees in temperature and relative humidity <60% environmental conditions,
168 hours in the SMT patch. If not meet the above conditions need to be baked.

NOTES: For product handling, storage, processing, IPC / JEDEC J-STD-020C must be
followed
6.4 Baking Requirements

Due to the humidity sensitive characteristics of the L506 module, the L506 is a vacuum packaging,
which can be stored for 6 months without damage to the package, and the ambient temperature is less
than 40 C and the relative humidity is less than 90%. To meet one of the following conditions, the
L
process of reflow soldering should be performed before the full bake (if trays are used, please note
whether the tray is heat-resistant.), or the module may cause permanent damage to the process.
A
1、Vacuum packing damage or leakage
2、The module is exposed in the air for 168 hours or more
3、The module is exposed in air for 168 hours, not meet the temperature <30 degrees and
TI
FI NQ
relative humidity of the environment conditions <60%
EN
Table6-3:Baking requirements
Baking temperature Humidity Baking time
LY
120°C±5°C <5% 4 Hours

D
Note: The original packaging of the module cannot bear the high temperature of baking. The
packaging needs to be removed before baking, otherwise the packaging will be damaged.
N
O
C

7 Package Storage information
7.1 Package information
7.1.1 Tape and reel information
L
A
TI
FI NQ
EN
LY
D
N
Figure 7-1 Tape and reel information

O
7.1.1 Package information

C
L506 packing diagram is as follows, every 4 volumes of material packed in a case between each
volume of material has a bubble mat do isolation protection. Specific as shown in the figure below:

L
A
TI
FI NQ
EN
Figure 7-2 Package and ship information
LY
7.2 Bagged storage conditions

D
L506 shipments in the form of vacuum sealing anti-static bag. Module of storage need to follow the
following conditions: Environment below 40 Degrees Celsius temperature, air humidity is less than
90% of cases, the module can be in vacuum sealed bags for 12 months. Conditions set the storage
environment Suggestions with reference to the following form.
N
Table 7-1 Storage conditions (less than 90% humidity of the air vacuum sealed packaging)
Parameter Min. Typ. Max. Unit
Storage -45 25 90 ℃
O
temperature
When on the vacuum bags, if meet the following conditions, the module can be directly for reflow
C
soldering (furnace temperature setting reference 6.2 furnace temperature curve) or other high
temperature process:
⚫ Module temperature below 30 degrees c, the air humidity is less than 60%, factory within 72
hours to complete the SMT.
⚫ The humidity is less than 10%.
If the module is in the following conditions, to be baked before SMT:
⚫ When the environment temperature is 23 degrees Celsius (allow upper and lower volatility of 5
degrees Celsius), humidity index greater than 10%.
⚫ When open vacuum bags, module temperature below 30 degrees Celsius, air humidity is less than
60%, but the factory have not finished the SMT within 72 hours.
⚫ When open the vacuum bags, module storage air humidity is more than 10%.
8 Safety Information
For the reasonable usage of the module, please comply with all these safety notices of this page. The
product manufacturers should send followed safety information to user, operator or product’s spec.
The devices using the module may disturb some electronic equipment. Put
the module away from the phone, TV, radio and automation equipment to
avoid the module and the equipment to interfere with each other.
Shut down the mobile device or change to flying mode before boarding. The
Using of wireless appliances in an aircraft is forbidden to avoid the
interference, or else cause to unsafe flying, even violate the law.
L
In hospital or health care center, switch off the mobile devices. RF
interference may damage the medical devices, like hearing-aid, cochlear
A
implant and heart pacemaker etc.
Mobile devices can’t guarantee to connect in all conditions, like no fee or
TI
with an invalid SIM card. When you need emergent help, please remember
FI NQ
using emergency calls and make sure your device power on in an area with
well signal.
EN
Put the module away from inflammable gases. Switch off the mobile device
when close to gas station, oil depot, chemical plant etc.
LY
The module is not water proof. Please don’t use the module in the area with
D
high humidity like bathroom, which will decelerate the physical performance,
insulation resistance and mechanical strength.
Non-professionals can’t teardown the module which will damage it. Refer to
the specification or communicate the related staffs to repair and maintain it.
N
Please switch on the module before cleaning. The staffs should be equipped
O
with anti-ESD clothing and gloves.

C
The users and product manufacturers should abide by the national law of wireless modules and devices.
If not, Mobiletek will not respond the related damages.

L506 Hardware Design: LTE Module Series Version V2.7 Date 2020-02-29

Uploaded by

Copyright:

Available Formats

L506 Hardware Design: LTE Module Series Version V2.7 Date 2020-02-29

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

L506 Hardware Design: LTE Module Series Version V2.7 Date 2020-02-29

Uploaded by

Copyright:

Available Formats

L506 Hardware Design

L506 Hardware Design

LTE Module Series

Copyright© Shanghai Mobiletek Communication Ltd 1

ACCURACY, RELIABILITY OR CONTENTS OF THIS MANUAL.

SHANGHAI MOBILETEKCOMMUNICATION LTD BE LIABLE FOR ANY SPECIAL,

Copyright© Shanghai Mobiletek Communication Ltd 2

2016-03-09 V1.0 Initial

2016-06-02 V1.1 Add UART design description

2016-06-25 V1.2 Update Stencil file

2016-06-28 V1.3 Update Figure information

2016-06-29 V1.4 Update RF parameter

2018-04-29 V1.9 Update Product Model

2018-11-10 V2.0 Update product baking instructions

2018-11-15 V2.1 Added L506X series

2018-11-21 V2.2 Update product model information

2018-12-26 V2.3 Update product Pin information

2019-07-26 V2.4 Added L506X(G) series

2019-09-29 V2.5 Update PCM description

2019-11-13 V2.6 Added L506SC series

2020-02-29 V2.7 Update edge and gprs spec

Copyright© Shanghai Mobiletek Communication Ltd 3

1 ABOUT THIS DOCUMENT ...................................... 7

2 PRODUCT OVERVIEW ......................................... 9

3 INTERFACE DESCRIPTION ................................... 20

3.1.2 Pin Map ................................................................ 20

3.2 Operating condition ............................................................................................................................. 27

3.4.4 Recommended Power supply circuit ....................................... 31

3.5 USIM interface ....................................................................................................................................... 32

3.5.3 USIM interface reference circuit ....................................... 33

3.9.1 Pin definition ......................................................... 41

3.16 I2C interface......................................................................................................................................... 52

3.17 Antenna interface ................................................................................................................................. 53

4 PRODUCT CHARACTERISTICS ................................. 57

4.1 Absolute parameters .............................................................................................................................. 57

4.2 Operation condition ............................................................................................................................... 57

4.2.3 current consumption .................................................... 59

5 DESIGN GUIDELINE ........................................ 63

5.5 PCB Recommended land pattern ......................................................................................................... 64

7 PACKAGE STORAGE INFORMATION ............................. 71

8 SAFETY INFORMATION ...................................... 73

Copyright© Shanghai Mobiletek Communication Ltd 6

1 About this document

1.1 Applicable scope

1.3 Support and reference documents list

1 《L506AT Command User Guide》

Copyright© Shanghai Mobiletek Communication Ltd 7

1.4 Terms and Abbreviations

Table 1-2 is the Document relative Terms and Abbreviations。

Table1-2Terms and Abbreviations

USB Universal Serial Bus

UART Universal Asynchronous Receiver Transmitter

USIM UniversalSubscriber Identification Module

LED Light Emitting Diode

GPIO General-purpose Input/Output

GSM Global Standard for Mobile Communications

GPRS General Packet Radio Service

WCDMA Wideband Code Division Multi Access

UMTS Universal Mobile Telecommunication System