pnpn and Other Devices

17
CHAPTER OBJECTIVES
●
To become familiar with the characteristics and areas of application of
● Silicon-controlled rectifiers (SCRs)
● Silicon-controlled switches (SCSs)
● Gate turn-off switches (GTO)
● Light-activated SCRs (LSCR)
● Shockley diodes and diacs
● Triacs
● Phototransistors and opto-isolators
● Unijunction and programmable unijunction transistors

17.1 INTRODUCTION
●
In Chapter 17, a number of important devices not discussed in detail in earlier chapters are
introduced. The two-layer semiconductor diode has led to three-, four-, and even five-layer
devices. A family of four-layer pnpn devices will first be considered: the SCR (silicon-
controlled rectifier), the SCS (silicon-controlled switch), the GTO (gate turn-off switch),
the LASCR (light-activated SCR), and then an increasingly important device—the UJT
(unijunction transistor). Those four-layer devices with a control mechanism are commonly
referred to as thyristors, although the term is most frequently applied to the SCR. The
chapter closes with an introduction to the phototransistor, opto-isolators, and the PUT
(programmable unijunction transistor).

pnpn DEVICES
17.2 SILICON-CONTROLLED RECTIFIER
●
Within the family of pnpn devices, the silicon-controlled rectifier is of greatest interest. It
was first introduced in 1956 by Bell Telephone Laboratories. Some of the more common
areas of application for SCRs include relay controls, time-delay circuits, regulated power
suppliers, static switches, motor controls, choppers, inverters, cycloconverters, battery
chargers, protective circuits, heater controls, and phase controls.
In recent years, SCRs have been designed to control powers as high as 10 MW with
individual ratings as high as 2000 A at 1800 V. Its frequency range of application has also
been extended to about 50 kHz, permitting some high-frequency applications such as induc-
tion heating and ultrasonic cleaning.

841
842 pnpn AND OTHER 17.3 BASIC SILICON-CONTROLLED
DEVICES
RECTIFIER OPERATION
●
As the terminology indicates, the SCR is a rectifier constructed of silicon material with a
third terminal for control purposes. Silicon was chosen because of its high temperature and
power capabilities. The basic operation of the SCR is different from that of the fundamen-
tal two-layer semiconductor diode in that a third terminal, called a gate, determines when
the rectifier switches from the open-circuit to the short-circuit state. It is not enough to
simply forward-bias the anode-to-cathode region of the device. In the conduction region,
the dynamic resistance of the SCR is typically 0.01 Æ to 0.1 Æ. The reverse resistance is
typically 100 kÆ or more.
The graphic symbol for the SCR is shown in Fig. 17.1 with the corresponding connections
to the four-layer semiconductor structure. As indicated in Fig. 17.1a, if forward conduction is
to be established, the anode must be positive with respect to the cathode. This is not, however,
a sufficient criterion for turning the device on. A pulse of sufficient magnitude must also be
applied to the gate to establish a turn-on gate current, represented symbolically by IGT.
A more detailed examination of the basic operation of an SCR is best effected by split-
ting the four-layer pnpn structure of Fig. 17.1b into two three-layer transistor structures as
shown in Fig. 17.2a and then considering the resultant circuit of Fig. 17.2b.
Note that one transistor for Fig. 17.2 is an npn device, whereas the other is a pnp transis-
tor. For discussion purposes, the signal shown in Fig. 17.3a will be applied to the gate of
the circuit of Fig. 17.2b. During the interval 0 S t1, Vgate = 0 V, the circuit of Fig. 17.2b
will appear as shown in Fig. 17.3b (Vgate = 0 V is equivalent to the gate terminal being
FIG. 17.1 grounded as shown in the figure). For VBE2 = Vgate = 0 V, the base current IB2 = 0, and
(a) SCR symbol; (b) basic IC2 will be approximately ICO. The base current of Q1, IB1 = IC2 = ICO, is too small to
construction. turn Q1 on. Both transistors are therefore in the “off” state, resulting in a high impedance
between the collector and the emitter of each transistor and the open-circuit representation
for the controlled rectifier as shown in Fig. 17.3c.
At t = t1, a pulse of VG volts will appear at the SCR gate. The circuit conditions established
with this input are shown in Fig. 17.4a. The potential VG was chosen sufficiently large to
turn Q2 on (VBE2 = VG). The collector current of Q2 will then rise to a value sufficiently
large to turn Q1 on (IB1 = IC2). As Q1 turns on, IC1 will increase, resulting in a corresponding
increase in IB2. The increase in base current for Q2 will result in a further increase in IC2. The
net result is a regenerative increase in the collector current of each transistor. The resulting
anode-to-cathode resistance (RSCR = V>IA) is then small because IA is large, resulting in the
short-circuit representation for the SCR as indicated in Fig. 17.4b. The regenerative action
described above results in SCRs having typical turn-on times of 0.1 ms to 1 ms. However,
high-power devices in the range 100 A to 400 A may have 10- to 25-ms turn-on times.
In addition to gate triggering, SCRs can also be turned on by significantly raising the
temperature of the device or raising the anode-to-cathode voltage to the breakover value
shown on the characteristics of Fig. 17.7.

V V
Vgate E1 E1
IA ≅ ICO
IB1
VG
Q1

t3 t4 High impedance
–VG IC2 = ICO (open-circuit)
t1 t2 IB2
approximation
Vgate = 0 V Q2
+
VBE2
– E2 E2

(a) (b) (c)

FIG. 17.2
SCR two-transistor equivalent FIG. 17.3
circuit. “Off” state of the SCR.
 The next question of concern is: How long is the turn-off time and how is turn-off ac- SCR CHARACTERISTICS 843
complished? An SCR cannot be turned off by simply removing the gate signal, and only AND RATINGS
a special few can be turned off by applying a negative pulse to the gate terminal as shown
in Fig. 17.3a at t = t3. V
The two general methods for turning off an SCR are categorized as anode current IA
interruption and forced commutation. E1

The two possibilities for current interruption are shown in Fig. 17.5. In Fig. 17.5a, IA is IB1
zero when the switch is opened (series interruption), whereas in Fig. 17.5b, the same con- Q1
dition is established when the switch is closed (shunt interruption).
Forced commutation is the “forcing” of current through the SCR in the direction oppo- IC1
IC 2
site to forward conduction. There is a wide variety of circuits for performing this function, IB2
a number of which can be found in the manuals of major manufacturers in this area. One + Q2
of the more basic types is shown in Fig. 17.6. As indicated in the figure, the turn-off circuit +
VG VBE
consists of an npn transistor, a dc battery VB, and a pulse generator. During SCR conduction, 2
– IK (cathode) ≅ IA
the transistor is in the “off” state, that is, IB = 0, and the collector-to-emitter impedance is – E2
very high (for all practical purposes an open circuit). This high impedance will isolate the
turn-off circuitry from affecting the operation of the SCR. For turn-off conditions, a posi-
(a)
tive pulse is applied to the base of the transistor, turning it heavily on, resulting in a very
low impedance from collector to emitter (short-circuit representation). The battery potential IA V
will then appear directly across the SCR as shown in Fig. 17.6b, forcing current through E1
it in the reverse direction for turn-off. Turn-off times of SCRs are typically 5 ms to 30 ms.

IA = 0 Low impedance
(short-circuit
IA = 0 approximation)

E2

(b)

FIG. 17.4
(a) (b) “On” state of the SCR.

FIG. 17.5
Anode current interruption.

+ – + –
VB VB

FIG. 17.6
Forced-commutation technique.

17.4 SCR CHARACTERISTICS AND RATINGS

●
The characteristics of an SCR are provided in Fig. 17.7 for various values of gate current.
The currents and voltages of usual interest are indicated on the characteristic. A brief
description of each follows.
1. Forward breakover voltage V(BR)F* is the voltage above which the SCR enters the
conduction region. The asterisk (*) denotes the letter to be added, which is dependent
844 pnpn AND OTHER IA
DEVICES
VF
+ –
A K
Forward conduction
IA
IG region

IG 2
IG 1 IG = 0
Reverse breakdown Holding
voltage IH
current

VF 3 VF2 VF1 V(BR)F* VF

Forward
Reverse blocking Forward blocking breakover
region region voltage

FIG. 17.7
SCR characteristics.

on the condition of the gate terminal as follows:

O = open circuit from G to K
S = short circuit from G to K
R = resistor from G to K
V = fixed bias (voltage) from G to K
2. Holding current IH is the value of current below which the SCR switches from the
conduction state to the forward blocking region under stated conditions.
3. Forward and reverse blocking regions are the regions corresponding to the open-cir-
cuit condition for the controlled rectifier that block the flow of charge (current) from
anode to cathode.
4. Reverse breakdown voltage is equivalent to the Zener or avalanche region of the fun-
damental two-layer semiconductor diode.
It should be immediately obvious that the SCR characteristics of Fig. 17.7 are very simi-
lar to those of the basic two-layer semiconductor diode except for the horizontal offshoot
before entering the conduction region. It is this horizontal jutting region that gives the gate
control over the response of the SCR. For the characteristic having the solid blue line in
Fig. 17.7 (IG = 0), VF must reach the largest required breakover voltage (V(BR)F*) before
the “collapsing” effect results and the SCR can enter the conduction region corresponding
to the on state. If the gate current is increased to IG1, as shown in the same figure by apply-
ing a bias voltage to the gate terminal, the value of VF required for the conduction (VF1) is
considerably less. Note also that IH drops with increase in IG. If increased to IG2, the SCR
will fire at very low values of voltage (VF3) and the characteristics will begin to approach
those of the basic p–n junction diode. Looking at the characteristics in a completely differ-
ent sense, for a particular VF voltage, say VF2 (Fig. 17.7), we see that if the gate current is
increased from IG = 0 to IG1 or more, the SCR will fire.
The gate characteristics are provided in Fig. 17.8. The characteristics of Fig. 17.8b are
an expanded version of the shaded region of Fig. 17.8a. In Fig. 17.8a, the three gate ratings
of greatest interest, PGFM, IGFM, and VGFM, are indicated. Each is included on the charac-
teristics in the same manner employed for the transistor. Except for portions of the shaded
region, any combination of gate current and voltage that falls within this region will fire
any SCR in the series of components for which these characteristics are provided. Tem-
perature will determine which sections of the shaded region must be avoided. At −65°C the
minimum current that will trigger the series of SCRs is 100 mA, whereas at +150°C only
 Minimum gate current
required to trigger
all units at
+150°C +25°C −65°C

10 3 Minimum
Maximum allowable gate voltage
instantaneous gate required to
power − 12.0 W trigger all units
8
Instantaneous gate voltage (V)

Instantaneous gate voltage (V)

Preferred
firing area 2
6

Notes (1) Junction temperature −65°C to +150°C 1

3
(2) Shaded areas represent locus Maximum gate voltage
2 of possible trigger points from that will not trigger
−65°C to +150°C any units at
1 PGFM = 12 W, IGFM = 20 A, VGFM = 10 V 150°C = 0.15 V

0 0
0.1 0.4 0.8 1.2 1.6 2.0 IG (A) 50 100 IG (mA)
Instantaneous gate current (0.1A)

(a) (b)

FIG. 17.8
SCR gate characteristics (GE series C38).

20 mA is required. The effect of temperature on the minimum gate voltage is usually not
indicated on curves of this type since gate potentials of 3 V or more are usually obtained
easily. As indicated on Fig. 17.8b, a minimum of 3 V is indicated for all units for the tem-
perature range of interest.
Other parameters usually included on the specification sheet of an SCR are the turn-on
time ton, turn-off time toff, junction temperature TJ, and case temperature TC, all of which
by now should be to some extent self-explanatory.
The case construction and terminal identification of SCRs vary with the application.
The case-construction techniques and the terminal identification of a number of SCRs are
provided in Fig. 17.9.

Cathode
Gate

Cathode Gate
Anode
Cathode
Gate
Cathode Anode Anode Anode
Gate
(a) (b) (c)

FIG. 17.9
SCR case construction and terminal identification.

17.5 SCR APPLICATIONS

●
Some of the possible applications for the SCR are listed in the introduction to the SCR
(Section 17.2). In this section, we consider five: a static switch, a phase-control system, a
battery charger, a temperature controller, and a single-source emergency-lighting system.
845
846 pnpn AND OTHER Series Static Switch
DEVICES
A half-wave series static switch is shown in Fig. 17.10a. If the switch is closed as shown
in Fig. 17.10b, a gate current will flow during the positive portion of the input signal, turn-
ing the SCR on. Resistor R1 limits the magnitude of the gate current. When the SCR turns
on, the anode-to-cathode voltage (VF) will drop to the conduction value, resulting in a
greatly reduced gate current and very little loss in the gate circuitry. For the negative region
of the input signal, the SCR will turn off since the anode is negative with respect to the
cathode. The diode D1 is included to prevent a reversal in gate current.
The waveforms for the resulting load current and voltage are shown in Fig. 17.10b.
The result is a half-wave-rectified signal through the load. If less than 180° conduction is
desired, the switch can be closed at any phase displacement during the positive portion of
the input signal. The switch can be electronic, electromagnetic, or mechanical, depending
on the application.

IL

RL A
+ + RL –
+ A
R1 R1

D1 D1
VF
Mechanical, electrical,
or electromechanical
switch
K G – –K G
IG

(a) (b)

FIG. 17.10
Half-wave series static switch.

Variable-Resistance Phase Control

A circuit capable of establishing a conduction angle between 90° and 180° is shown in Fig.
17.11a. The circuit is similar to that of Fig. 17.10a except for the addition of a variable
resistor and the elimination of the switch. The combination of the resistors R and R1 will
limit the gate current during the positive portion of the input signal. If R1 is set to its maxi-
mum value, the gate current may never reach turn-on magnitude. As R1 is decreased from
the maximum, the gate current will increase from the same input voltage. In this way, the
required turn-on gate current can be established in any point between 0° and 90° as shown
in Fig. 17.11b. If R1 is low, the SCR will fire almost immediately, resulting in the same
action as that obtained from the circuit of Fig. 17.10a (180° conduction). However, as
indicated above, if R1 is increased, a larger input voltage (positive) will be required to fire
the SCR. As shown in Fig. 17.11b, the control cannot be extended past a 90° phase dis-
placement since the input is at its maximum at this point. If it fails to fire at this and lesser
values of input voltage on the positive slope of the input, the same response must be

RL R
A

R1
0° 90°

90° conduction
K G
IG

(a) (b)

FIG. 17.11
Half-wave variable-resistance phase control.
expected from the negatively sloped portion of the signal waveform. The operation here is SCR APPLICATIONS 847
normally referred to in technical terms as half-wave variable-resistance phase control. It is
an effective method of controlling the rms current and therefore power to the load.

Battery-Charging Regulator
A third popular application of the SCR is in a battery-charging regulator. The fundamen-
tal components of the circuit are shown in Fig. 17.12. The control circuit has been blocked
off for discussion purposes.

Control mechanism

D1
117 V 47 Ω
SCR1 R1
ac (2 W)
GE
C20F
V2
D2
47 Ω (2 W) R2 47 Ω
(2 W)
R4
SCR2
GE
+ R5 11 V C5U
12 -V
battery 750 Ω
– (1 W)
+ C1 R3
VR
50 µF 1 kΩ
–

FIG. 17.12
Battery-charging regulator.

As indicated in the figure, D1 and D2 establish a full-wave-rectified signal across SCR1

and the 12-V battery to be charged. At low battery voltages, SCR2 is in the “off” state for
reasons to be explained shortly. With SCR2 open, the SCR1 controlling circuit is exactly
the same as the series static switch control discussed earlier in this section. When the full-
wave-rectified input is sufficiently large to produce the required turn-on gate current (con-
trolled by R1), SCR1 will turn on and charging of the battery will commence. At the start of
charging, the low battery voltage will result in a low voltage VR as determined by the simple
voltage-divider circuit. Voltage VR is in turn too small to cause 11.0-V Zener conduction. In
the “off” state, the Zener is effectively an open circuit, maintaining SCR2 in the “off” state
since the gate current is zero. The capacitor C1 is included to prevent any voltage transients
in the circuit from accidentally turning on SCR2. Recall from your fundamental study of
circuit analysis that the voltage cannot change instantaneously across a capacitor. In this
way, C1 prevents transient effects from affecting the SCR.
As charging continues, the battery voltage rises to a point where VR is sufficiently high
to both turn on the 11.0-V Zener and fire SCR2. Once SCR2 has fired, the short-circuit
representation for SCR2 will result in a voltage-divider circuit determined by R1 and R2
that will maintain V2 at a level too small to turn SCR1 on. When this occurs, the battery
is fully charged and the open-circuit state of SCR1 will cut off the charging current. Thus
the regulator recharges the battery whenever the voltage drops and prevents overcharging
when it is fully charged.

Temperature Controller
The schematic diagram of a 100-W heater control using an SCR appears in Fig. 17.13. It is
designed such that the 100-W heater will turn on and off as determined by thermostats.
Mercury-in-glass thermostats are very sensitive to temperature change. In fact, they can
sense changes as small as 0.1°C. They are limited in application, however, in that they can
848 pnpn AND OTHER 100-W heater load
DEVICES
D1
D2
SCR
GE C58
120 V ac
60 Hz

D3 D4

R1
0.1 µF 510 kΩ

Twist leads to minimize

pickup

Hg in glass thermostat

FIG. 17.13
Temperature controller.

handle only very low levels of current—below 1 mA. In this application, the SCR serves
as a current amplifier in a load-switching element. It is not an amplifier in the sense that it
magnifies the current level of the thermostat. Rather, it is a device whose higher current
level is controlled by the behavior of the thermostat.
It should be clear that the bridge network is connected to the ac supply through the
100-W heater. This will result in a full-wave-rectified voltage across the SCR. When the
thermostat is open, the voltage across the capacitor will charge to a gate-firing potential
through each pulse of the rectified signal. The charging time constant is determined by the
RC product. This will trigger the SCR during each half-cycle of the input signal, permitting
a flow of charge (current) to the heater. As the temperature rises, the conductive thermostat
will short-circuit the capacitor, eliminating the possibility of the capacitor charging to the
firing potential and triggering the SCR. The 510-kÆ resistor will then contribute to main-
taining a very low current (less than 250 mA) through the thermostat.

Emergency-Lighting System
The last application for the SCR to be described is shown in Fig. 17.14. It is a single-
source emergency-lighting system that will maintain the charge on a 6-V battery to ensure
its availability and also provide dc energy to a bulb if there is a power shortage. A full-
wave-rectified signal will appear across the 6-V lamp due to diodes D2 and D1. The
capacitor C1 will charge to a voltage slightly less than a difference between the peak
value of the full-wave-rectified signal and the dc voltage across R2 established by the 6-V
battery. In any event, the cathode of SCR1 is higher than the anode, and the gate-to-cathode
voltage is negative, ensuring that the SCR is nonconducting. The battery is charged

FIG. 17.14
Single-source emergency-lighting system.
through R1 and D1 at a rate determined by R1. Charging will only take place when the SILICON-CONTROLLED 849
anode of D1 is more positive than its cathode. The dc level of the full-wave-rectified sig- SWITCH
nal will ensure that the bulb is lit when the power is on. If the power should fail, the
capacitor C1 will discharge through D1, R1, and R3 until the cathode of SCR1 is less posi-
tive than the anode. At the same time, the junction of R2 and R3 will become positive and
establish sufficient gate-to-cathode voltage to trigger the SCR. Once fired, the 6-V bat-
tery discharges through the SCR1 and energizes the lamp and maintains its illumination.
Once power is restored, the capacitor C1 recharges and reestablishes the nonconducting
state of SCR1 as described above.

17.6 SILICON-CONTROLLED SWITCH

●
The silicon-controlled switch (SCS), like the silicon-controlled rectifier, is a four-layer
pnpn device. All four semiconductor layers of the SCS are available due to the addition of
an anode gate, as shown in Fig. 17.15a. The graphic symbol and transistor equivalent cir-
cuit are shown in the same figure. The characteristics of the device are essentially the same
as those for the SCR. The effect of an anode gate current is very similar to that demon-
strated by the gate current in Fig. 17.7. The higher the anode gate current, the lower is the
required anode-to-cathode voltage to turn the device on.
The anode gate connection can be used to turn the device either on or off. To turn on
the device, a negative pulse must be applied to the anode gate terminal, whereas a positive
pulse is required to turn off the device. The need for the type of pulse indicated above can
be demonstrated using the circuit of Fig. 17.15c. A negative pulse at the anode gate will
forward-bias the base-to-emitter junction of Q1, turning it on. The resulting heavy collector
current IC1 will turn on Q2, resulting in a regenerative action and the “on” state for the SCS
device. A positive pulse at the anode gate will reverse-bias the base-to-emitter junction of Q1,
turning it off, resulting in the open-circuit “off” state of the device. In general, the triggering
(turn-on) anode gate current is larger in magnitude than the required cathode gate current.
For one representative SCS device, the triggering anode gate current is 1.5 mA, whereas the
required cathode gate current is 1 mA. The required turn-on gate current at either terminal is
affected by many factors, including the operating temperature, the anode-to-cathode voltage,
the load placement, and the type of cathode, gate-to-cathode, and anode gate-to-anode con-
nection (short-circuit, open-circuit, bias, load, etc.). Tables, graphs, and curves are normally
available for each device to provide the type of information indicated above.

FIG. 17.15
Silicon-controlled switch (SCS): (a) basic construction; (b) graphic symbol; (c) equivalent transistor circuit.

Three of the more fundamental types of turn-off circuits for the SCS are shown in Fig. 17.16.
When a pulse is applied to the transformer of Fig. 17.16a, the transistor conducts heavily,
resulting in a low-impedance (_ short-circuit) characteristic between collector and emitter.
This low-impedance branch diverts anode current away from the SCS, dropping it below
the holding value and consequently turning it off. Similarly, the positive pulse at the anode
gate of Fig. 17.16b will turn the SCS off by the mechanism described earlier in this section.
The circuit of Fig. 17.16c can be turned either off or on by a pulse of the proper magnitude
 A
off

C
off

FIG. 17.16
SCS turn-off techniques.

at the cathode gate. The turn-off characteristic is possible only if the correct value of RA
is employed. It will control the amount of regenerative feedback, the magnitude of which
is critical for this type of operation. Note the variety of positions in which the load resis-
tor RL can be placed. There are a number of other possibilities, which can be found in any
comprehensive semiconductor handbook or manual.
(a) An advantage of the SCS over a corresponding SCR is the reduced turn-off time, typi-
cally within the range 1 ms to 10 ms for the SCS and 5 ms to 30 ms for the SCR. Some of
the remaining advantages of the SCS over an SCR include increased control and triggering
GA sensitivity and a more predictable firing situation. At present, however, the SCS is limited
A to low power, current, and voltage ratings. Typical maximum anode currents range from
GK
K 100 mA to 300 mA with dissipation (power) ratings of 100 mW to 500 mW.
The terminal identification of an SCS is shown in Fig. 17.17 with a packaged SCS.
(b)
Voltage Sensor
FIG. 17.17
Silicon-controlled switch (SCS): Some of the more common areas of application include a wide variety of computer circuits
(a) device; (b) terminal (counters, registers, and timing circuits), pulse generators, voltage sensors, and oscillators.
identification. One simple application for an SCS as a voltage-sensing device is shown in Fig. 17.18. It is
an alarm system with n inputs from various stations. Any single input will turn that par-
ticular SCS on, resulting in an energized alarm relay and light in the anode gate circuit to
indicate the location of the input (disturbance).

FIG. 17.18
SCS alarm circuit.

Alarm Circuit
One additional application of the SCS is in the alarm circuit of Fig. 17.19. RS represents a
temperature-, light-, or radiation-sensitive resistor, that is, an element whose resistance
850
will decrease with the application of any of the three energy sources listed above. The GATE TURN-OFF SWITCH 851
cathode gate potential is determined by the divider relationship established by RS and the
variable resistor. Note that the gate potential is at approximately 0 V if RS equals the value
set by the variable resistor since both resistors will have 12 V across them. However, if RS
decreases, the potential of the junction will increase until the SCS is forward-biased, caus-
ing the SCS to turn on and energize the alarm relay.
The 100-kÆ resistor is included to reduce the possibility of an accidental triggering of
the device through a phenomenon known as the rate effect. It is caused by the stray capaci-
tance levels between gates. A high-frequency transient can establish sufficient base current
to turn the SCS on accidentally. The device is reset by pressing the reset button, which
opens the conduction path of the SCS and reduces the anode current to zero.
R'

17.7 GATE TURN-OFF SWITCH

● FIG. 17.19
The gate turn-off switch (GTO) is the third pnpn device to be introduced in this chapter. Alarm circuit.
Like the SCR, however, it has only three external terminals, as indicated in Fig. 17.20a. Its
graphical symbol is shown in Fig. 17.20b. Although the graphical symbol is different from
that of either the SCR or the SCS, the transistor equivalent is exactly the same and the
characteristics are similar.
The most obvious advantage of the GTO over the SCR or SCS is the fact that it can be
turned on or off by applying the proper pulse to the cathode gate (without the anode gate
and associated circuitry required for the SCS). A consequence of this turn-off capability
is an increase in the magnitude of the required gate current for triggering. For an SCR and
GTO of similar maximum rms current ratings, the gate-triggering current of a particular
SCR is 30 mA, whereas the triggering current of the GTO is 20 mA. The turn-off current
of a GTO is slightly larger than the required triggering current. The maximum rms current
and dissipation ratings of GTOs manufactured today are limited to about 3 A and 20 W,
respectively.
A second very important characteristic of the GTO is improved switching characteris-
tics. The turn-on time is similar to that of the SCR (typically 1 ms), but the turn-off time
of about the same duration (1 ms) is much smaller than the typical turn-off time of an SCR
(5 ms to 30 ms). The fact that the turn-off time is similar to the turn-on time rather than
considerably larger permits the use of this device in high-speed applications.
A typical GTO and its terminal identification are shown in Fig. 17.21. The GTO gate
input characteristics and turn-off circuits can be found in a comprehensive manual or
specification sheet. The majority of the SCR turn-off circuits can also be used for GTOs.
FIG. 17.20
Sawtooth Generator Gate turn-off switch (GTO):
(a) basic construction; (b) symbol.
Some of the areas of application for the GTO include counters, pulse generators, multivi-
brators, and voltage regulators. Figure 17.22 is an illustration of a simple sawtooth genera-
tor employing a GTO and a Zener diode. A
G
K

Anode
Gate
Cathode

FIG. 17.21
Typical GTO and its terminal
identification.

FIG. 17.22
GTO sawtooth generator.
852 pnpn AND OTHER When the supply is energized, the GTO will turn on, resulting in the short-circuit equiva-
DEVICES lent from anode to cathode. The capacitor C1 will then begin to charge toward the supply
voltage as shown in Fig. 17.22. As the voltage across the capacitor C1 charges above the
Zener potential, a reversal in gate-to-cathode voltage will result, establishing a reversal in
gate current. Eventually, the negative gate current will be large enough to turn the GTO off.
Once the GTO turns off, resulting in the open-circuit representation, the capacitor C1 will
discharge through the resistor R3. The discharge time will be determined by the circuit time
constant t = R3C1. The proper choice of R3 and C1 will result in the sawtooth waveform
of Fig. 17.22. Once the output potential Vo drops below VZ, the GTO will turn on and the
process will repeat.

17.8 LIGHT-ACTIVATED SCR

●
The next in the series of pnpn devices is the light-activated SCR (LASCR). As indicated
by the terminology, it is an SCR whose state is controlled by the light falling on a silicon
semiconductor layer of the device. The basic construction of an LASCR is shown in Fig.
17.23a. As indicated in Fig. 17.23a, a gate lead is also provided to permit triggering the
device using typical SCR methods. Note also in the figure that the mounting surface for the
silicon pellet is the anode connection for the device. The graphical symbols most com-
monly employed for the LASCR are provided in Fig. 17.23b. The terminal identification
and a typical LASCR appear in Fig. 17.24a.

FIG. 17.23
Light-activated SCR (LASCR): (a) basic construction; (b) symbols.

Some of the areas of application for the LASCR include optical light controls, relays,
phase control, motor control, and a variety of computer applications. The maximum cur-
rent (rms) and power (gate) ratings for commercially available LASCRs are about 3 A and
0.1 W, respectively. The characteristics (light triggering) of a representative LASCR are
provided in Fig. 17.24b. Note in this figure that an increase in junction temperature results
in a reduction in light energy required to activate the device.

AND/OR Circuits
One interesting application of an LASCR is in the AND and OR circuits of Fig. 17.25.
Only when light falls on LASCR1 and LASCR2 will the short-circuit representation for
each be applicable and the supply voltage appear across the load. For the OR circuit, light
energy applied to LASCR1 or LASCR2 will result in the supply voltage appearing across
the load.
The LASCR is most sensitive to light when the gate terminal is open. Its sensitivity
can be reduced and controlled somewhat by the insertion of a gate resistor, as shown in
Fig. 17.25.
 40 LIGHT-ACTIVATED SCR 853

20

10
8
6

Effective irradiance (mW/cm2)

4

2 Triggering region

1
0.8
0.6
No units trigger in this area
0.4

0.2
Notes:
(1) Shaded area represents the locus of possible
0.1 triggering points from −65°C to 100°C
0.08 (2) Applied anode voltage = 6 V dc
0.06 (3) Gate to cathode resistance = 56,000 Ω
(4) Light source perpendicular to plane of header.
0.04
G
K A
−60 −40 −20 0 20 40 60 80 100
Junction temperature (°C)

(a) (b)

FIG. 17.24
LASCR: (a) appearance and terminal identification; (b) light-triggering characteristics.

Load Load

LASCR1 LASCR1 LASCR2

Supply Supply

LASCR2

(a) (b)

FIG. 17.25
LASCR optoelectronic logic circuitry: (a) AND gate: input to LASCR1 and LASCR2 is required for energization
of the load; (b) OR gate: input to either LASCR1 or LASCR2 will energize the load.

Latching Relay
A second application of the LASCR appears in Fig. 17.26. It is the semiconductor analog
of an electromechanical relay. Note that it offers complete isolation between the input and
the switching element. The energizing current can be passed through a light-emitting diode
or a lamp, as shown in the figure. The incident light will cause the LASCR to turn on and
permit a flow of charge (current) through the load as established by the dc supply. The
854 pnpn AND OTHER S1
DEVICES
Load
+
dc input ac or dc
input
dc

FIG. 17.26
Latching relay.

LASCR can be turned off using the reset switch S1. This system offers the additional
advantages over an electromechanical switch of long life, microsecond response, small
size, and the elimination of contact bounce.

17.9 SHOCKLEY DIODE

●
The Shockley diode is a four-layer pnpn diode with only two external terminals, as shown
in Fig. 17.27a with its graphical symbol. The characteristics (Fig. 17.27b) of the device are
exactly the same as those encountered for the SCR with IG = 0. As indicated by the char-
acteristics, the device is in the “off” state (open-circuit representation) until the breakover
voltage is reached, at which time avalanche conditions develop and the device turns on
(short-circuit representation).
IA

Anode Anode
IA
+
p
n
VF
p
n IBR
VBR VF
Cathode
– Cathode

(a) (b)

FIG. 17.27
Shockley diode: (a) basic construction and symbol; (b) characteristics.

Trigger Switch
One common application of the Shockley diode is shown in Fig. 17.28, where it is
employed as a trigger switch for an SCR. When the circuit is energized, the voltage across
the capacitor will begin to change toward the supply voltage. Eventually, the voltage
across the capacitor will be sufficiently high to first turn on the Shockley diode and then
the SCR.

17.10 DIAC
●
FIG. 17.28 The diac is basically a two-terminal parallel-inverse combination of semiconductor layers
Shockley diode application— that permits triggering in either direction. The characteristics of the device, presented in
trigger switch for an SCR. Fig. 17.29a, clearly demonstrate that there is a breakover voltage in either direction. This
possibility of an on condition in either direction can be used to its fullest advantage in ac
applications.
The basic arrangement of the semiconductor layers of the diac is shown in Fig. 17.29b,
along with its graphical symbol. Note that neither terminal is referred to as the cathode.
Instead, there is an anode 1 (or electrode 1) and an anode 2 (or electrode 2). When anode 1
is positive with respect to anode 2, the semiconductor layers of particular interest are p1n2 p2
and n3. For anode 2 positive with respect to anode 1, the applicable layers are p2n2 p1 and n1.
 Anode 1 Anode 1 DIAC 855

Anode 2
Anode 2

VBR2 IBR Anode 1

1

IBR VBR1 V
2
n1 p1
n2
p2 n3

Anode 2

(a) (b)

FIG. 17.29
The diac: (a) characteristics; (b) symbols and basic construction.

For the unit appearing in Fig. 17.29, the breakdown voltages are very close in magnitude
but may vary from a minimum of 28 V to a maximum of 42 V. They are related by the fol-
lowing equation provided in the specification sheet:

VBR1 = VBR2 { 0.1VBR2 (17.1)

The current levels (IBR1 and IBR2) are also very close in magnitude for each device. For
the unit of Fig. 17.29, both current levels are about 200 mA = 0.2 mA.

Proximity Detector
The use of the diac in a proximity detector is shown in Fig. 17.30. Note the use of an SCR
in series with the load and the programmable unijunction transistor (to be described in Sec-
tion 17.12) connected directly to the sensing electrode.

To
sensing
electrode
(115 V
Vi 60 Hz )
Cb

FIG. 17.30
Proximity detector or touch switch.

As a human body approaches the sensing electrode, the capacitance between the elec-
trode and the ground (Cb) increases. The programmable UJT (PUT) is a device that will fire
(enter the short-circuit state) when the anode voltage (VA) is at least 0.7 V (for silicon)
greater than the gate voltage (VG). Before the programmable device turns on, the system is
essentially as shown in Fig. 17.31. As the input voltage rises, the diac voltage vA will follow
as shown in the figure until the firing potential is reached. It will then turn on and the diac
voltage will drop substantially, as shown. Note that the diac is in essentially an open-circuit
state until it fires. Before the capacitive element is introduced, the voltage vG will be the
856 pnpn AND OTHER vi vG
DEVICES

vi 47 k 10 M

vA vG

1 M vi

vi vG
Cb
vA

FIG. 17.31
Effect of capacitive element on the behavior of the network of Fig. 17.30.

same as the input. As indicated in the figure, since both vA and vG follow the input, vA can
never be greater than vG by 0.7 V and turn on the device. However, as the capacitive element
is introduced, the voltage vG will begin to lag the input voltage by an increasing angle, as
indicated in the figure. There is therefore a point established where vA can exceed vG by 0.7
V and cause the programmable device to fire. A heavy current is established through the
PUT at this point, raising the voltage vG and turning on the SCR. A heavy SCR current will
then exist through the load, reacting to the presence of the approaching person.
A second application of the diac appears in the next section (Fig. 17.33) as we consider
an important power-control device: the triac.

17.11 TRIAC
●
The triac is fundamentally a diac with a gate terminal for controlling the turn-on conditions
of the bilateral device in either direction. In other words, for either direction the gate cur-
rent can control the action of the device in a manner very similar to that demonstrated for
an SCR. The characteristics, however, of the triac in the first and third quadrants are some-
what different from those of the diac, as shown in Fig. 17.32c. Note the holding current in
each direction not present in the characteristics of the diac.

Anode 1
G

Anode 1
Gate

Anode Gate

Anode 2 Anode 2 Anode 2

(d)

FIG. 17.32
The triac: (a) symbol; (b) basic construction; (c) characteristics; (d) drawings.
 The graphical symbol for the device and the distribution of the semiconductor layers UNIJUNCTION 857
are provided in Fig. 17.32 with photographs of the device. For each possible direction of TRANSISTOR
conduction, there is a combination of semiconductor layers whose state will be controlled
by the signal applied to the gate terminal.

Phase (Power) Control

One fundamental application of the triac is presented in Fig. 17.33. In this capacity, it is
controlling the ac power to the load by switching on and off during the positive and nega-
tive regions of the input sinusoidal signal. The action of this circuit during the positive
portion of the input signal is very similar to that encountered for the Shockley diode in Fig.
17.28. The advantage of this configuration is that during the negative portion of the input
signal, the same type of response will result since both the diac and the triac can fire in the
reverse direction. The resulting waveform for the current through the load is provided in
Fig. 17.33. By varying the resistor R, one can control the conduction angle. There are units
available that can handle in excess of 10-kW loads.

vi

FIG. 17.33
Application of a triac: phase (power) control.

OTHER DEVICES
17.12 UNIJUNCTION TRANSISTOR
●
Recent interest in the unijunction transistor (UJT) has, like that for the SCR, been increas-
ing at a remarkable rate. Although first introduced in 1948, the device did not become
commercially available until 1952. The low cost per unit combined with the excellent
characteristics of the device have warranted its use in a wide variety of applications,
including oscillators, trigger circuits, sawtooth generators, phase control, timing circuits,
bistable networks, and voltage- or current-regulated supplies. The fact that this device is,
in general, a low-power-absorbing device under normal operating conditions is a tremen-
dous aid in the continual effort to design relatively efficient systems.
The UJT is a three-terminal device having the basic construction shown in Fig. 17.34. A
slab of lightly doped (increased resistance characteristic) n-type silicon material has two base

p–n junction B2

Ohmic base +
contact VBB
Aluminum rod –

n-type high-resistivity
silicon slab B1

FIG. 17.34
Unijunction transistor (UJT): basic construction.
858 pnpn AND OTHER contacts attached to both ends of one surface and an aluminum rod alloyed to the opposite
DEVICES surface. The p–n junction of the device is formed at the boundary of the aluminum rod and the
n-type silicon slab. The single p–n junction accounts for the terminology unijunction. It was
originally called a duo (double) base diode due to the presence of two base contacts. Note in
Fig. 17.34 that the aluminum rod is alloyed to the silicon slab at a point closer to the base 2 con-
tact than the base 1 contact and that the base 2 terminal is made positive with respect to the base
1 terminal by VBB volts. The effect of each will become evident in the paragraphs to follow.
The symbol for the unijunction transistor is provided in Fig. 17.35. Note that the emitter
leg is drawn at an angle to the vertical line representing the slab of n-type material. The
arrowhead is pointing in the direction of conventional current (hole) flow when the device
is in the forward-biased, active, or conducting state.
The circuit equivalent of the UJT is shown in Fig. 17.36. Note the relative simplicity
of this equivalent circuit: two resistors (one fixed, one variable) and a single diode. The
resistance RB1 is shown as a variable resistor since its magnitude will vary with the current
IE. In fact, for a representative unijunction transistor, RB1 may vary from 5 k⍀ down to
50 Æ for a corresponding change of IE from 0 mA to 50 mA. The interbase resistance RBB
FIG. 17.35 is the resistance of the device between terminals B1 and B2 when IE = 0. In equation form,

RBB = (RB1 + RB2) 0 IE = 0

Symbol and basic biasing arrange-
ment for the unijunction transistor. (17.2)

B2
+

RB
2
VBB
IE VD
E
RBB = RB1 + RB2
+ + IE = 0
VE RB
1 ηVBB
– IE = 0 –
B1
–
FIG. 17.36
UJT equivalent circuit.

(RBB is typically within the range of 4 kÆ to 10 kÆ.) The position of the aluminum rod of
Fig. 17.34 will determine the relative values of RB1 and RB2 with IE = 0. The magnitude of
VRB1 (with IE = 0) is determined by the voltage-divider rule in the following manner:

VRB1 =
RB1
# VBB = hVBB ` (17.3)
RB1 + RB2 IE = 0

The Greek letter h (eta) denotes the intrinsic stand-off ratio of the device, which is defined by

`
RB1 RB1
h = = (17.4)
RB1 + RB2 IE = 0 RBB

For applied emitter potentials VE greater than VRB1( = hVBB) by the forward voltage
drop of the diode VD (0.35 S 0.70 V), the diode will fire. Assume the short-circuit repre-
sentation (on an ideal basis); IE will begin to flow through RB1. In equation form, the emitter
firing potential is given by

VP = hVBB + VD (17.5)

The characteristics of a representative unijunction transistor are shown for VBB = 10 V

in Fig. 17.37. Note that for emitter potentials to the left of the peak point, the magnitude of
IE is never greater than IEO (measured in microamperes). The current IEO corresponds very
closely to the reverse leakage current ICO of the conventional bipolar transistor. This region, as
indicated in the figure, is called the cutoff region. Once conduction is established at VE = VP,
 UNIJUNCTION 859
-
TRANSISTOR

FIG. 17.37
UJT static emitter characteristic curve.

the emitter potential VE will drop with increase in IE. This corresponds exactly to the decreas-
ing resistance RB1 for increasing current IE, as discussed earlier. This device, therefore, has a
negative-resistance region that is stable enough to be used with a great deal of reliability in the
areas of application listed earlier. Eventually, the valley point will be reached, and any further
increase in IE will place the device in the saturation region. In this region, the characteristics
approach those of the semiconductor diode in the equivalent circuit of Fig. 17.36.
The decrease in resistance in the active region is due to the holes injected into the n-type
slab from the aluminum p-type rod when conduction is established. The increased hole
content in the n-type material will result in an increase in the number of free electrons in
the slab, producing an increase in conductivity G and a corresponding drop in resistance
(R T = 1>G c ). Three other important parameters for the unijunction transistor are IP, VV,
and IV. Each is indicated on Fig. 17.37. They are all self-explanatory.
The emitter characteristics as they normally appear are provided in Fig. 17.38. Note that
IEO (mA) is not in evidence since the horizontal scale is in milliamperes. The intersection

FIG. 17.38
Typical static emitter characteristic curves for a UJT.
860 pnpn AND OTHER of each curve with the vertical axis is the corresponding value of VP. For fixed values of h
DEVICES and VD, the magnitude of VP will vary as VBB, that is,
VP c = hVBB c + VD

fixed
A typical set of specifications for the UJT is provided in Fig. 17.39b. The discussion
of the last few paragraphs should make each quantity readily recognizable. The terminal
identification is provided in Fig. 17.39c and a photograph of a representative UJT in Fig.
17.39a. Note that the base terminals are opposite each other, whereas the emitter terminal
is between the two. In addition, the base terminal to be tied to the higher potential is closer
to the extension on the lip of the casing.

Absolute maximum ratings (25°C):

Electrical characteristics (25°C):

B1 B2

(a) (b) (c)

FIG. 17.39
UJT: (a) appearance; (b) specification sheet; (c) terminal identification.

SCR Triggering
One rather common application of the UJT is in the triggering of other devices such as the
SCR. The basic elements of such a triggering circuit are shown in Fig. 17.40. The resistor
R1 must be chosen to ensure that the load line determined by R1 passes through the device
characteristics in the negative-resistance region, that is, to the right of the peak point but to
the left of the valley point, as shown in Fig. 17.41. If the load line fails to pass to the right

VE

VP Load line

−R region

VV

IP IV IE

FIG. 17.40 FIG. 17.41

UJT triggering of an SCR. Load line for a triggering application.
of the peak point, the device cannot turn on. An equation for R1 that will ensure a turn-on UNIJUNCTION 861
condition can be established if we consider the peak point at which IR1 = IP and VE = VP. TRANSISTOR
(The equality IR1 = IP is valid since the charging current of the capacitor at this instant is
zero. That is, at this particular instant the capacitor is changing from a charging to a dis-
charging state.) Then V - IR1R1 = VE and R1 = (V - VE)>IR1 = (V - VP)>IP at the
peak point. To ensure firing, the condition is

V - VP
R1 6 (17.6)
IP

At the valley point IE = IV and VE = VV, so that

V - IR1R1 = VE
becomes V - IVR1 = VV
V - VV
and R1 =
IV
or, to ensure turning off,

V - VV
R1 7 (17.7)
IV

The range of R1 is therefore limited by

V - VV V - VP
6 R1 6 (17.8)
IV IP

The resistance R2 must be chosen small enough to ensure that the SCR is not turned on
by the voltage VR2 of Fig. 17.42 when IE 0 A. The voltage VR2 is then given by

`
R2V
VR2 (17.9)
R2 + RBB IE = 0 A

The capacitor C will determine, as we shall see, the time interval between triggering pulses
and the time span of each pulse. FIG. 17.42
At the instant the dc supply voltage V is applied, the voltage vE = vC will charge toward Triggering network when
V volts from VV as shown in Fig. 17.43 with a time constant t = R1C. IE 0 A.

vC vE

( )
+ –
v

FIG. 17.43
(a) Charging and discharging phases for trigger network of Fig. 17.40; (b) equivalent network when UJT turns on.
862 pnpn AND OTHER The general equation for the charging period is
DEVICES
vC = VV + (V - VV)(1 - e-t>R1C) (17.10)

As noted in Fig. 17.43, the voltage across R2 is determined by Eq. (17.9) during this charg-
ing period. When vC = vE = VP, the UJT will enter the conduction state and the capacitor
will discharge through RB1 and R2 at a rate determined by the time constant t =
(RB1 + R2)C.
The discharge equation for the voltage vC = vE is

vC VPe-t>(RB1 + R2)C (17.11)

Equation (17.11) is complicated somewhat by the fact that RB1 will decrease with in-
creasing emitter current and the other elements of the network, such as R1 and V, will affect
the discharge rate and final level. However, the equivalent network appears as shown in
Fig. 17.43 and the magnitudes of R1 and RB2 are typically such that a Thévenin network for
the network surrounding the capacitor C will be only slightly affected by these two resis-
tors. Even though V is a reasonably high voltage, the voltage-divider contribution to the
Thévenin voltage can be ignored on an approximate basis.
Using the reduced equivalent of Fig. 17.44 for the discharge phase results in the follow-
ing approximation for the peak value of VR2:

R2(VP - 0.7)
VR2 (17.12)
+ – R2 + RB1

The period t1 of Fig. 17.43 can be determined in the following manner:

vC (charging) = VV + (V - VV)(1 - e-t>R1C)
= VV + V - VV - (V - VV)e-t>R1C
= V - (V - VV)e-t>R1C
when vC = VP, t = t1, and VP = V - (V - VV)e-t1>R1C, or

= -e-t1>R1C
VP - V
V - VV

e-t1>R1C =
FIG. 17.44 V - VP
Reduced equivalent network when and
V - VV
UJT turns on.
Using logs, we have

loge e-t1>R1C = loge

V - VP
V - VV
-t1 V - VP
and = loge
R1C V - VP

V - VV
with t1 = R1C loge (17.13)
V - VP

For the discharge period the time between t1 and t2 can be determined from Eq. (17.11)
as follows:
vC (discharging) = VP e-t>(RB1 + R2)C
Establishing t1 as t = 0 gives us
vC = VV at t = t2
-t2 >(RB1 + R2)C
and VV = VPe

e-t2 >(RB1 + R2)C =

VV
or
VP
Using logs yields
-t2 VV
= loge
(RB1 + R2)C VP
 UNIJUNCTION 863
VP TRANSISTOR
and t2 = (RB1 + R2)C loge (17.14)
VV

The period of time to complete one cycle is defined by T in Fig. 17.43. That is,

T = t1 + t2 (17.15)

Relaxation Oscillator
If the SCR were dropped from the configuration, the network would behave as a relaxation
oscillator, generating the waveform of Fig. 17.43. The frequency of oscillation is deter-
mined by

1
fosc = (17.16)
T

In many systems, t1 W t2, and

V - VV
T t1 = R1C loge
V - VP
Since V W VV in many instances,
V
T t1 = R1C loge
V - VP

1 - VP >V
1
= R1C loge

but h = VP >V if we ignore the effects of VD in Eq. (17.5), and

1
T R1C loge
1 - h

1
or f (17.17)
R1C loge [1>(1 - h)]

EXAMPLE 17.1 Given the relaxation oscillator of Fig. 17.45:

a. Determine RB1 and RB2 at IE = 0 A.
b. Calculate VP, the voltage necessary to turn on the UJT.

V = 12 V

R1 50 kΩ RBB = 5 kΩ, η = 0.6

VV = 1 V, IV = 10 mA, IP = 10 µA
(RB1 = 100 Ω during discharge phase)

C 0.1 pF +
R2 0.1 kΩ vR
2
–

FIG. 17.45
Example 17.1.
864 pnpn AND OTHER c. Determine whether R1 is within the permissible range of values as determined by Eq.
DEVICES (17.8) to ensure firing of the UJT.
d. Determine the frequency of oscillation if RB1 = 100 ⍀ during the discharge phase.
e. Sketch the waveform of vC for a full cycle.
f. Sketch the waveform of vR2 for a full cycle.
Solution:
RB1
a. h =
RB1 + RB2
RB1
0.6 =
RBB
RB1 = 0.6RBB = 0.6(5 k⍀) = 3 k
RB2 = RBB - RB1 = 5 k⍀ - 3 k⍀ = 2 k
b. At the point where vC = VP, if we continue with IE = 0 A, the network of Fig. 17.46
results, where
(RB1 + R2)12 V
+ – VP = 0.7 V +
0.7 V RB1 + RB2 + R2

•
RBB
(3 k⍀ + 0.1 k⍀)12 V
= 0.7 V + = 0.7 V + 7.294 V
5 k⍀ + 0.1 k⍀
8V
V - VV V - VP
c. 6 R1 6
FIG. 17.46 IV IP
Network for determining VP, the 12 V - 1 V 12 V - 8 V
voltage required to turn on the UJT. 6 R1 6
10 mA 10 mA
1.1 k⍀ 6 R1 6 400 k⍀
The resistance R1 = 50 k⍀ falls within this range.
V - VV
d. t1 = R1C loge
V - VP
12 V - 1 V
= (50 k⍀)(0.1 pF) loge
12 V - 8 V
11
= 5 * 10-3 loge = 5 * 10-3(1.01)
4
= 5.05 ms
VP
t2 = (RB1 + R2)C loge
VV
8
= (0.1 k⍀ + 0.1 k⍀)(0.1 pF) loge
1
-6
= (0.02 * 10 )(2.08)
= 41.6 ms
and T = t1 + t2 = 5.05 ms + 0.0416 ms
= 5.092 ms
1 1
with fosc = = 196 Hz
T 5.092 ms
Using Eq. (17.17) gives
1
f
R1C loge [1>(1 - h)]
1
= -3
5 * 10 loge 2.5
= 218 Hz
e. See Fig. 17.47. PHOTOTRANSISTORS 865

vC

5τ = 5R1C
V = 12 V

τ = R1C

VP = 8 V

VV = 1 V
0 5.05 ms t

Interval = 41.6 µs

5.05 ms 5.0916 ms

FIG. 17.47
The voltage vC for the relaxation oscillator of Fig. 17.45.

f. During the charging phase, from (Eq. 17.9), we have

R2V 0.1 k⍀(12 V)
VR2 = = = 0.235 V
R2 + RBB 0.1 k⍀ + 5 k⍀
When vC = VP, from (Eq. 17.12), we have
R2(VP - 0.7 V) 0.1 k⍀(8 V - 0.7 V)
VR2 =
R2 + RB1 0.1 k⍀ + 0.1 k⍀
= 3.65 V
The plot of vR2 appears in Fig. 17.48.

vR (V)
2

3.65 V
τ = (RB1 + R2) C
2V

0 t
5.05 ms 5.0916 ms

41.6 µs

FIG. 17.48
The voltage vR2 for the relaxation oscillator of Fig. 17.45.

17.13 PHOTOTRANSISTORS
●
The fundamental behavior of photoelectric devices was introduced earlier with the descrip-
tion of the photodiode. This discussion will now be extended to include the phototransis-
tor, which has a photosensitive collector–base p–n junction. The current induced by
photoelectric effects is the base current of the transistor. If we assign the notation Il for the
photoinduced base current, the resulting collector current, on an approximate basis, is

IC hfe Il (17.18)
866 pnpn AND OTHER A representative set of characteristics for a phototransistor is provided in Fig. 17.49
DEVICES along with the symbolic representation of the device. Note the similarities between these
curves and those of a typical bipolar transistor. As expected, an increase in light intensity
corresponds to an increase in collector current. To provide a greater degree of familiarity
with the light-intensity unit of measurement, milliwatts per square centimeter, we give a
curve of base current versus flux density in Fig. 17.50a. Note the exponential increase in
base current with increasing flux density. In the same figure, a sketch of the phototransistor
is provided with the terminal identification and the angular alignment.
Some of the areas of application for the phototransistor include computer logic circuitry,
lighting control (highways, etc.), level indication, relays, and counting systems.

Collector–emitter current

FIG. 17.49
Phototransistor: (a) collector characteristics; (b) symbol.

E B
C

(c)

FIG. 17.50
Phototransistor: (a) base current versus flux density; (b) device; (c) terminal identification;
(d) angular alignment.
High-Isolation AND Gate OPTO-ISOLATORS 867

A high-isolation AND gate is shown in Fig. 17.51 using three phototransistors and three
LEDs (light-emitting diodes). The LEDs are semiconductor devices that emit light at an
intensity determined by the forward current through the device. With the aid of discussions
in Chapter 1, the circuit behavior should be relatively easy to understand. The terminology
high isolation simply refers to the lack of an electrical connection between the input and
output circuits.

FIG. 17.51
High-isolation AND gate employing photo-
transistors and light-emitting diodes (LEDs).

17.14 OPTO-ISOLATORS
●
The opto-isolator is a device that incorporates many of the characteristics described in the
preceding section. It is simply a package that contains both an infrared LED and a photo-
detector such as a silicon diode, transistor Darlington pair, or SCR. The wavelength
response of each device is tailored to be as identical as possible to permit the highest mea-
sure of coupling possible. In Fig. 17.52, two possible chip configurations are provided,

(Top View) Pin No. Function

Pin No. Function
1 anode 1 16
IL- 2 cathode 1 anode
L 7 I-744 1 6 2 cathode
503 3 nc 15
2 3 cathode
5 4 emitter
2 4 anode
5 collector 14
3 5 anode
6 base
IL 6 cathode
L 7 Q-74 3 4
743 4 13 7 cathode
LED chip on Pin 2 8 anode
12 9 emitter
PT chip on Pin 5 5
10 collector
6 11 11 collector
12 enitter
10 13 emitter
7
14 collector
15 collector
8 9 16 emitter

FIG. 17.52
Two Litronix opto-isolators.
868 pnpn AND OTHER with a drawing of each. There is a transparent insulating cap between each set of elements
DEVICES embedded in the structure (not visible) to permit the passage of light. They are designed
with response times so small that they can be used to transmit data in the megahertz
range.
The maximum ratings and electrical characteristics for the 6-pin model are provided in
Fig. 17.53. Note that ICEO is measured in nanoamperes and that the power dissipation of
the LED and transistor are about the same.

Maximum Ratings
Gallium arsenide LED (each channel)
Power dissipation @ 25°C 200 mW
Derate linearly from 25°C 2.6 mW/°C
Continuous forward current 150 mA
Detector silicon phototransistor (each channel)
Power dissipation @ 25°C 200 mW
Derate linearly from 25°C 2.6 mW/°C
Collector-emitter breakdown voltage 30 V
Emitter-collector breakdown voltage 7V
Collector-base breakdown voltage 70 V

Electrical Characteristics per Channel (at 25°C Ambient)

Parameter Min. Typ. Max. Unit Test Conditions

Gallium arsenide LED

Forward voltage 1.3 1.5 V IF = 60 mA
Reverse current 0.1 10 µA VR = 3.0 V
Capacitance 100 pF VR = 0 V
Phototransistor detector
BVCEO 30 V IC = 1 mA
ICEO 5.0 50 nA VCE = 10 V, IF = 0 A
Collector-emitter capacitance 2.0 pF VCE = 0 V
BVECO 7 V IE = 100 µA
Coupled characteristics
dc current transfer ratio 0.2 0.35 IF = 10 mA, VCE = 10 V
Capacitance, input to output 0.5 pF
Breakdown voltage 2500 V DC
Resistance, input to output 100 GΩ
Vsat 0.5 V IC = 1.6 mA, IF = 16 mA
Propagation delay
tD on 6.0 µs RL = 2.4 kΩ, VCE = 5 V
tD off 25 µs IF = 16 mA

FIG. 17.53
Opto-isolator characteristics.

The typical optoelectronic characteristic curves for each channel are provided in Figs.
17.54 through 17.58. Note the very pronounced effect of temperature on the output current
at low temperatures but the fairly level response at or above room temperature (25°C). As
mentioned earlier, the level of ICEO is improving steadily with improved design and con-
struction techniques (the lower the better). In Fig. 17.54, we do not reach 1 mA until the
temperature rises above 75°C. The transfer characteristics of Fig. 17.55 compare the input
LED current (which establishes the luminous flux) to the resulting collector current of the
output transistor (whose base current is determined by the incident flux). In fact, Fig. 17.56
demonstrates that the VCE voltage affects the resulting collector current only very slightly.
It is interesting to note in Fig. 17.57 that the switching time of an opto-isolator decreases
with increased current, whereas for many devices it is exactly the reverse. Consider that
it is only 2 ms for a collector current of 6 mA and a load RL of 100 ⍀. The relative output
versus temperature appears in Fig. 17.58.
 FIG. 17.54 FIG. 17.55 FIG. 17.56
Dark current ICEO versus Transfer characteristics. Detector output characteristics.
temperature.

1.2

Relative output current

1.0

0.8

0.6

0.4

0
−50 −25 0 25 50 75 100
Case temperature (°C)

FIG. 17.57 FIG. 17.58

Switching time versus collector Relative output versus temperature.
current.

The schematic representation for a transistor coupler appears in Fig. 17.52. The sche-
matic representations for a photodiode, a photo-Darlington, and a photo-SCR opto-isolator
appear in Fig. 17.59.

Anode
A
+ +
VAG
FIG. 17.59 p
Opto-isolators: (a) photodiode; (b) photo-Darlington; (c) photo-SCR. n
–
VAK G
p Gate
n +
17.15 PROGRAMMABLE UNIJUNCTION TRANSISTOR
● VGK
Although there is a similarity in name, the actual construction and mode of operation of the – –
K
programmable unijunction transistor (PUT) are quite different from those of the unijunc-
Cathode
tion transistor. The fact that the I–V characteristics and applications of each are similar
prompted the choice of labels. FIG. 17.60
As indicated in Fig. 17.60, the PUT is a four-layer pnpn device with a gate connected Programmable UJT (PUT).
directly to the sandwiched n-type layer. The symbol for the device and the basic biasing
arrangement appear in Fig. 17.61. As the symbol suggests, it is essentially an SCR with
869
870 pnpn AND OTHER
DEVICES

FIG. 17.61
Basic biasing arrangement for the PUT.

a control mechanism that permits a duplication of the characteristics of the typical SCR.
The term programmable is applied because RBB, h, and VP as defined for the UJT can be
controlled through the resistors RB1, RB2, and the supply voltage VBB. Note in Fig. 17.61 that
through an application of the voltage-divider rule, when IG = 0,

RB1
VG = VBB = hVBB (17.19)
RB1 + RB2

RB1
where h =
RB1 + RB2
as defined for the UJT.
The characteristics of the device appear in Fig. 17.62. As noted on the diagram, the “off”
state (I low, V between 0 and VP) and the “on” state (I Ú IV, V Ú VV) are separated by
the unstable region as occurred for the UJT. That is, the device cannot stay in the unstable
state—it will simply shift to either the “off” or the “on” stable state.

VAK

VP

Unstable
region (−R)
Off state

VF
VV
On state

IA
IP IV IF

FIG. 17.62
PUT characteristics.

The firing potential VP, or voltage necessary to “fire” the device, is given by

VP = hVBB + VD (17.20)

as defined for the UJT. However, VP represents the voltage drop VAK in Fig. 17.60 (the for-
ward voltage drop across the conducting diode). For silicon, VD is typically 0.7 V. Therefore,
VAK = VAG + VGK
VP = VD + VG

and VP = hVBB + 0.7 V silicon (17.21)

We noted above, however, that VG = hVBB, with the result that PROGRAMMABLE 871
UNIJUNCTION
TRANSISTOR
VP = VG + 0.7 silicon (17.22)

Recall that for the UJT, RB1 and RB2 represent the bulk resistance and the ohmic base con-
tacts of the device—both inaccessible. In the development above, we note that RB1 and RB2
are external to the device, permitting an adjustment of h and hence VG above. In other words,
the PUT provides a measure of control on the level of VP required to turn on the device.
Although the characteristics of the PUT and UJT are similar, the peak and valley currents
of the PUT are typically lower than those of a similarly rated UJT. In addition, the minimum
operating voltage is also less for a PUT.
If we take a Thévenin equivalent of the network to the right of the gate terminal in Fig.
17.61, the network of Fig. 17.63 results. The resulting resistance RS is important because it
is often included in specification sheets since it affects the level of IV.

RB1 RB2
IG RS =
RB1+ RB2 +
VS = ηVBB
–

Thevenin
´ equivalent

FIG. 17.63
Thévenin equivalent for the network to the right of the
gate terminal in Fig. 17.61.

The basic operation of the device can be reviewed through reference to Fig. 17.62. A
device in the “off” state will not change state until the voltage VP as defined by VG and VD
is reached. The level of current until IP is reached is very low, resulting in an open-circuit
equivalent since R = V (high)>I (low) will result in a high resistance level. When VP is
reached, the device will switch through the unstable region to the “on” state, where the volt-
age is lower but the current higher, resulting in a terminal resistance R = V (low)>I(high),
which is quite small, representing a short-circuit equivalent on an approximate basis. The
device has therefore switched from essentially an open-circuit to a short-circuit state at a
point determined by the choice of RB1, RB2, and VBB. Once the device is in the “on” state,
the removal of VG will not turn the device off. The level of voltage VAK must be dropped
sufficiently to reduce the current below a holding level.

EXAMPLE 17.2 Determine RB1 and VBB for a silicon PUT if it is determined that
h = 0.8, VP = 10.3 V, and RB2 = 5 k⍀.
Solution:
RB2
Eq. (17.4): h = = 0.8
RB1 + RB2
RB1 = 0.8(RB1 + RB2)
0.2RB1 = 0.8RB2
RB1 = 4RB2
RB1 = 4(5 k⍀) = 20 k
Eq. (17.20): VP = hVBB + VD
10.3 V = (0.8)(VBB) + 0.7 V
9.6 V = 0.8VBB
VBB = 12 V
872 pnpn AND OTHER Relaxation Oscillator
DEVICES
One popular application of the PUT is in the relaxation oscillator of Fig. 17.64. The instant
the supply is connected, the capacitor will begin to charge toward VBB volts since there is
VBB no anode current at this point. The charging curve appears in Fig. 17.65. The period T
required to reach the firing potential VP is given approximately by

VBB
R T RC loge (17.23)
VBB - VP
IA RB2

or, when VP hVBB,

A
G
RB1
T RC loge a 1 + b (17.24)
RB2
C
K
RB1
RK
vA v

FIG. 17.64
PUT relaxation oscillator.

FIG. 17.65
Charging wave for the capacitor C of Fig. 17.64.

The instant the voltage across the capacitor equals VP, the device will fire and a current
IA = IP will be established through the PUT. If R is too large, the current IP cannot be
established and the device will not fire. At the point of transition,
IPR = VBB - VP

VBB - VP
and Rmax = (17.25)
IP

The subscript is included to indicate that any R greater than Rmax will result in a current less
than IP. The level of R must also be such as to ensure it is less than IV if oscillations are to
occur. In other words, we want the device to enter the unstable region and then return to
the “off” state. From reasoning similar to that above, we obtain

VBB - VV
Rmin = (17.26)
IV

The discussion above requires that R be limited to the following for an oscillatory
system:
Rmin 6 R 6 Rmax
The waveforms of vA, vG, and vK appear in Fig. 17.66. Note that T determines the
maximum voltage that vA can charge to. Once the device fires, the capacitor will rapidly
discharge through the PUT and RK, producing the drop shown. Of course, vK will peak at
the same time due to the brief but heavy current. The voltage vG will rapidly drop from VG
to a level just greater than 0 V. When the capacitor voltage drops to a low level, the PUT
will once again turn off and the charging cycle will be repeated. The effect on VG and VK
is shown in Fig. 17.66.
 vA PROGRAMMABLE 873
VP UNIJUNCTION
TRANSISTOR

0 t
T

vK
VK = VA − VV

0 t

vG
VG = ηVBB

0 t

FIG. 17.66
Waveforms for PUT oscillator of Fig. 17.64.

EXAMPLE 17.3 For the network of Fig. 17.64, if VBB = 12 V, R = 20 k⍀, C = 1 mF,
RK = 100 ⍀, RB1 = 10 k⍀, RB2 = 5 k⍀, IP = 100 mA, VV = 1 V, and IV = 5.5 mA,
determine:
a. VP.
b. Rmax and Rmin.
c. T and frequency of oscillation.
d. The waveforms of vA, vG, and vK.

Solution:
a. Eq. (17.20): VP = hVBB + VD
RB1
= V + 0.7 V
RB1 + RB2 BB
10 k⍀
= (12 V) + 0.7 V
10 k⍀ + 5 k⍀
= (0.67)(12 V) + 0.7 V = 8.7 V
VBB - VP
b. From Eq. (17.25): Rmax =
IP
12 V - 8.7 V
= = 33 k
100 mA
VBB - VV
From Eq. (17.26): Rmin =
IV
12 V - 1 V
= = 2k
5.5 mA
R: 2 k⍀ 6 20 k⍀ 6 33 k⍀
VBB
c. Eq. (17.23): T = RC loge
VBB - VP
12 V
= (20 k⍀)(1 mF) loge
12 V - 8.7 V
= 20 * 10-3 loge (3.64)
874 pnpn AND OTHER = 20 * 10-3(1.29)
DEVICES
= 25.8 ms
1 1
f = = = 38.8 Hz
T 25.8 ms
d. Indicated in Fig. 17.67.

vA
8.7 V

0 t
25.8 ms

vK
VK = VA − VV = 8.7 V − 1 V = 7.7 V

0 t

vG
VG = η VBB = 8 V

0 t

FIG. 17.67
Waveforms for the oscillator of Example 17.3.

17.16 SUMMARY
●
Important Conclusions and Concepts
1. The silicon-controlled rectifier (SCR) is a rectifier whose state is controlled by the
magnitude of the gate current. The forward-bias voltage across the device will
determine the level of gate current required to “fire” (turn on) the device. The higher
the level of biasing voltage, the less is the required gate current.
2. In addition to gate triggering, an SCR can be turned on with zero gate current sim-
ply by applying sufficient voltage across the device. The higher the gate current,
however, the less is the required biasing voltage to turn the SCR on.
3. The silicon-controlled switch has both an anode gate and a cathode gate for con-
trolling the state of the device, although the anode gate is now connected to an n-type
layer and the cathode gate to a p-type layer. The result is that a negative pulse at the
anode gate will turn the device on, whereas a positive pulse will turn it off. The
reverse is true for the cathode gate.
4. A gate turn-off switch (GTO) looks similar in construction to the SCR with only one
gate connection, but the GTO has the added advantage of being able to turn the device
off and on at the gate terminal. However, this added option of being able to turn the
device off at the gate results in a much higher gate current to turn the device on.
5. The LASCR is a light-activated SCR whose state can be controlled by light falling on
a semiconductor layer of the device or by triggering the gate terminal in a manner
described for SCRs. The higher the junction temperature of the device, the less is the
required incident light to turn the device on.
6. The Shockley diode has essentially the same characteristics as an SCR with zero
gate current. It is turned on by simply increasing the forward-bias voltage across the
device beyond the breakover level.
 7. The diac is essentially a Shockley diode that can fire in either direction. The appli- PROBLEMS 875
cation of sufficient voltage of either polarity will turn the device on.
8. The triac is fundamentally a diac with a gate terminal to control the action of the
device in either direction.
9. The unijunction transistor is a three-terminal device with a p–n junction formed
between an aluminum rod and an n-type silicon slab. Once the emitter firing potential is
reached, the emitter voltage will drop with an increase in emitter current, establishing a
negative-resistance region excellent for oscillator applications. Once the valley point is
reached, the characteristics of the device take on those of a semiconductor diode. The
higher the applied voltage across the device, the higher is the emitter firing potential.
10. The phototransistor is a three-terminal device having characteristics very similar to
those of a BJT with a base and collector current sensitive to the incident light intensity.
The base current that results is essentially linearly related to the applied light with a
level almost independent of the voltage across the device until breakdown results.
11. Opto-isolators contain an infrared LED and a photodetector to provide a linkage
between systems that does not require a direct connection. The output detector current
is less than but linearly related to the applied input LED current. Furthermore,
the collector current is essentially independent of the collector-to-emitter voltage.
12. The PUT (programmable unijunction transistor) is, as the name implies, a device with
the characteristics of a UJT but with the added capability of being able to control
the firing potential. In general, the peak, valley, and minimum operating voltages of
PUTs are less than those of UJTs.

Equations
Diac:
VBR1 = VBR2 { 0.1VBR2

RBB = (RB1 + RB2) 0 IE = 0

UJT:

VRB1 =
RB1
# V = hVBB `
RB1 + RB2 BB IE = 0
RB1
h =
RBB
VP = hVBB + VD
Phototransistor:
IC hfeIl
PUT:
RB1
VG = # VBB = hVBB
RB1 + RB2
VP = hVBB + VD

PROBLEMS
●
*Note: Asterisks indicate more difficult problems.
17.3 Basic Silicon-Controlled Rectifier Operation
1. Describe in your own words the basic behavior of the SCR using the two-transistor equivalent
circuit.
2. Describe two techniques for turning an SCR off.
3. Consult a manufacturer’s manual or specification sheet and obtain a turn-off network. If pos-
sible, describe the turn-off action of the design.
17.4 SCR Characteristics and Ratings
*4. a. At high levels of gate current, the characteristics of an SCR approach those of what two-
terminal device?