Digital Logic Design

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The Superior University, Lahore

Faculty of Computer Science & Information Technology


Course Outline
Course Course Title Digital Logic and Design (DLD)
Information Course ID Course Type Computing Core
Credit hours 3(2+1) Hours per week (C-L) 2-0
Program(s) ADP Computer Science Preferred Semester 1st
Date Version
Offered Program(s) ADP Computer Science Semester Session
Course Instructor(s) TA / Lab Engineer
Information QCH Telephone No. / Ext.
Email Class Hours
Office / Room No. Office Hours
The module of Digital Logic Design is designed to acquaint students with fundamental principles of
Course digital design. It provides coverage of classical hardware design for both combinational and sequential
Description logic circuits. Basic and advanced Knowledge will be given in this course to familiarize the students
about digital systems. Furthermore this course will help students to understand follow up advanced
course Computer System Architecture (CSA) which they will study in next coming semester. At the end
of this course students will be able to understand about data conversion, data manipulation, data
selection, data transmission, data storage, data arrangement in digital systems.
Course The objective of this course is to enable students;
Objectives No. Objective Relation with
(CO) PLO
CO1. To familiarize digital circuit of large complexity can be built in a methodological 2,6
way, starting from Boolean logic and applying a set of rigorous techniques for
computer application.
CO2. Numerous Numerical Problems will be used to illustrate how the concepts 2,6
presented in the lectures are applied in computer working.
CO3. This course will provide a bridge to future courses where alternative designs and 2,6
their performance will be studied in depth.
Course At the end of this course students will be able to;
Learning No. Outcome Relation BT Level
Outcomes with PLO
(CLO) CLO-1 To acquire knowledge, concepts, tools and techniques for the PLO-1,2 C2
design of digital electronic circuit and its applications
CLO-2 Demonstrate the skills to design and analyse both combinational PLO-3,5 C3
and sequential circuits using a variety of techniques
CLO-3 Apply the acquired knowledge to simulate and implement small- PLO-4,5 C3
scale digital circuits.
Prerequisites
Follow up Computer System Architecture (CSA)
Textbook Title Edition Authors Publisher Year ISBN
Digital Fundamentals 11th Floyd Pearson Pvt Limited 2006 0-13-197255-3
Reference Logic and Computer Design 4/E M. Morris Pearson Pvt Limited 2008 1-292-02468-2
Books Fundamentals. Mano 978-1-292-02468-4
Software and
● Students will perform Lab Work on Multi SIM Software
Tools
● Final Project will be given related to Arduino UNO
Assessment Assessment Weight Attained CLO Assessment Weight Attained CLO
Criteria Assignment 10% CLO-1,2,3 Quiz 10% CLO-2,3
(100%) Lab 10% CLO-1,2,3 Project / Presentation 10% CLO-1,2,3
Attendance - Participation
Mid Term 20% CLO-1,2 Final 40% CLO-1,2,3
Other 1 Other 2 -
Methods of Quizzes, Assignments, Mid/Final exam, Lab, Project
Evaluation
Notes Will be provided in Class

1
Week Topic Lectu Lecture Contents Relation Class Tasks
No. re No. with Activity
CLO

W1. Introduction L1. 1 Introduce Can you name at
Introduction of Course
to Digital yourself least ten both
Logic and − Discuss Module with and course analog and digital
Design and outline and devices?
students
Number assessmen When you send
System − Basic Introduction to Digital t criteria Whatsapp
Logic and Design message to your
(Book: friend what digital
Digital − Difference between digital systems are
Fundamental and analog signal/Devices involved in it?
s:
Floyd) − ADC and DAC use in Digital
Logic and design
L2. Introduction to Digital Signal 1 Lecture How digital signal

and analog signals
Digital Signal parameters
both are important,
(frequency, amplitude, time, why not we use
time period, time high, time only digital signals
low, Duty Cycle, falling only?
edge, rising edge
− Introduction to Digital Pulse

− Introduction to Digital wave

− Timing diagram

− Introduction to serial
transfer and parallel transfer
of data.

W2. Number L3. 1 Solve What is the role of
Number System
System conversion conversions in
− Introduction of Binary, from Digital logic and
(Book: students in design, explain with
Octal, Decimal and
Digital class examples?
Hexadecimal Numbers
Fundamental
s: − InterConversions of number
Floyd) system,
(Book: − 1’s & 2’s Compliments,
Logic and
Computer − Sign numbers


Design L4. 1,2 Lecture Why we use
Arithmetic Operations
Fundamental complement
s: M. Morris (Addition and subtraction of method for
Mano). decimal, hexadecimal, octal subtraction ?
and binary numbers)

W3. Codes and L5. 1,2
Decimal Codes, Alphanumeric
Logic Gates How coding is used
Codes and Conversion in our daily life
− BCD Code s in class devices make a
list?
o (binary to BCD)
(Book:
Digital o BCD to binary
Fundamental − Gray Code
s:
o (binary to BCD)
Floyd)
o BCD to binary
− ASCII Codes

2

L6. 1,2,3 Circuits Install MultiSIM
Introduction to Gates NOT,
drawing of software in Laptops
AND,OR, NAND, NOR and logic gates for verification of
applications. in class circuits.
− Universal Gates NOT, AND, OR from
students
NAND, NOR.
− XOR, XNOR Gates
W4. Boolean L7. 1,2,3 Problems Why we use

Algebra solving Boolean Algebra
Rules for Boolean algebra,

− Problem solving
(Book:
Digital
Fundamental

s: L8. 1,2,3 Quiz “Draw circuit of
Algebraic Manipulations, SOP &
Floyd) SOP and POS
POS Forms expressions on
(Book: − Standard Forms Minterms & multiSim Software.
Logic and Maxterms
Computer
Design
Fundamental
s: M. Morris
Mano).

W5. K- MAPS L9. 1,2,3, Problems Write at least 5-6
K-Map Structures for any type
solving in benefits of using k-
of SOP class map over Boolean
(Book: − K-Map Manipulations for any Algebra technique?
Digital
type of POS
Fundamental
s:

Floyd) L10. 1,2,3, Solve k- Give at least 3-4
SOP to POS & POS to SOP
map examples in which
conversions using k-maps. problems in don’t care
− Don’t Care Condition class conditions are
used.

W6. Adders and L11. 2,3 Lecture Can you make



Subtractors adder circuit which
Half-Adder
can add four bits?
(Book: − Full Adder
Digital
Fundamental
s: L12. 2,3 Presentatio What is the role of

Floyd) n subtractor in digital
Half-Subtractor,
circuits?
− Full Subtractor


W7. Encodr L13. 2,3 Video Design 5x3, 9x4
Design and Implementations of
Decoder and related to and 13x4 encoder.
Comparators Encoders application Design 4x14, 3x7
− Design and Implementation of and 2x3 decoders.
(Book:
Decoders,
Digital

Fundamental L14. 2,3 Video Design 4-bit
Design and Implementation of
s: related to comparator.
Comparator Circuits application
Floyd) 1-bit, 2- bit , 3-bit and 4-bit.

W8. Mid Term L15.


Exam Mid Term Exam Week
L16.
3

W9. Multiplexer L17. 2,3 Video Can you design 5x1,
Design and Implementations of
and related to 7x3 and 11x4 MUX?
Demultiplexe Multiplexers application
r

L18. 2,3 Video Can you design
Design and Implementations of
related to 1x15, 1x6 and 1x3
(Book: De-Multiplexer application DEMUX?
Digital
Fundamental
s:
Floyd)

W10. Latches and L19. 2,3 Animation What are benefits of
Latches
Flip Flops latches in digital
devices?
(Book:

L20. 2,3 Animation How latches are
SR and D Latches
Digital used to hold data
Fundamental − Flip-Flops, SR Flip-Flops explain in detail?
s: Why we use flip
Floyd) − JK Flip-Flops, T Flip-Flops flops?
Write the
importance of each
flip flop?


W11. Shift L21. 3 Animation Name the shift
Serial In/Serial Out, Parallel in
Registers resisters used in
/Parallel Out Laptops?

(Book: L22. 3 Animation
Parallel in/Serial Out, Serial
Digital
Fundamental in/Parallel Out
s: − Applications
Floyd)
W12. Counters L23. - Asynchronous Counters 2-bit, 3- 3 Lecture Design circuit on
bit, 4 bit MultiSIM
(Book: - Synchronous Counters 2-bit, 3- Make list of counter
Digital bit, 4 bit applications.
Fundamental

L24. 3 Lecture
Seven Segment Display
s:
Floyd)
W13. Memory and L25. - Basics of Semiconductor 3 Lecture Why we use
Storage - CMOS Memory memories make list
in different devices?

L26. 3 Lecture
RAM
(Book:
Digital − ROM
Fundamental
s: − PROM and EPROM
Floyd)

W14. Memory and L27. 3 Video
Flash Memories
Storage related to
− Memories Expansion application
(Book:
Digital

Fundamental L28. 3 Video
Special type of Memories
s: related to
Floyd) − Magnetic and Optical Memories application


W15. Programmabl L29. 3 Lecture Write a note on
Introduction to Programmable
e Logic importance of PLD?
Devices Logic Devices

L30. 3 Lecture
Introduction to Programmable
Logic Devices

4
W16. L31.
Final Term
Exam L32. Final Term Papers

5
Digital Logic and Design Lab Work
Week Topic Lab Contents / Activity Relation Home Tasks
No. with CLO
Logic Gates Introduction of Logic gates and CLO-2 Installation should be
W1. Apparatus/Components/MultiSIM software completed in first week
Installation.
Logic Gates Study of BASIC Gates CLO-2,3 Verify each gate by
W2. OR , AND, NOR, NAND, EX-OR, EX.NOR, applying IC.
NOT
Universal Gates CLO-2 Verify each gate by
W3. Study of Universal gates NAND and NOR
applying IC.
SOP and POS Draw circuit diagram and verify output CLO-2,3 Draw circuit by using gates
W4. Expressions of three variable Boolean SOP and ICs in MultiSIM
POS Expression by Truth table.
Boolean algebra Implementation of Boolean algebra on CLO-2 Draw circuit by using gates
W5. in ICs
a Boolean Expression.
k-map Implementation of k-map on a Boolean CLO-2,3 Draw circuit by using gates
W6. in ICs
Expression.
Codes Design a circuit which can give 4-bits CLO-2 Draw circuit by using gates
W7. in ICs
Gray Code.

W8.

Mid Term Exam
Mid Evaluation
Applications of CLO-2 Design an adder who
W9. combinational Study of Half Adder and Full Adder can add 4 bits
Logic
Applications of CLO-2,3 Design an adder who
W10.
combinational Study of Half Sub tractor and full Sub can add 4 bits
Logic tractor and verification
Applications of CLO-2
W11.
combinational Use ICs in your circuits
Logic Study of 8x1,10x1 and 16x1 Multiplexer
Applications of CLO-2,3
W12.
combinational Study of1x8, 1x10 and 1x16 De- Use ICs in your circuits
Logic multiplexer
Applications of CLO-2 Use ICs in your circuits
W13.
combinational
Logic Study of 8x3, 10x4, 16x4 encoder.
Applications of CLO-2,3 Use ICs in your circuits
W14.
combinational
Logic Study of 3x8, 4x10, 4x16 decoder.
Sequential CLO-2
W15.
Circuits Draw JK Master-Slave Flip
Application SR Flip Flop Verification Flop
Sequential Study of 7-Segment Display CLO-2,3 Draw circuit of Clock
W16.
Circuits
Application


W17. Final Term
Final examination
Exams

6
Rubric for LAB on MultiSim/Proteus Software
All marks related to Lab will be allocated by Lab demonstrators.

RUBICS MARKS DISTRIBUTION


Attendance (15 No of Labs) x 0.2 = 3 Marks
(If any student in the class did not meet 70%
attendance in Lab then he/she would not be able to
submit Lab report)
Lab Report 4 Marks

Lab Performance in each Lab 15 (No of Labs) x 0.2 = 3 Marks


Total Marks 10

Rubric for Project


Arduino based DLD Projects will be assigned by Class Instructor in groups.

RUBICS MARKS DISTRIBUTION


Project Circuitry 10 Marks
(Lab demonstrator’s will help students for circuit These marks will be given by Lab
making and project running) demonstrator’s

Project Report 5 Marks


Students will submit project report in this pattern These marks will be given by Class instructor
1. Project Title OR Lab demonstrator’s
2. List of Components used with pictures
3. Code for arduino Programming
4. Picture of Project made by Student
5. Cost of the Project
6. References

Project Worth OR Exhibition Response 5 Marks


These marks will be given by Class instructor
OR Lab demonstrator’s
Total Marks 20

7
Resource Name Muhammad Hamza Rauf

Resource Designation Project Manager


Organization Name Arcadian Lab
Minutes of Meeting It is enough for field work initial level

Resource Name Zeeshan Javid

Resource Designation IT Manager


Organization Name Zenith Chemical Industries Pvt Ltd
Minutes of Meeting This is sufficient for students if they become to join the field

Resource Name Muhammad Wasif Bhatti

Resource Designation Veripark


Organization Name Senior Software Engineer
Minutes of Meeting Basically it is comprehensive topics which market person need to learn

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