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I/O Interface
Input/ Output Devices

• Input / Output devices are the means through which the
microcomputer unit communicates with the outside world.
• The link between the I/O devices and the microprocessor is
maintained by a circuitry known as I/O module.
• For interfacing of typical microprocessor to I/O devices such
as keyboard, CRT, printer etc. All need I/O interface circuits
which are of mainly two types.
1.Serial Interface
• Data are transferred serially one bit at a time starting from Least Significant bit.
• Slow due to single communication link but inexpensive to implement.
• It uses clock to separate consecutive bits.
• Its function is to deal with the data on the bus in the parallel mode and communicate with the connected device in
serial mode.
• Its data bus has n data lines, the serial I/O interface accepts n bit of data simultaneously from the bus and n bits are
sent one at a time thus requiring n time slots.
• Not suitable for fast operation needed microprocessor.
1) Synchronous serial data transmission:
• Data is transmitted or received based on a clock signal i. e.

synchronously.
• - The transmitting device sends a data bit at each clock pulse.
• - Usually one or more SYNC characters are used to indicate the
start of each synchronous data stream.
• - SYNC characters for each frame of data.
• - Transmitting device sends data continuously to the receiving
device. If the data is not ready to be transmitted, the
transmitter will send SYNC character until the data is available.
• - The receiving device waits for data, when it finds the SYNC
characters then starts interpreting the data.
2)Asynchronous serial data Transmission:
• The receiving device does not need to be synchronized with the transmitting
device.
• - Transmitting device send data units when it is ready to send data.
• Each data unit must contain start and stop bits for indicating beginning and
the end of data unit. And also one parity bit to identify odd or even parity
data.
• - For e.g. To send ASCII character (7 bit)
• - We need:
• 1 start bit: beginning of data
• 1 stop bit: End of data
• 1 Parity bit: even or odd parity
• 7 or 8 bit character: actual data transferred
Synchronous vs. Asynchronous Data Transmission
• Asynchronous Communication • Synchronous Communication

• Simple interface (limited data rate, typically < 64
kbps) • Clock sent with data (more
configuration options).
• Used for connecting: Printer, Terminal, Modem, home
connections to the Internet • Synchronised transmit & receive clocks.
• No clock sent (Tx & Rx have own clocks)
• More complex interface (high data
• Requires start and stop bits which provides byte rates supported up to ~ 10 Gbps)
timing and increases overhead
• Parity often used to validate correct reception. • Used for: Connections between
• Independent transmit & receive clocks
computer and telephony networks.
Universal Synchronous Asynchronous Receiver
Transmitter (USART) – 8251A
• The 8251A is a programmable serial communication interface chip designed for

synchronous and asynchronous serial data communication.
• It supports the serial transmission of data.
2. Parallel Interface
• The device which can handle data at higher speed cannot support
with serial interface.
• N bits of data are handled simultaneously by the bus and the links to
the device directly.
• Achieves faster communication but becomes expensive due to need
of multiple wires.
• The techniques used to transfer data between different speed devices
and computer is called synchronizing. Different techniques under
synchronizing are:
1) Simple I/O
• For simple I/O, the buffer switch and latch
switches i. e. LED are always connected to
the input and output ports.
• The devices are always ready to send or
receive data.
• Here cross line indicate the time for new
valid data.
2) Wait
Interface(
Simple strobe
I/O)
In this technique, MP need to
wait until the device is ready
for the operation.
3) Single Handshaking:
• The peripheral outputs some data and send 𝑆𝑇𝐵
signal to MP. “here is the data for you.”
• - MP detects asserted 𝑆𝑇𝐵signal, reads the data
and sends an acknowledge signal (ACK) to
indicate data has been read and peripheral can
send next data. “I got that one, send me
another.”
• - MP sends or receives data when peripheral is
ready.
4) Double Handshaking
• The peripheral asserts its 𝑆𝑇𝐵line low to ask MP “Are you ready?”
• - The MP raises its ACK line high to say “ I am ready”.
• - Peripheral then sends data and raises its𝑆𝑇𝐵 line low to say “Here is
some valid data for you.”
• - MP then reads the data and drops its ACK line to say, “I have the
data, thank you, and I await your request to send the next byte of
data.”
Programmable Peripheral
Interface (PPI) - 8255A:
• The INTEL 8255 is a device used to parallel data transfer
between processor and slow peripheral devices like ADC,
DAC, keyboard, 7-segment display, LCD, etc.
• The 8255 has three ports: Port-A, Port-B and Port-C.
• Port-A can be programmed to work in any one of the three
operating modes mode-0, mode-1 and mode-2 as input or
output port.
• Port-B can be programmed to work either in mode-0 or
mode-1 as input or output port.
• Port-C (8-pins) has different assignments depending on the
mode of port-A and port-B.
• If port-A and B are programmed in mode-0, then the port-C can
perform any one of the following functions.
• As 8-bit parallel port in mode-0 for input or output.
• As two numbers of 4-bit parallel ports in mode-0 for input or output.
• The individual pins of port-C can be set or reset for various control
applications.
• If port-A is programmed in mode- 1/mode-2 and port-B is
programmed in mode-1 then some of the pins of port-C are used for
handshake signals and the remaining pins can be used as input/
output lines or individually set/reset for control application.
• Key Features of Mode-0,Mode-1 and Mode-2
• Mode 0: Ports A and B operate as either inputs or outputs and Port C
is divided into two 4-bit groups either of which can be operated as
inputs or outputs
• Mode 1: Same as Mode 0 but Port C is used for handshaking and
control
• Mode 2: Port A is bidirectional (both input and output) and Port C is
used for handshaking. Port B is not used.
• The read/write control logic requires six control signals. These signals are given
below.
• 1. RD (low): This control signal enables the read operation. When this signal is
low, the microprocessor reads data from a selected I/O port of the 8255A.
• 2. WR (low): This control signal enables the write operation. When this signal
goes low, the microprocessor writes into a selected I/O port or the control
register.
• 3. RESET: This is an active high signal. It clears the control register and set all ports
in the input mode.
• 4. CS (low), A0 and A1: These are device select signals. They are,
Internal devices A1 A0
Port A 0 0
Port B 0 1
Port C 1 0
Control Register 1 1
RS -232
• RS-232C is an interface developed to standardize the interface between data terminal
equipment (DTE) and data communication equipment (DCE) employing serial binary data
exchange. Modem and other devices used to send serial data are called data
communication equipment (DCE). The computers or terminals that are sending or
receiving the data are called data terminal.
• - Equipment (DTE) RS- 232C is the interface standard developed by electronic industries
Association (EIA) in response to the need for the signal and handshake standards
between the DTE and DCE.
• - It uses 25 pins (DB – 25P) or 9 Pins (DE – 9P) standard where 9 pin standard does not
use all signals i. e. data, control, timing and ground.
• - It describes the voltage levels, impendence levels, rise and fall times, maximum bit rate
and maximum capacitance for all signal lines.
• - It also specifies that DTE connector should be male and DCE
connector should be female.
• - It can send 20kBd for a distance of 50 ft.
• The voltage level for RS-232 are:
• o A logic high or 1 , -3V to -15V
• o A logic low or 0, +3v to +15v
• Normally ±12V voltage levels are used
• Mc1488 converts logic 1 to -9V
• Logic 0 to +9v
• - Mc1485 converts RS – 232 to TTL
• - Signal levels of RS-232 are not compatible with that of the DTE and DCE which are TTL
signals for that line driver such as M 1488 and line receiver MC1485 are used.
Flow DE-9P DB-25P Signal Description
DTE to DCE 3 2 TxD Transmitted data
DCE to DTE 2 3 RxD Received data
DTE to DCE 7 4 RTS Request to send
DCE to DTE 8 5 CTS Clear to send
DCE to DTE 6 6 DSR Data set ready
Common ref. 5 7 GND Signal ground
DCE to DTE 1 8 DCD Data carrier detect
DTE to DCE 4 20 DTR Data terminal ready

Keyboard & Display Controller:8279
• The intel 8279 is specially developed for interfacing keyboard and
display devices to 8085/8086/8088 microprocessors based system.
Block Diagram
Ø It consists 4 main section.
1. CPU interface and control section.
2. Scan section
3. Keyboard Section
4. Display section.
CPU INTERFACE AND CONTROL SECTION:

It consists of
1. Data buffers
2. I/O control
3. Control and timing registers.
4. Timing and control logic.

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I/O Interface

Input/ Output Devices

• Data is transmitted or received based on a clock signal i. e.

• Asynchronous Communication • Synchronous Communication

• The 8251A is a programmable serial communication interface chip designed for

DTE to DCE 3 2 TxD Transmitted data

DCE to DTE 2 3 RxD Received data

DTE to DCE 7 4 RTS Request to send

DCE to DTE 8 5 CTS Clear to send

DCE to DTE 6 6 DSR Data set ready

Common ref. 5 7 GND Signal ground

DCE to DTE 1 8 DCD Data carrier detect

DTE to DCE 4 20 DTR Data terminal ready

CPU INTERFACE AND CONTROL SECTION:

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