LTC1627

Monolithic Synchronous
Step-Down Switching Regulator
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FEATURES DESCRIPTIO
■ High Efficiency: Up to 96% The LTC®1627 is a monolithic current mode synchronous
■ Constant Frequency 350kHz Operation buck regulator using a fixed frequency architecture. The
■ 2.65V to 8.5V VIN Range operating supply range is from 8.5V down to 2.65V, making
■ VOUT from 0.8V to VIN, IOUT to 500mA it suitable for one or two lithium-ion battery-powered appli-
■ No Schottky Diode Required cations. Burst Mode operation provides high efficiency at
■ Synchronizable Up to 525kHz low load currents. 100% duty cycle provides low dropout
■ Selectable Burst ModeTM Operation operation, which extends operating time in battery-operated
■ Low Dropout Operation: 100% Duty Cycle systems.
■ Precision 2.5V Undervoltage Lockout
■ Secondary Winding Regulation The operating frequency is internally set at 350kHz, allowing
■ Current Mode Operation for Excellent Line and the use of small surface mount inductors. For switching noise
Load Transient Response sensitive applications it can be externally synchronized up to
■ Low Quiescent Current: 200µA 525kHz. The SYNC/FCB control pin guarantees regulation of
■ Shutdown Mode Draws Only 15µA Supply Current secondary windings regardless of load on the main output by
■ ±1.5% Reference Accuracy forcing continuous operation. Burst Mode operation is inhib-
■ Available in 8-Lead SO Package ited during synchronization or when the SYNC/FCB pin is
U pulled low to reduce noise and RF interference. Soft-start is
APPLICATIO S provided by an external capacitor.
■ Cellular Telephones Optional bootstrapping enhances the internal switch drive for
■ Portable Instruments single lithium-ion cell applications. The internal synchronous
■ Wireless Modems switch increases efficiency and eliminates the need for an
■ RF Communications external Schottky diode, saving components and board
■ Distributed Power Systems space. The LTC1627 comes in an 8-lead SO package.
■ Scanners , LTC and LT are registered trademarks of Linear Technology Corporation.
■ Single and Dual Cell Lithium Burst Mode is a trademark of Linear Technology Corporation.

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TYPICAL APPLICATIO 100
VOUT = 3.3V VIN = 3.6V
95
1 8 VIN = 6V
ITH SYNC/FCB
47pF 90
EFFICIENCY (%)

2 7
CSS RUN/SS VDR
0.1µF LTC1627 VIN
3 6 85 VIN = 8.4V
VFB VIN 2.8V*
L1 15µH TO 8.5V
4 5 VOUT + CIN 80
GND SW 22µF
COUT + 3.3V
16V
100µF 249k 75
6.3V

70
*VOUT CONNECTED TO VIN FOR 2.8V < VIN < 3.3V 1 10 100 1000
80.6k
OUTPUT CURRENT (mA)
1627 F01a
1627 F01b

Figure 1a. High Efficiency Step-Down Converter Figure 1b. Efficiency vs Output Load Current

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LTC1627
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ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO
(Note 1)
Input Supply Voltage ................................ – 0.3V to 10V TOP VIEW
ORDER PART
Driver Supply Voltage (VIN – VDR) ........... – 0.3V to 10V NUMBER
ITH 1 8 SYNC/FCB
ITH Voltage .................................................. – 0.3V to 5V
Run/SS, VFB Voltages ................................ – 0.3V to VIN RUN/SS 2 7 VDR LTC1627CS8
Sync/FCB Voltage ...................................... – 0.3V to VIN VFB 3 6 VIN LTC1627IS8
VDR Voltage (VIN ≤ 5V) ............................... – 5V to 0.3V GND 4 5 SW

P-Channel Switch Source Current (DC) .............. 800mA S8 PACKAGE

S8 PART MARKING
8-LEAD PLASTIC SO
N-Channel Switch Sink Current (DC) .................. 800mA
1627
Peak SW Sink and Source Current ......................... 1.5A TJMAX = 125°C, θJA = 110°C/ W
1627I
Operating Ambient Temperature Range
Commercial ............................................ 0°C to 70°C Consult factory for Military grade parts.
Industrial ........................................... – 40°C to 85°C
Junction Temperature (Note 2) ............................. 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C

ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IVFB Feedback Current (Note 3) 20 60 nA
VFB Regulated Feedback Voltage (Note 3) ● 0.788 0.80 0.812 V
∆VOVL ∆Output Overvoltage Lockout ∆VOVL = VOVL – VFB 20 60 110 mV
∆VFB Reference Voltage Line Regulation VIN = 2.8V to 8.5V (Note 3) 0.002 0.01 %/V
VLOADREG Output Voltage Load Regulation ITH Sinking 2µA (Note 3) 0.5 0.8 %
ITH Sourcing 2µA (Note 3) – 0.5 – 0.8 %
IS Input DC Bias Current (Note 4)
Synchronized VIN = 8.5V, VOUT = 3.3V, Frequency = 525kHz 450 µA
Burst Mode Operation VITH = 0V, VIN = 8.5V, VSYNC/FCB = Open 200 320 µA
Shutdown VRUN/SS = 0V, 2.65V < VIN < 8.5V 15 35 µA
Shutdown VRUN/SS = 0V, VIN < 2.65V 6 µA
VRUN/SS Run/SS Threshold 0.4 0.7 1.0 V
IRUN/SS Soft-Start Current Source VRUN/SS = 0V 1.2 2.25 3.3 µA
VSYNC/FCB Auxiliary Feedback Threshold VSYNC/FCB Ramping Negative 0.730 0.8 0.860 V
ISYNC/FCB Auxiliary Feedback Current VSYNC/FCB = 0V 0.5 1.5 2.5 µA
fOSC Oscillator Frequency VFB = 0.8V 315 350 385 kHz
VFB = 0V 35 kHz
VUVLO Undervoltage Lockout VIN Ramping Down from 3V (–40°C to 85°C) 2.3 2.50 2.65 V
VIN Ramping Up from 0V (–40°C to 85°C) 2.65 2.85 V
VIN Ramping Down from 3V (0°C to 70°C) 2.4 2.50 2.65 V
VIN Ramping Up from 0V (0°C to 70°C) 2.65 2.80 V
RPFET RDS(ON) of P-Channel FET (VIN – VDR) = 5V, ISW = 100mA 0.5 0.7 Ω
RNFET RDS(ON) of N-Channel FET ISW = – 100mA 0.6 0.8 Ω
ILSW SW Leakage VRUN/SS = 0V ±10 ±1000 nA

Note 1: Absolute Maximum Ratings are those values beyond which the life Note 3: The LTC1627 is tested in a feedback loop that servos VFB to the
of a device may be impaired. balance point for the error amplifier (VITH = 0.8V).
Note 2: TJ is calculated from the ambient temperature TA and power Note 4: Dynamic supply current is higher due to the gate charge being
dissipation PD according to the following formula: delivered at the switching frequency.
TJ = TA + (PD • 110°C/W)

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 LTC1627
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TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Input Voltage Efficiency vs Load Current Efficiency vs Load Current
100 100 100
VIN = 3.6V
VOUT = 2.5V Burst Mode
95 95 L = 15µH OPERATION
95 VDR = 0V
ILOAD = 100mA VDR = 0V
90 90

EFFICIENCY (%)
EFFICIENCY (%)
EFFICIENCY (%)

ILOAD = 300mA
90 VDR = – VIN
85 85
ILOAD = 10mA SYNCHRONIZED
85 AT 525kHz
80 80
FORCED
VOUT = 2.5V VIN = 3.6V CONTINUOUS
80 L = 15µH 75 VOUT = 2.5V 75
VDR = 0V L = 15µH
Burst Mode OPERATION Burst Mode OPERATION
75 70 70
0 2 4 6 8 10 1 10 100 1000 1 10 100 1000
INPUT VOLTAGE (V) OUTPUT CURRENT (mA) OUTPUT CURRENT (mA)
1627 G01 1627 G02 1627 G03

Undervoltage Lockout Threshold DC Supply Current*

Efficiency vs Load Current vs Temperature vs Input Voltage
100 2.75 550
TJ = 25°C
UNDERVOLTAGE LOCKOUT THRESHOLD (V)

VIN = 2.8V 2.70 500 VOUT = 1.8V

95
2.65 450

BATTERY VOLTAGE (V)

VIN = 3.6V SYNCHRONIZED AT 525kHz
90 2.60 VIN 400
EFFICIENCY (%)

RAMPING UP
2.55 350
85
2.50 300
VIN = 7.2V
80 2.45 250
VIN
VOUT = 2.5V 2.40 RAMPING DOWN 200
75 L = 15µH Burst Mode OPERATION
VDR = 0V 2.35 150
Burst Mode OPERATION
70 2.30 100
1 10 100 1000 – 50 – 25 0 25 50 75 100 125 2.5 3.5 4.5 5.5 6.5 7.5 8.5
OUTPUT CURRENT (mA) TEMPERATURE (°C) INPUT VOLTAGE (V)
1627 G04 1627 G05 1627 G06

*DOES NOT INCLUDE GATE CHARGE CURRENT

Supply Current in Shutdown Reference Voltage Forced Continuous Threshold

vs Input Voltage vs Temperature Voltage vs Temperature
FORCED CONTINUOUS THRESHOLD VOLTAGE (V)

22 0.808 0.808
VRUN/SS = 0V VIN = 5V VIN = 5V
SUPPLY CURRENT IN SHUTDOWN (µA)

20 0.806 0.806
TJ = 85°C
18 0.804 0.804
REFERENCE VOLTAGE (V)

TJ = 25°C
16 0.802 0.802

14 0.800 0.800

12 0.798 0.798
TJ = – 40°C
10 0.796 0.796

8 0.794 0.794

6 0.792 0.792

4 0.790 0.790
2.5 3.5 4.5 5.5 6.5 7.5 8.5 – 50 – 25 0 25 50 75 100 125 – 50 – 25 0 25 50 75 100 125
INPUT VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C)
1627 G07 1627 G08 1627 G09

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 LTC1627
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TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency Oscillator Frequency Maximum Output Load Current
vs Temperature vs Input Voltage vs Input Voltage
390 390 1100
VIN = 5V VSYNC/FCB = 0V

MAXIMUM OUTPUT LOAD CURRENT (mA)

380 VSYNC/FCB = 0V 380 1000 VDR = –VIN
OSCILLATOR FREQUENCY (kHz)

OSCILLATOR FREQUENCY (kHz)

370 370 900
VDR = 0V
360 360 800

350 350 700

340 340 600

330 330 500

320 320 400

310 310 300 VOUT = 2.5V

L = 15µH
300 300 200
– 50 – 25 0 25 50 75 100 125 2.5 3.5 4.5 5.5 6.5 7.5 8.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5
TEMPERATURE (°C) INPUT VOLTAGE (V) INPUT VOLTAGE (V)
1627 G10 1627 G11 1627 G12

Switch Leakage Current Switch Resistance Switch Resistance

vs Temperature vs Temperature vs Input Voltage
1800 0.9 0.9
VIN = 8.4V VIN = 5V VDR = 0V
SYNCHRONOUS SWITCH LEAKAGE (nA)

1600 VDR = 0V 0.8 VDR = 0V 0.8

1400 0.7 SYNCHRONOUS 0.7

SWITCH RESISTANCE (Ω)

SWITCH RESISTANCE (Ω)

SWITCH SYNCHRONOUS SWITCH

1200 0.6 0.6

1000 0.5 0.5

SYNCHRONOUS MAIN MAIN SWITCH
800 0.4 SWITCH 0.4
SWITCH
600 0.3 0.3

400 0.2 0.2

MAIN 0.1
200 0.1
SWITCH
0 0 0
– 50 – 25 0 25 50 75 100 125 – 50 – 25 0 25 50 75 100 125 2.5 3.5 4.5 5.5 6.5 7.5 8.5
TEMPERATURE (°C) TEMPERATURE (°C) INPUT VOLTAGE (V)
1627 G13 1627 G14 1627 G15

Load Step Transient Response Load Step Transient Response Burst Mode Operation

ITH ITH
0.5V/DIV 0.5V/DIV SW
5V/DIV

VOUT VOUT VOUT

50mV/DIV 50mV/DIV 20mV/DIV
AC COUPLED AC COUPLED AC COUPLED

ILOAD ILOAD ILOAD

500mA/DIV 500mA/DIV 200mA/DIV

1627 G16 1627 G17 1627 G18

25µs/DIV 25µs/DIV 10µs/DIV
VIN = 5V VIN = 5V VIN = 5V
VOUT = 3.3V VOUT = 3.3V VOUT = 3.3V
L = 15µH L = 15µH L = 15µH
CIN = 22µF CIN = 22µF CIN = 22µF
COUT = 100µF COUT = 100µF COUT = 100µF
ILOAD = 0mA TO 500mA ILOAD = 0mA TO 500mA ILOAD = 50mA
Burst Mode OPERATION FORCED CONTINUOUS MODE

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 LTC1627
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PI FU CTIO S
ITH (Pin 1): Error Amplifier Compensation Point. The VIN (Pin 6): Main Supply Pin. Must be closely decoupled
current comparator threshold increases with this control to GND, Pin 4.
voltage. Nominal voltage range for this pin is 0V to 1.2V.
VDR (Pin 7): Top Driver Return Pin. This pin can be
RUN/SS (Pin 2): Combination of Soft-Start and Run bootstrapped to go below ground to improve efficiency at
Control Inputs. A capacitor to ground at this pin sets the low VIN (see Applications Information).
ramp time to full current output. The time is approximately
0.5s/µF. Forcing this pin below 0.4V shuts down all the SYNC/FCB (Pin 8): Multifunction Pin. This pin performs
circuitry. three functions: 1) secondary winding feedback input, 2)
external clock synchronization and 3) Burst Mode opera-
VFB (Pin 3): Feedback Pin. Receives the feedback voltage tion or forced continuous mode select. For secondary
from an external resistive divider across the output. winding applications connect a resistive divider from the
GND (Pin 4): Ground Pin. secondary output. To synchronize with an external clock
apply a TTL/CMOS compatible clock with a frequency
SW (Pin 5): Switch Node Connection to Inductor. This pin between 385kHz and 525kHz. To select Burst Mode opera-
connects to the drains of the internal main and synchro- tion, float the pin or tie it to VIN. Grounding Pin 8 forces
nous power MOSFET switches. continuous operation (see Applications Information).

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FU CTIO AL DIAGRA

BURST Y = “0” ONLY WHEN X IS A CONSTANT “1”

DEFEAT VIN VIN
Y
VIN X

1.5µA

SYNC/FCB SLOPE
8 COMP
OSC 0.4V

–
0.6V
VFB
+ 6 VIN
3 –
FREQ
EN
SHIFT + –
VIN SLEEP 6Ω
0.8V + – +
+ ICOMP
EA 0.12V
– BURST
0.8V 2.25µA ITH 1
REF
VIN
S Q
RUN/SOFT SWITCHING
RUN/SS 2 R Q
START LOGIC 7 VDR
UVLO AND ANTI-
TRIP = 2.5V BLANKING SHOOT-THRU
+ CIRCUIT
OVDET
0.86V –
+ 5 SW
SHUTDOWN
IRCMP
– – 4 GND
0.8V
FCB
+ 1627 BD

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LTC1627
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OPERATIO (Refer to Functional Diagram)

Main Control Loop output load exceeds 100mA. The threshold voltage be-
tween Burst Mode operation and forced continuous mode
The LTC1627 uses a constant frequency, current mode
is 0.8V. This can be used to assist in secondary winding
step-down architecture. Both the main and synchronous
regulation as described in Auxiliary Winding Control Using
switches, consisting of top P-channel and bottom
SYNC/FCB Pin in the Applications Information section.
N-channel power MOSFETs, are internal. During normal
operation, the internal top power MOSFET is turned on When the converter is in Burst Mode operation, the peak
each cycle when the oscillator sets the RS latch, and current of the inductor is set to approximately 200mA,
turned off when the current comparator, ICOMP, resets the even though the voltage at the ITH pin indicates a lower
RS latch. The peak inductor current at which ICOMP resets value. The voltage at the ITH pin drops when the inductor’s
the RS latch is controlled by the voltage on the ITH pin, average current is greater than the load requirement. As
which is the output of error amplifier EA. The VFB pin, the ITH voltage drops below 0.12V, the BURST comparator
described in the Pin Functions section, allows EA to trips, causing the internal sleep line to go high and turn off
receive an output feedback voltage from an external resis- both power MOSFETs.
tive divider. When the load current increases, it causes a In sleep mode, both power MOSFETs are held off and the
slight decrease in the feedback voltage relative to the 0.8V internal circuitry is partially turned off, reducing the quies-
reference, which, in turn, causes the ITH voltage to in- cent current to 200µA. The load current is now being
crease until the average inductor current matches the new supplied from the output capacitor. When the output
load current. While the top MOSFET is off, the bottom voltage drops, causing ITH to rise above 0.22V, the top
MOSFET is turned on until either the inductor current MOSFET is again turned on and this process repeats.
starts to reverse as indicated by the current reversal
comparator IRCMP, or the beginning of the next cycle. Short-Circuit Protection
The main control loop is shut down by pulling the RUN/SS When the output is shorted to ground, the frequency of the
pin low. Releasing RUN/SS allows an internal 2.25µA oscillator is reduced to about 35kHz, 1/10 the nominal
current source to charge soft-start capacitor CSS. When frequency. This frequency foldback ensures that the
CSS reaches 0.7V, the main control loop is enabled with the inductor current has more time to decay, thereby prevent-
ITH voltage clamped at approximately 5% of its maximum ing runaway. The oscillator’s frequency will progressively
value. As CSS continues to charge, ITH is gradually increase to 350kHz (or the synchronized frequency) when
released, allowing normal operation to resume. VFB rises above 0.3V.
Comparator OVDET guards against transient overshoots
> 7.5% by turning the main switch off and turning the Frequency Synchronization
synchronous switch on. With the synchronous switch The LTC1627 can be synchronized with an external
turned on, the output is crowbarred. This may cause a TTL/CMOS compatible clock signal. The frequency range
large amount of current to flow from VIN if the main switch of this signal must be from 385kHz to 525kHz. Do not
is damaged, blowing the system fuse. attempt to synchronize the LTC1627 below 385kHz as this
may cause abnormal operation and an undesired fre-
Burst Mode Operation quency spectrum. The top MOSFET turn-on follows the
The LTC1627 is capable of Burst Mode operation in which rising edge of the external source.
the internal power MOSFETs operate intermittently based When the LTC1627 is clocked by an external source, Burst
on load demand. To enable Burst Mode operation, simply Mode operation is disabled; the LTC1627 then operates in
allow the SYNC/FCB pin to float or connect it to a logic PWM pulse skipping mode. In this mode, when the output
high. To disable Burst Mode operation and enable forced load is very low, current comparator ICOMP remains tripped
continuous mode, connect the SYNC/FCB pin to GND. In for more than one cycle and forces the main switch to stay
this mode, the efficiency is lowest at light loads, but off for the same number of cycles. Increasing the output
becomes comparable to Burst Mode operation when the

6
 LTC1627
U
OPERATIO
load slightly allows constant frequency PWM operation VDR
to resume. C1
0.1µF
LTC1627 VIN VIN < 4.5V
Frequency synchronization is inhibited when the feedback D1 L1
SW
voltage VFB is below 0.6V. This prevents the external clock C2 +
VOUT
COUT
from interfering with the frequency foldback for short- 0.1µF
100µF
circuit protection. D2 1627 F02

Dropout Operation
Figure 2. Using a Charge Pump to Bias VDR
When the input supply voltage decreases toward the out-
put voltage, the duty cycle increases toward the maximum the charge pump at VIN ≥ 4.5V is not recommended to
on-time. Further reduction of the supply voltage forces the ensure that (VIN – VDR) does not exceed its absolute
main switch to remain on for more than one cycle until it maximum voltage.
reaches 100% duty cycle. The output voltage will then be When VIN decreases to a voltage close to VOUT, the loop
determined by the input voltage minus the voltage drop may enter dropout and attempt to turn on the P-channel
across the P-channel MOSFET and the inductor. MOSFET continuously. When the VDR charge pump is
In Burst Mode operation or pulse skipping mode operation enabled, a dropout detector counts the number of oscilla-
(externally synchronized) with the output lightly loaded, tor cycles that the P-channel MOSFET remains on, and
the LTC1627 transitions through continuous mode as it periodically forces a brief off period to allow C1 to
enters dropout. recharge. 100% duty cycle is allowed when VDR is grounded.

Undervoltage Lockout Slope Compensation and Inductor Peak Current

A precision undervoltage lockout shuts down the LTC1627 Slope compensation provides stability by preventing
when VIN drops below 2.5V, making it ideal for single subharmonic oscillations. It works by internally adding a
lithium-ion battery applications. In lockout, the LTC1627 ramp to the inductor current signal at duty cycles in excess
draws only several microamperes, which is low enough to of 40%. As a result, the maximum inductor peak current
prevent deep discharge and possible damage to the lithium- is lower for VOUT/VIN > 0.4 than when VOUT/VIN < 0.4. See
ion battery nearing its end of charge. A 150mV hysteresis the inductor peak current as a function of duty cycle graph
ensures reliable operation with noisy supplies. in Figure 3. The worst-case peak current reduction occurs
with the oscillator synchronized at its minimum frequency,
Low Supply Operation i.e., to a clock just above the oscillator free-running
The LTC1627 is designed to operate down to 2.65V supply 950
MAXIMUM INDUCTOR PEAK CURRENT (mA)

voltage. At this voltage the converter is most likely to be 900 WITHOUT

running at high duty cycles or in dropout where the main 850
EXTERNAL
CLOCK SYNC
switch is on continuously. Hence, the I2R loss is due 800
mainly to the RDS(ON) of the P-channel MOSFET. See 750
WORST CASE
EXTERNAL
Efficiency Considerations in the Applications Information 700 CLOCK SYNC
section. 650

When VIN is low (< 4.5V) the RDS(ON) of the P-channel 600
MOSFET can be lowered by driving its gate below ground. 550
VIN = 5V
The top P-channel MOSFET driver makes use of a floating 500
0 10 20 30 40 50 60 70 80 90 100
return pin, VDR, to allow biasing below GND. A simple DUTY CYCLE (%)
charge pump bootstrapped to the SW pin realizes a 1627 F03

negative voltage at the VDR pin as shown in Figure 2. Using

Figure 3. Maximum Inductor Peak Current vs Duty Cycle

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LTC1627
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APPLICATIO S I FOR ATIO
frequency. The actual reduction in average current is less size for a fixed inductor value, but it is very dependent on
than for peak current. inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires
The basic LTC1627 application circuit is shown in Figure
more turns of wire and therefore copper losses will
1. External component selection is driven by the load
increase.
requirement and begins with the selection of L followed by
CIN and COUT. Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can con-
Inductor Value Calculation centrate on copper loss and preventing saturation. Ferrite
The inductor selection will depend on the operating fre- core material saturates “hard,” which means that induc-
quency of the LTC1627. The internal preset frequency is tance collapses abruptly when the peak design current is
350kHz, but can be externally synchronized up to 525kHz. exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
The operating frequency and inductor selection are inter- not allow the core to saturate!
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. However, oper- Kool Mµ (from Magnetics, Inc.) is a very good, low loss
ating at a higher frequency generally results in lower core material for toroids with a “soft” saturation character-
efficiency because of internal gate charge losses. istic. Molypermalloy is slightly more efficient at high
(>200kHz) switching frequencies but quite a bit more
The inductor value has a direct effect on ripple current. The expensive. Toroids are very space efficient, especially
ripple current ∆IL decreases with higher inductance or when you can use several layers of wire, while inductors
frequency and increases with higher VIN or VOUT.
wound on bobbins are generally easier to surface mount.
1  V  New designs for surface mount are available from
∆IL = VOUT 1 − OUT 
( )( )
f L  VIN  (1) Coiltronics, Coilcraft and Sumida.

Accepting larger values of ∆IL allows the use of low CIN and COUT Selection
inductances, but results in higher output voltage ripple In continuous mode, the source current of the top MOSFET
and greater core losses. A reasonable starting point for is a square wave of duty cycle VOUT/VIN. To prevent large
setting ripple current is ∆IL = 0.4(IMAX). voltage transients, a low ESR input capacitor sized for the
The inductor value also has an effect on Burst Mode maximum RMS current must be used. The maximum
operation. The transition to low current operation begins RMS capacitor current is given by:
when the inductor current peaks fall to approximately
[ ( )]
1/ 2
200mA. Lower inductor values (higher ∆IL) will cause this VOUT VIN − VOUT
to occur at lower load currents, which can cause a dip in CIN required IRMS ≅ IMAX
efficiency in the upper range of low current operation. In VIN
Burst Mode operation, lower inductance values will cause This formula has a maximum at VIN = 2VOUT, where
the burst frequency to increase. IRMS = IOUT /2. This simple worst-case condition is com-
monly used for design because even significant deviations
Inductor Core Selection
do not offer much relief. Note that capacitor manufacturer’s
Once the value for L is known, the type of inductor must be ripple current ratings are often based on 2000 hours of life.
selected. High efficiency converters generally cannot This makes it advisable to further derate the capacitor, or
afford the core loss found in low cost powdered iron cores, choose a capacitor rated at a higher temperature than
forcing the use of more expensive ferrite, molypermalloy, required. Several capacitors may also be paralleled to meet
or Kool Mµ® cores. Actual core loss is independent of core size or height requirements in the design. Always consult the
Kool Mµ is a registered trademark of Magnetics, Inc. manufacturer if there is any question.

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 LTC1627
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APPLICATIO S I FOR ATIO
The selection of COUT is driven by the required effective series 0.8V ≤ VOUT ≤ 8.5V

resistance (ESR). Typically, once the ESR requirement is

R2
satisfied, the capacitance is adequate for filtering. The output
ripple ∆VOUT is determined by: VFB

LTC1627 R1
 1 
∆VOUT ≅ ∆IL  ESR +
GND

 8 fCOUT  1627 F04

where f = operating frequency, COUT = output capacitance Figure 4. Setting the LTC1627 Output Voltage
and ∆IL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆IL increases Run/Soft-Start Function
with input voltage. For the LTC1627, the general rule for
proper operation is: The RUN/SS pin is a dual purpose pin that provides the
soft-start function and a means to shut down the LTC1627.
COUT required ESR < 0.25Ω Soft-start reduces surge currents from VIN by gradually
Manufacturers such as Nichicon, United Chemicon and increasing the internal current limit. Power supply
Sanyo should be considered for high performance through- sequencing can also be accomplished using this pin.
hole capacitors. The OS-CON semiconductor dielectric An internal 2.25µA current source charges up an external
capacitor available from Sanyo has the lowest ESR/size capacitor CSS. When the voltage on RUN/SS reaches 0.7V
ratio of any aluminum electrolytic at a somewhat higher the LTC1627 begins operating. As the voltage on RUN/SS
price. Once the ESR requirement for COUT has been met, continues to ramp from 0.7V to 1.8V, the internal current
the RMS current rating generally far exceeds the limit is also ramped at a proportional linear rate. The
IRIPPLE(P-P) requirement.
current limit begins at 25mA (at VRUN/SS ≤ 0.7V) and ends
In surface mount applications multiple capacitors may at the Figure 3 value (VRUN/SS ≈ 1.8V). The output current
have to be paralleled to meet the ESR or RMS current thus ramps up slowly, charging the output capacitor. If
handling requirements of the application. Aluminum elec- RUN/SS has been pulled all the way to ground, there will
trolytic and dry tantalum capacitors are both available in be a delay before the current starts increasing and is given
surface mount configurations. In the case of tantalum, it is by:
critical that the capacitors are surge tested for use in
0.7CSS
switching power supplies. An excellent choice is the AVX tDELAY =
TPS series of surface mount tantalum, available in case 2.25µA
heights ranging from 2mm to 4mm. Other capacitor types Pulling the RUN/SS pin below 0.4V puts the LTC1627 into
include Sanyo POSCAP, KEMET T510 and T495 series, a low quiescent current shutdown (IQ < 15µA). This pin can
Nichicon PL series and Sprague 593D and 595D series. be driven directly from logic as shown in Figure 5. Diode
Consult the manufacturer for other specific recommenda- D1 in Figure 5 reduces the start delay but allows CSS to
tions. ramp up slowly providing the soft-start function. This
diode can be deleted if soft-start is not needed.
Output Voltage Programming
The output voltage is set by a resistive divider according 3.3V OR 5V RUN/SS RUN/SS
to the following formula: D1

 R2  CSS CSS
VOUT = 0.8V 1 +  (2)
 R1  1627 F05

The external resistive divider is connected to the output, Figure 5. RUN/SS Pin Interfacing
allowing remote voltage sensing as shown in Figure 4.

9
LTC1627
U U W U
APPLICATIO S I FOR ATIO
Auxiliary Winding Control Using SYNC/FCB Pin Efficiency = 100% – (L1 + L2 + L3 + ...)
The SYNC/FCB pin can be used as a secondary feedback where L1, L2, etc. are the individual losses as a percentage
input to provide a means of regulating a flyback winding of input power.
output. When this pin drops below its ground referenced Although all dissipative elements in the circuit produce
0.8V threshold, continuous mode operation is forced. In losses, two main sources usually account for most of the
continuous mode, the main and synchronous MOSFETs losses in LTC1627 circuits: VIN quiescent current and I2R
are switched continuously regardless of the load on the losses.
main output.
1. The VIN quiescent current is due to two components:
Synchronous switching removes the normal limitation the DC bias current as given in the electrical character-
that power must be drawn from the inductor primary istics and the internal main switch and synchronous
winding in order to extract power from auxiliary windings. switch gate charge currents. The gate charge current
With continuous synchronous operation power can be results from switching the gate capacitance of the
drawn from the auxiliary windings without regard to the internal power MOSFET switches. Each time the gate is
primary output load. switched from high to low to high again, a packet of
The secondary output voltage is set by the turns ratio of the charge dQ moves from VIN to ground. The resulting
transformer in conjunction with a pair of external resistors dQ/dt is the current out of VIN that is typically larger
returned to the SYNC/FCB pin as shown in Figure 6. The than the DC bias current. In continuous mode, IGATECHG
secondary regulated voltage VSEC in Figure 6 is given by: = f(QT + QB) where QT and QB are the gate charges of
the internal top and bottom switches. Both the DC bias
 R4 
( )( )
VSEC ≅ N + 1 VOUT − VDIODE > 0.8V  1 + 
 R3 
and gate charge losses are proportional to VIN and thus
their effects will be more pronounced at higher supply
voltages.
where N is the turns ratio of the transformer, VOUT is the
main output voltage sensed by VFB and VDIODE is the 2. I2R losses are calculated from the resistances of the
voltage drop across the Schottky diode. internal switches RSW and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main
R4
VSEC switch and the synchronous switch. Thus, the series
SYNC/FCB
+ resistance looking into SW pin from L is a function of
R3 L1 1µF
LTC1627 1:N both top and bottom MOSFET RDS(ON) and the duty
VOUT
cycle (DC) as follows:
SW
+
COUT RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
1627 F06
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteris-
Figure 6. Secondary Output Loop Connection
tics curves. Thus, to obtain I2R losses, simply add RSW
to RL and multiply by the square of the average output
Efficiency Considerations current.
The efficiency of a switching regulator is equal to the Other losses including CIN and COUT ESR dissipative losses,
output power divided by the input power times 100%. It is MOSFET switching losses and inductor core losses generally
often useful to analyze individual losses to determine what account for less than 2% total additional loss.
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:

10
 LTC1627
U U W U
APPLICATIO S I FOR ATIO
Checking Transient Response the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor would require a 250µs rise time,
The regulator loop response can be checked by looking at
limiting the charging current to about 130mA.
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When PC Board Layout Checklist
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series When laying out the printed circuit board, the following
resistance of COUT. ∆ILOAD also begins to charge or dis- checklist should be used to ensure proper operation of the
charge COUT, which generates a feedback error signal. The LTC1627. These items are also illustrated graphically in
regulator loop then acts to return VOUT to its steady-state the layout diagram of Figure 7. Check the following in your
value. During this recovery time VOUT can be monitored for layout:
overshoot or ringing that would indicate a stability prob- 1. Are the signal and power grounds segregated? The
lem. The internal compensation provides adequate com- LTC1627 signal ground consists of the resistive
pensation for most applications. But if additional compen- divider, the optional compensation network (RC and
sation is required, the ITH pin can be used for external CC1), CSS and CC2. The power ground consists of the
compensation as shown in Figure 7. (–) plate of CIN, the (–) plate of COUT and Pin 4 of the
A second, more severe transient is caused by switching in LTC1627. The power ground traces should be kept
loads with large (>1µF) supply bypass capacitors. The short, direct and wide. The signal ground and power
discharged bypass capacitors are effectively put in parallel ground should converge to a common node in a star-
with COUT, causing a rapid drop in VOUT. No regulator can ground configuration.
deliver enough current to prevent this problem if the load 2. Does the VFB pin connect directly to the feedback
switch resistance is low and it is driven quickly. The only resistors? The resistive divider R1/R2 must be con-
solution is to limit the rise time of the switch drive so that nected between the (+) plate of COUT and signal ground.

CC2

RC CC1 1 8
OPTIONAL ITH SYNC/FCB
OPTIONAL
CSS 2 7
RUN/SS VDR
LTC1627 CV
3 6
VFB VIN
+
4 L1
5
GND SW
+ +
D1 CIN
R2
+ VOUT
VIN
COUT
R1 D2
CB
–
–
BOLD LINES INDICATE
1627 F07
HIGH CURRENT PATHS

Figure 7. LTC1627 Layout Diagram

11
LTC1627
U U W U
APPLICATIO S I FOR ATIO
3. Does the (+) plate of CIN connect to VIN as closely as  2.5V 
2.5V
L= 1 −  = 14.5µH
( )( )
possible? This capacitor provides the AC current to the
internal power MOSFETs. 350kHz 200mA  4.2V 

4. Keep the switching node SW away from sensitive small- A 15µH inductor works well for this application. For good
signal nodes. efficiency choose a 1A inductor with less than 0.25Ω
series resistance.
Design Example CIN will require an RMS current rating of at least 0.25A at
As a design example, assume the LTC1627 is used in a temperature and COUT will require an ESR of less than
single lithium-ion battery-powered cellular phone applica- 0.25Ω. In most applications, the requirements for these
tion. The VIN will be operating from a maximum of 4.2V capacitors are fairly similar.
down to about 2.7V. The load current requirement is a For the feedback resistors, choose R1 = 80.6k. R2 can then
maximum of 0.5A but most of the time it will be on standby be calculated from equation (2) to be:
mode, requiring only 2mA. Efficiency at both low and high
load currents is important. Output voltage is 2.5V. With V 
R2 =  OUT − 1 • R1 = 171k; use 169k
this information we can calculate L using equation (1),  0.8 
1  V  Figure 8 shows the complete circuit along with its effi-
L= VOUT 1 − OUT 
( )( )
f ∆IL  VIN  (3) ciency curve.

Substituting VOUT = 2.5V, VIN = 4.2V, ∆IL = 200mA and

f = 350kHz in equation (3) gives:

CITH
47pF
1 8
ITH SYNC/FCB
100
2 7
RUN/SS VDR 95 VIN = 3.6V
C1
CSS LTC1627 VIN 90
3 6 0.1µF
0.1µF VFB VIN 2.8V TO VIN = 4.2V
85
15µH* 4.5V
VOUT
EFFICIENCY (%)

4 5 80
GND SW 2.5V
R2 0.5A BAT54S**
+ CIN†† 75
22µF
169k 70
D1 16V
1%
+ COUT† 65
100µF
6.3V 60
R1 D2
55
80.6k C2
1% 0.1µF 50 VOUT = 2.5V
45
1 10 100 1000
* SUMIDA CD54-150 OUTPUT CURRENT (mA)
1627 F08a
** ZETEX BAT54S
† AVX TPSC107M006R0150 1627 F08b
†† AVX TPSC226M016R0375

Figure 8. Single Lithium-Ion to 2.5V/0.5A Regulator

12
 LTC1627
U
TYPICAL APPLICATIO S

5V Input to 3.3V/0.5A Regulator

CITH
47pF
1 8 * SUMIDA CD54-150
ITH ** AVX TPSC107M006R0150
SYNC/FCB
*** AVX TPSC226M016R0375
2 7
RUN/SS VDR
CSS 3 LTC1627
6
0.1µF VFB VIN VIN = 5V
15µH* VOUT
4 5
GND SW 3.3V
R2 0.5A + CIN***
249k 22µF
1% + COUT ** 16V
100µF
R1 6.3V
80.6k
1%
1627 TA03

Double Lithium-Ion to 5V/0.5A Low Dropout Regulator

CITH
47pF
1 8 * SUMIDA CD54-330
ITH ** AVX TPSD107M010R0100
SYNC/FCB
*** AVX TPSC226M016R0375
2 7
RUN/SS VDR
CSS 3 LTC1627
6
0.1µF VFB VIN VIN ≤ 8.4V
33µH* VOUT
4 5
GND SW 5V
R2 0.5A + CIN***
422k 22µF
1% + COUT ** 16V
100µF
R1 10V
80.6k
1%
1627 TA04

13
LTC1627
U
TYPICAL APPLICATIO S

3.3V Input to 2.5V/0.5A Regulator

CITH
47pF
1 8
ITH SYNC/FCB

2 7
RUN/SS VDR
C1
CSS LTC1627
3 6 0.1µF
0.1µF VFB VIN VIN = 3.3V
10µH* VOUT
4 5
GND SW 2.5V
R2 0.5A BAT54S**
+ CIN††
22µF
169k
D1 16V
1%
+ COUT†
100µF
6.3V D2
R1
80.6k C2
1% 0.1µF

* SUMIDA CD54-100
1627 TA05
** ZETEX BAT54S
† AVX TPSC107M006R0150
†† AVX TPSC226M016R0375

Single Lithium-Ion to 1.8V/0.3A Regulator

CITH
47pF
1 8 * SUMIDA CD54-150
ITH ** AVX TPSC107M006R0150
SYNC/FCB
*** AVX TPSC226M016R0375
2 7
RUN/SS VDR
CSS 3 LTC1627
6
0.1µF VFB VIN VIN ≤ 4.2V
15µH* VOUT
4 5
GND SW 1.8V
R2 0.3A + CIN***
100k 22µF
1% + COUT ** 16V
100µF
R1 6.3V
80.6k
1%
1627 TA01

14
 LTC1627
U
TYPICAL APPLICATIO S

Double Lithium-Ion to 2.5V/0.5A Regulator

CITH
47pF
1 8 * SUMIDA CD54-250
ITH ** AVX TPSC107M006R0150
SYNC/FCB
*** AVX TPSC226M016R0375
2 7
RUN/SS VDR
CSS 3 LTC1627
6
0.1µF VFB VIN VIN ≤ 8.4V
25µH* VOUT
4 5
GND SW 2.5V
R2 0.5A + CIN***
169k 22µF
1% + COUT ** 16V
100µF
R1 6.3V
80.6k
1%
1627 TA01

U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.

S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)

0.189 – 0.197*
(4.801 – 5.004)
8 7 6 5

0.228 – 0.244 0.150 – 0.157**

(5.791 – 6.197) (3.810 – 3.988)

1 2 3 4

0.010 – 0.020
× 45° 0.053 – 0.069
(0.254 – 0.508)
(1.346 – 1.752)
0.004 – 0.010
0.008 – 0.010
0°– 8° TYP (0.101 – 0.254)
(0.203 – 0.254)

0.016 – 0.050
0.014 – 0.019 0.050
(0.406 – 1.270)
(0.355 – 0.483) (1.270)
TYP BSC
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE SO8 1298

15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1627
U
TYPICAL APPLICATIO S

Dual Output 1.8V/300mA and 3.3V/100mA Application

CITH VSEC †††

R3 3.3V
47pF 249k 100mA
1 8 1% +
ITH SYNC/FCB ***22µF
R4 D2††
6.3V
2 7 80.6k ZENER
RUN/SS VDR 1% D1 1.8V
CSS 3 LTC1627 6 25µH† MBR0520LT1
0.1µF VFB VIN VIN ≤ 8.5V 1:1 VOUT
1.8V
4 5 0.3A
GND SW
+ CIN* + COUT **
22µF R2
100k 100µF
16V 6.3V
1%

* AVX TPSC226M016R0375 † COILTRONICS CTX25-1 R1

** AVX TPSC107M006R0150 †† MMSZ4678T1 80.6k
*** AVX TAJA226M006R ††† A 10mA MIN LOAD CURRENT 1%
1627 TA02
IS RECOMMENDED

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1627fa LT/TP 0600 2K REV A • PRINTED IN USA

Linear Technology Corporation
16 1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com  LINEAR TECHNOLOGY CORPORATION 1998