Embedded Systems (ESY)

Subject Code: 22532

Contents
Abstract.................................................................................................................................................2
Unit 1 – Introduction to Embedded Systems.........................................................................................3
Abstract
This document contains Question-Answers whose answers are tailored to be perfect and contain all
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The document also serves the purpose of explaining any topic that I wish to revise.
Unit 1 – Introduction to Embedded Systems.

1. Differentiate between Harvard and von Neumann Architectures.

Sr. No. Harvard Architecture Von Neumann Architecture

1. Harvard Architecture originates from a Von Neumann Architecture, also known as
computer named Harvard Mark I, which Princeton architecture, is an ancient
stored instructions and data separately. computer architecture made using a 1945
description by John Von Neumann.
2. Program Memory and Data Memory have Program Memory and Data Memory have
separate memories and pathways. the same memory and pathway.
3. Both memories can be fetched Both memories are fetched sequentially
simultaneously. only.
4. Harvard architecture delivers improved Von Neumann suffers the “von Neumann
performance. Bottleneck” which hinders performance
significantly.
5. This architecture is harder in concept. This architecture is simpler.
6. Word width, timing and memory Word width, timing and memory address
addresses are separate. are always same. Timing is sequential.
7. Power efficiency is observed here. Power inefficiency is observed here.
8. Harvard architecture does however cost Von Neumann on the other hand costs less.
more.

2. Draw Harvard and von Neumann Architectures.

Harvard Architecture:

Arithmetic
Logic Unit

Instructions
Control Unit Data Memory
Memory

Input /
Output Ports

Figure 1: Block Diagram of the Harvard Architecture.

 Here, only the Instructions Memory Bus is Uni-directional, wherein data only travels from the
Memory to the Control Unit.
  Rest other buses are Bi-directional.

Von Neumann Architecture:

Arithmetic
Logic Unit

Input Device Control Unit Output Device

Memory
(Instructions and
Data Memory)

Figure 2:
Block
 All buses are Uni-directional.
 The memory has two buses, one for Address and one for Data.
Date of Addition: 28th August 2024.

1) List any four characteristics of Embedded Systems.

Embedded systems are designed as per the following metrics:

1. Processor Power:
a. Processor Power is the capability of an Embedded processor to execute tasks
smoothly.
b. Processor Power has many aspects, such as Clock Speed, Power consumption, Core
Count and Processor Architecture.
c. Processor Power is an important characteristic which determines how quickly an
Embedded system can respond to inputs and provide outputs.
2. Memory:
a. Memory is the capacity of data or instructions storage supported by an Embedded
System.
b. The memory stores mainly the Firmware of Embedded system.
c. This characteristic determines the scalability of firmware.
3. Operating System:
a. Operating System is a system of many hardware and software components to
maintain tasks, execution of instructions in a proper manner with limited resources.
b. Embedded Systems mostly run on Real-Time Operating Systems to provide
responsive performance.
4. Reliability:
a. Reliability refers to the dependence of users on the Embedded System to respond in
every situation and not fail often.
 b. For example, a highly reliable embedded system fails rarely and manages to serve
the user for the majority of its lifespan.
c. Reliability defines the realistic assessment of the probability of system failure.
5. Performance
6. Power consumption
7. NRE cost
8. Unit cost
9. Size
10. Flexibility
11. Prototype time
12. Time to market
13. Maintainability
14. Correctness
15. Safety

Features of 8051:

1. 8-bit word length. 4. Clock speed – 12MHz to 33MHz.

2. 128 bytes of RAM and 4kB of internal 5. Five vectored interrupts.
ROM. 6. UART serial port.
3. 4 GPIO ports. 7. Two multi-mode 16-bit Timers.

8. Two power saving modes.

Features of PIC:

1. 8 or 16- or 32-bit word length.

2. RISC architecture.
3. In built flash memory is provided for storage for program.
4. In built ADC.
5. Provision of interrupt.
6. UART protocol.
7. Includes Timer.

Features of ARM:

1. 32-bit of 64-bit architecture.

2. Supports multi-core execution.
3. RISC design.
4. Low power consumption.
5. High performance, in range of few MHz to several GHz.
6. Provides several extensions of Instruction sets such as Thumb, Jazelle, Thumb-2

2) Compare von Neumann and Harvard architecture.

Sr. No. Von Neumann Architecture Harvard Architecture

1. Von Neumann architecture, also known as Princeton Harvard Architecture
 architecture was originated in 1945 by an architectural originated from Harvard Mark
definition of John von Neumann. I, which stored instructions
and data separately.
2. Data memory and Program memory are integrated. Data memory and Program
memory are separate.
3. Both memories have a shared Control and Address Bus. Both memories have a
separate Control and Address
Bus.
4. Both memories are fetched sequentially only. Both memories can be fetched
simultaneously.
5. Von Neumann architecture delivered slower Harvard CPU’s delivered faster
performance. performance.
6. Von Neumann architecture is used in modern day Harvard architecture is mostly
computers, Arduino boards and early computers such used in critical embedded
as ENIAC. systems and digital signal
processing systems.

3) Compare RISC and CISC.

Sr. No. RISC CISC

1. RISC is a CPU architecture which comes with a reduced CISC is a CPU architecture
set of instructions. which comes with an added
bunch of instructions.
2. RISC was designed to simplify individual instructions CISC was designed to have
given to computer to accomplish tasks. instructions which can execute
several operations within one
instruction.
3. One instruction requires one machine cycle. One instruction may require
multiple machine cycles.
4. Instructions have a fixed length. Instructions have variable-
lengths.
5. RISC uses instruction pipelining to execute instructions CISC executes instructions
quicker. sequentially.
6. RISC computer contains many high-speed general- CISC provides small number of
purpose registers. registers.
7. RISC supports fewer addressing modes as compared to CISC supports multiple
CISC. addressing modes for its
instructions.
8. RISC uses a Load / Store architecture. CISC uses a Register-Memory
architecture.
9. RISC’s control memory is hardwired. CISC’s control memory is
micro-coded.
10. AVR family. Intel 8051 family.

4) Block diagram of Embedded systems.

5) Differentiate between 89C51, PIC, AVR and ARM.

Parameter 89C51 PIC AVR ARM

 Word length 8-bit 8 / 16 / 32-bit 8 or 32 bit 32 or 64 bit.
Architecture Von Neumann Harvard Modified ARM
Harvard
Instruction CISC RISC RISC RISC
Set
Memory On-chip RAM: 128 bytes SRAM and Flash SRAM, EEPROM SDRAM,
ROM / Flash: 4kB and Flash (kB) EEPROM and
Flash
Clock Speed 12MHz to 33MHz Few MHz to Above 20MHz. Tens of MHz to
over 100 MHz several GHz.
Clocks per 12 4 1 1
Instruction
Families 89C51 belongs to the PIC 16, PIC17, ATTiny, Mega, ARMv1 till
8051 family, but it has PIC18, PIC24, XMega ARMv8
many children such as PIC32
8051, 8052 and more.
Power Average Low Low Low
Consumptio
n
Cost Very Low Average Average Low

6) List and explain characteristics of an Embedded System.

i. Small-scale Embedded systems.

ii. Medium-scale Embedded systems.
iii. Large-scale Embedded systems.
iv. Stand-alone Embedded systems.
v. Networked Embedded systems.
vi. Single-purpose Embedded systems.
vii. Mobile Embedded systems.

Small-scale Embedded systems:

 Small-scale Embedded systems are simple systems which have limited hardware and
software capabilities. They typically use an 8-bit or 16-bit microcontroller.
 These systems are mostly battery-operated systems and are small in size. These systems are
embedded in a single board.
 For example, toys and simple thermostats are small-scale embedded systems.

PIC controller invention date:

PIC microcontroller was developed in 1993, by Microchip technology.

Unit 2 – Introduction to Embedded C:

Sr. No. Assembly Language Embedded C Language

Assembly is a language where direct CPU Embedded C is a language where human-
1.
instructions are written. readable instructions are written more.
Assembly is a Low-Level programming Embedded C is a high-level programming
2.
language. language.
Assembly programs are harder to Embedded C programs are easier to
3.
develop. develop.
4. Program execution happens fast. Program execution is fast, but slower.
5. Memory requirement is less. Memory requirement is more.
6. Size of program is less. Size of program is more.
Assembly language is not portable and is Embedded C is portable and can be
7.
written for only one type of CPU. transferred to a different computer.
8. Scalability is less. Embedded C programs are highly scalable.

TMOD –

 TMOD stands for Timer Mode. This is a Special Function Register (SFR) which is used to set
the mode or method in which a Timer operates.
 This register is 8 bits wide and is divided into 4-bit fields, with each field controller one timer.
 Below is the Format of TMOD register, as well as the description of each bit.

Bit 7 .. .. .. .. .. .. Bit 0
GATE1 C/T1 T1M1 T1M0 GATE0 C/T0 T0M1 T0M0

 GATE1 and GATE0:

o GATE controls whether or not a Timer activates by an External interrupt or not.
o If GATE bit is 1, respective Timer activates through an External interrupt of (Tn)
(where n is either 0 or 1).
o If GATE bit is 0, respective Timer is turned on normally by software.
 C/Tn:
o This bit stands for Counter/Inverted Timer ‘n’.
o When the bit is 1, the Timer acts as a Counter.
o (Question – timer as counter; how does a timer count; what does a Timer count)
o When the bit is set to 1, the Timer becomes a Counter and counts the external
pulses applied at the respective pins in Port 3.
 TnMn:
o This bit stands for Timer ‘n’ Mode bit with ‘n’ place value.
o A combination of TnM1 and TnM0 bits provide 4 combinations, each of which are
designated a Mode for Timer.
o This mode defines how the Timer functions.
o Below are the modes that can be selected based on the combination.
 00: Mode 0 (13-bit Timer)
  01: Mode 1 (16-bit Timer)
 10: Mode 2 (8-bit Auto-reload Timer)
 11: Mode 3 (Split Timer Mode)

TCON –

 TCON stands for Timer Control. This register controls the operating state(s) of a Timer.
 In short, TCON is a register used for defining, or knowing the ‘state’ of Timer.
 Below is its format:

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

TF1 TR1 TF0 TF0 IE1 IT1 IE0 IT0

 The TCON register is divided into 4 fields, each contain a control bit for Timer 1 and Timer 0
alternatively.
 The first field (bit 7 and bit 6) is for the Timer 1’s state.
 The second field is for Timer 0’s state.
 The third field is again for Timer 0, but this time for controlling the Timer 1’s Interrupt Type.
 The fourth field is again for Timer 1, but this time for controlling the Timer 0’s Interrupt Type.

Why Timer has Mode 0 (13-bit Timer):

In short, 13-bit was used in predecessor processors of 8051 such as 8048. Timers could not be 16-bit
in earlier times. Thus, to maintain backward compatibility, 13-bit was added to make code from older
devices portable to newer devices.

Why Serial Communication uses Timer 1:

 For clearance of concept, refer table below:

 It is mentioned in words that “Baud rate is determined by Timer 1 or an external clock.”

 This means that Timer 1 is supported by Serial communication only.
  For going deeper, there is not a specific reason why Timer 0 was not used, if it’s the first
Timer in sequence.
 Timer 1 was commonly used, thus selected for Baud rate generation. Timer 0 was meanwhile
available for all the tasks that used the Timer.
 Additionally, although this point may not be correct, Timer 1 by CPU architecture, has a
much stable output than Timer 0. This is by the arrangement of Timer 1 section near to the
CPU. Thus, Timer 1 was selected as it is much stable than Timer 0. (not true)

Working of GATE bit / How does GATE bit work:

GATE bit makes it so that the Timer is only started by TR bit when INT of respective number is
activated.

When GATE is not activated, the Timer runs upon setting TR bit, regardless of whether INT bit is Low
or not. When GATE is activated, TR bit will not start the Timer until and unless INT bit is Low. (INT is
active low)

Why are 11.0592 MHz present or used?

These crystals offer exact baud rate values, hence these are used in applications where serial
communication is used quite often.
Unit 3 – Communication Standards and Protocols

Serial Communication:

Serial communication is in which any byte that is to be transferred is first converted into a sequence
of bits (8-bits), and then the bits are individually transmitted through a single communication
channel such as Co-axial cables, single copper tracks / wires.

The communication type is cheap to implement due to requirement of only a single channel. This
makes it preferred for long-haul communications.

Serial communication mandatorily requires a Serializer – De-serializer (SerDes).

Recently, serial communication has become common in short distance communications as well, due
to improved: signal integrity, transmission speeds. For example, the famous PCI method has been
replaced by PCI Express due to superiority of serial mode of data transfer.

Serial communication systems may also use modulation techniques to transfer several bits at a time,
thus acting like a semi-parallel system. For example, PCIe uses (Pulse Amplitude Modulation Four
levels) PAM4 (groups two bits to a single symbol), to replace the regular NRZ or PAM2 type signal,
which transmits one bit at a time.

Serial Communication has another famous example – the RS-232 connector:

What does RS-232 connector mean? Meaning of RS-232.

RS-232 stands for Recommended Standard 232. The name ‘Recommended Standard’ was defined as
a draft initially for serial communication between computers and modems, and actually, the standard
was taken over by EIA (Electronic Industries Alliance) to renamed to EIA-232, then managed by TIA,
thus TIA-232, and as ANSI accrediated TIA, the standard was also known as ANSI TIA-232.

With main information in concern, RS stands for Recommended Standard, and it was indeed the
recommended standard that was to be used in serial communication between computers, hence the
name, and 232 means the standard number.
Unit 4 – Interfacing of Input and Output devices

In this chapter, we will study about the method of interfacing various common electronics modules.

Below is a list of modules that this chapter will cover:

1. Liquid Crystal Display Module

2. LED Arrays
3. 7-segment numbering displays (multiplexing 4 at once)
4. Relays
5. Keypad matrix
6. Stepper Motors
7. Analog to Digital and Digital to Analog Converters
8. Temperature Sensor – LM35

Liquid Crystal Display (16x2) Module

This module allows us to display readable characters, through an arrangement of a Backlight and a
Liquid Crystal Display layer which blocks light as per applied electrical signal. The dark regions which
appear as a result are formed in such a way that they become human-readable.

The LCD Module has 16 pins. Each pin is necessary for the functioning of the module.

First pin starts with Ground (GND). The following pins are in the sequence below:

i) Vcc
ii) Vee
iii) RS
iv) R/W
v) E
vi) DB0 till DB7 (8 data pins total)
vii) LED +
viii) LED –

Vcc is the positive supply (Collector voltage) which is required by the LCD module’s microcontrollers
and logical functioning. LED Backlight has no resemblance with this pin.

Vee is the Contrast adjustment supply voltage (Emitter voltage) which determines the brightness
difference between Foreground (LCD characters) and background (Backlight). High contrast means
clearer definition of characters.

RS stands for Register Select and through this pin, selection of the type of data sent at DB pins is
declared. Through this pin, LCD is instructed about the type of operation to perform using the bits
received at its DB pins. When R/S is Low, the LCD module selects the Command register, which
considers the data byte as a command and performs a lookup for the command, followed with the
execution of the command. When R/S is High, LCD declares the bits as Data, and displays the
corresponding memory location’s character on the screen.
R/W stands for Read or Write, through which we inform the LCD about the type of operation we wish
to perform. When this pin is Low, LCD considers Write related instructions and coordinates with the
user accordingly. When the pin is High, LCD memory is available for the user to read; the user is able
to request the content of mentioned memory location.

E means Enable, which Enables the input of bits at the Data Byte (DB) pins. When this pin is held
Low, bits at DB port are not latched and considered. When this pin is High, bits at the DB port are
considered by the LCD and processed. This pin is typically held Low to prevent noise spikes at DB
Port, causing malfunctions. The Enable pin is held high right before sending data at DB port, and
immediately held Low after.

LCD Commands

LCD Commands instruct an LCD about the functioning of character formation. It instructs the
configuration of display, configuration of character size, cursor visibility, lines to activate, bit-interface
to use (4 or 8 bit) and more.

Below are some common commands,

1) 0x01: This command instructs the LCD module to clear the DGRAM (a RAM which stores
characters in display), then move the cursor to the starting position.
2) 0x38: This command performs multiple functions at once. It sets the bit-interface to the
regular 8-bits, instructs the LCD module to display Two Rows, and sets the character style to
5x7 dot matrix.
3) 0x0F: This command activates the Display, displays the cursor, and instructs LCD to make the
Cursor blink.