Microcontroller_1_1707718209291
Microcontroller_1_1707718209291
Components Components can be outside the processor, it All devices and peripherals are integrated inside the
is only a processor, so memory and I/O unit. Micro Controller has a processor along with
components need to be connected externally internal memory and I/O components.
Boolean Functions Does not support Supports
CPU Registers Need more time to access CPU registers Faster in accessing the CPU registers
Usage In desktop, servers, laptops, and other general Mostly in real time applications to control
purpose computer devices
Real time operating Supports RTOS +kernel-based services Supports RTOS
system
Hardware complexity More complex Relatively simple
Peripheral interface The common peripheral interface for the The common peripheral interface for the
microprocessor is USB, UART, and high- microcontroller is I2C, SPI, and UART.
DEpt of E&TC, RSCOE speed Ethernet. 2
Von Neumann Architecture
The Von Neumann architecture is an architectural model, originally proposed by
John Von Neumann. the Von Neumann architecture divides a computing system
into four main units: CPU, memory, input and output units.
Von Neumann architecture Features
The Von Neumann architecture is a theoretical design based on the stored-program
computer concept.
The Von Neumann architecture has only one bus that is used for both instructions
fetches and data transfers. More importantly, the operation must be scheduled
because they cannot be performed at the same time.
The processing unit would require two clock cycles to complete an instruction.
Von Neumann architecture is usually used literally in all machines from desktop
computers, notebooks, high performance computers to workstations.
In Von Neumann, instructions and data use the same bus system therefore the
design and development of control unit is simplified, hence the cost of production
becomes minimum.
DEpt of E&TC, RSCOE 3
Harvard Architecture
Harvard architecture is named after the “Harvard Mark I” relay based computer, which was an IBM
computer in the University of Harvard. In the Harvard architecture, there are two separate memory
spaces: one for programs and another for data.
Harvard Architecture Features
The Harvard architecture is a modern computer architecture based on the Harvard Mark I relay-based
computer model.
The Harvard architecture has separate memory space for instructions and data which physically
separates signals and storage code and data memory, which in turn makes it possible to access each
of the memory system simultaneously.
In the Harvard architecture, the processing unit can complete an instruction in one cycle if appropriate
pipelining plans have been set.
Harvard architecture is a new concept used specifically in microcontrollers and digital signal
processing (DSP).
Harvard architecture is complex kind of architecture because it employs two buses for instruction and
data, a factor that makes development of the control unit comparatively more expensive.
RISC stands for Reduced Instruction Set Computer. CISC stands for Complex Instruction Set Computer.
RISC processors have simple instructions taking about one CSIC processor has complex instructions that take up multiple
clock cycle. The average clock cycle per instruction (CPI) is 1.5 clocks for execution. The average clock cycle per instruction
(CPI) is in the range of 2 and 15.
Performance is optimized with more focus on software Performance is optimized with more focus on hardware.
It has no memory unit and uses separate hardware to implement It has a memory unit to implement complex instructions.
instructions..
The instruction set has a variety of different instructions that CISC has many different addressing modes and can thus be
can be used for complex operations used to represent higher-level programming language
statements more efficiently.
Fewer addressing modes More addressing modes
fixed (32-bit) format Varying formats (16-64 bits for each instruction).
RISC processors are highly pipelined They are normally not pipelined or less pipelined
The most common RISC microprocessors are Alpha, ARC, Examples of CISC processors are the System/360, VAX, PDP-
ARM, AVR, MIPS, PA-RISC, PIC, Power Architecture, and 11, Motorola 68000 family, AMD, and Intel x86 CPUs.
SPARC.
RISC architecture is used in high-end applications such as video CISC architecture is used in low-end applications such as
processing, telecommunications, and image processing. security systems, home automation, etc.
DEpt of E&TC, RSCOE 6
RISC and CISC Block diagram
An embedded system is a system that has software embedded into hardware, which
makes a system dedicated for an application (s) or specific part of an application or
product or part of a larger system
OR
Microcontroller-based, software-driven, reliable, real-time control system, autonomous
or human or network-interactive, operating on diverse physical variables and in diverse
environments, and sold into competitive and cost-conscious market.
DSR (data set ready)-When DCE is turned on and has gone through the self-test, it asserts
DSR to indicate that it is ready to communicate
RTS (request to send) - When the DTE device has byte to transmit, it assert RTS to signal the
modem that it has a byte of data to transmit
CTS (clear to send) - When the modem has room for storing the data it is to receive, it sends
out signal CTS to DTE to indicate that it can receive the data now
DCD (data carrier detect)- The modem asserts signal DCD to inform the DTE that a valid
carrier has been detected and that contact between it and the other modem is established
RI (ring indicator)- An output from the modem and an input to a PC indicates that the telephone
is ringing. It goes on and off in synchronous with the ringing sound.
RS232 is not TTL logic compatible, so require line driver. A line driver such as the MAX232
chip is required to convert RS232 voltage levels to TTL levels, and vice versa.
https://www.youtube.com/watch?v=XVEnxipCIJ0
DEpt of E&TC, RSCOE 16
RS232 communication
2. The master switches the SS/CS pin to a low voltage state, which activates the slave:
3. The master sends the data one bit at a time to the slave along the MOSI line. The slave
reads the bits as they are received
4. If a response is needed, the slave returns data one bit at a time to the master along the
MISO line. The master reads the bits as they are received
Data transmission in SPI
Transmissions normally involve two shift registers of some given word size ( may be
8 bits), one in the master and one in the slave
They are connected in a virtual ring topology.
Data is usually shifted out with the most-significant bit first. On the clock edge, both
master and slave shift out a bit and output it on the transmission line to the
counterpart.
On the next clock edge, at each receiver the bit is sampled from the transmission
line and set as a new least-significant bit of the shift register.
After the register bits have been shifted out and in, the master and slave have
exchanged register values.
If more data needs to be exchanged, the shift registers are reloaded and the
process repeats.
Transmission may continue for any number of clock cycles.
When complete, the master stops toggling the clock signal, and typically deselects
the slave.
Continued
Digital Storage Oscilloscope
The digital storage oscilloscope is an instrument which gives the storage of a
digital waveform or the digital copy of the waveform. It allows us to store the
signal or the waveform in the digital format, and in the digital memory also it
allows us to do the digital signal processing techniques over that signal.
The maximum frequency measured on the digital signal oscilloscope depends
upon two things they are: sampling rate of the scope and the nature of the
converter.
Applications
It is used in audio and video recording.
It is used in radio broadcasting for signal testing.
In circuit debugging, it is used for testing of the voltage of the signal.
DSO
Working of DSO
Initially digital storage oscilloscope digitizes the analog input signal, then the
analog input signal is amplified by amplifier if it has any weak signal.
After amplification, the signal is digitized by the digitizer and that digitized signal
stores in memory.
The analyzer circuit process the digital signal after that the waveform is
reconstructed (again the digital signal is converted into an analog form) and
then that signal is applied to vertical plates of the cathode ray tube (CRT).
The cathode ray tube has two inputs they are vertical input and horizontal input.
The vertical input signal is the ‘Y’ axis and the horizontal input signal is the ‘X’
axis.
The time base circuit is triggered by the trigger and clock input signal, so it is
going to generate the time base signal which is a ramp signal.
Then the ramp signal is amplified by the horizontal amplifier, and this horizontal
amplifier will provide input to the horizontal plate. On the CRT screen, we will
get the waveform of the input signal versus time.
Continued
The digitizing occurs by taking a sample of the input waveform at periodic
intervals. At the periodic time interval means, when half of the time cycle is
completed then we are taking the samples of the signal.
The process of digitizing or sampling should follow the sampling theorem.
The sampling theorem says that the rate at which the samples are taken should
be greater than twice the highest frequency present in the input signal.
When the analog signal is not properly converted into digital then there occurs
an aliasing effect.
When the analog signal is properly converted into digital then the resolution of
the A/D converter will be decreased.
When the input signals stored in analog store registers can be read out at a
much slower rate by the A/D converter, then the digital output of the A/D
converter stored in the digital store, and it allows operation up to 100 mega
samples per second.
This is the working principle of a digital storage oscilloscope.
Comparison of DSO and CRO
Conventional Storage Oscilloscope
S.NO Digital Storage Oscilloscope
The digital storage oscilloscope collects data After triggering only, the conventional
1 always storage oscilloscope collects data
2 The cost of the tube is cheap The cost of the tube is costlier
For higher frequency signals the DSO produce For higher frequency signals the ASO
3 bright images cannot produce bright images