STANDARDIZATION OF

CIRCUITS
REPORT ON STANDARDIZATION OF THE TYPICAL CIRCUITS
FOR ELECTRONIC INTERLOCKING
[Report No.- SS/155/2019]
SS/155/2019
[VERSION
VERSION 3.0 Dated 08.07.2024]
08.07.2024

[RESEARCH DESIGN AND STANDARDS ORGANIZATION]

[MINISTRY OF RAILWAY]
RAILWAY
Version History:

S. No. Issue Version Reasons for Revision

Date
1 18-10-2019 - First issue
2 29-03-2022 2.0 Modification/ Addition of issued standard typical
circuits based on Zonal Railways feedback.
3 *-07-2024 3.0 Incorporation of standard typical circuits of EI
controlling the automatic signalling in the block
section (double line and single line) and the
modifications required in the station’s circuits of
EI for introduction of automatic signaling.
(Ref.- Rly. Bd.’s l. no. 2018/Sig/ 36-SD/1/Pt
dated 09.09.2022).
 2019/2022

REPORT NO. SS/155/2019

RESEARCH DESIGN AND STANDARDS ORGANIZATION

(MINISTRY OF RAILWAYS)
Table of Contents
Chapter No. Item

Page 1 of 174
Page 2 of 174
Page 3 of 174
Page 4 of 174
 I. Executive Summary
In connection with the standardization of the typical design for Electronic Interlocking, a Sub Working Group was formed as
per Railway Board Letter No. 2010/Sig/WG/IP Dt. 02.05.2012 to bring uniformity over Indian Railways. The adoption of uniform
circuits over Indian Railways will help in faster design rollout and feasibility in automation of design. The Sub Working Group had
finalized Typical Designs of the Application Logics/Circuits required for Electronic Interlocking. This was submitted in the form of
report vide No. SS/137/2013. The same was discussed in 83rdSSC and circulated for all Zonal Railways under advice from Railway
Board. Later, Railway Board vide letter No.2018/Sig/36-SD/1, dtd.14.11.2018 has nominated a committee for finalization of
Electronic Interlocking typical circuits which reviewed the typical circuits including additions of left out circuits to make a
comprehensive reference for all Zonal Railways by superseding the previous report to avoid any ambiguities.

After multiple deliberations at RDSO/LKO, at New Delhi & at Patna, the committee prepared a draft report and circulated to
all Zonal Railways vide letter No. ECR/S&T/Con/Standardization, dated 23.04.2019. The major issues covered in the draft report
were also presented during PCSTE conference held on 27.07.2019 at Guwahati. The comments were received from all four EI
vendors and 9 Zonal Railways. The committee had gone through the same and deliberations were held during meetings conducted
by the committee with all Electronic Interlocking firms on 04.07.2019 & followed by internal discussion for Zonal Railways
comments on 05.07.2019 at Lucknow.

There was another committee constituted by Railway board for standardisation of symbols and nomenclatures of signalling
design. The committee used the tentative nomenclature for the circuits which can later be changed without any issue to be in sync
with that of standard nomenclature used by that committee.

Similarly all logical circuits in visual form shall be differentiated from external physical circuits. The logical circuits shall start
with a vertical line and ends with a dot/rung. While physical (interface) circuit will start and end with arrowhead like existing
convention. This will avoid confusion in design and troubleshooting during failures/maintenance.

Page 5 of 174
 Further discussion was held by the committee in Lucknow on 08.08.2019 and final draft was prepared and approved on
11.10.2019. Based on the discussions finalreport of standardization of typical circuits for Electronic Interlocking was forwarded to
Railway Board by RDSO vide letter no.STS/E/Signalling Principles/Vol.-II/64 dtd.18.10.2019 with recommendations for adoption by
zonal railways. Railway Boards circulated the report vide letter 2018/Sig/36-SD/1/Pt dtd.26.11.2019 to all zonal railways, OEM’s
and directed zonal railways to implement the same at least at one station EI with upto 100 routes and submit feedback. These
typical EI circuits are available at link - http://10.100.2.19/signal/policy/uniform_circuit_diagram.htm

Typical EI circuits have so far been implemented on various zones at about 40 stations at least and based on their
experiences, zonal railways shared problems faced during & after implementation of typical circuits with RDSO. RDSO further
stated that improvement in typical circuit is continuous process and requested Railway Boards to nominate a “Standing Committee”
for further improvement in Typical Circuits based on regular feedback. Railway Boards vide their letter 2018/Sig/36-SD/1/Pt
dtd.07.07.2021 has nominated “Standing Committee on EI Typical Circuits” of the following officers for further improvement in
Typical Circuits.
1) Shri ShyamVerma, CSE/WCR as Convener
2) Shri M.M.Waris, Director/Sig.I/RDSO as Secretary
3) Shri V.K. Pandey, Dy.CSTE (Plg)/NR as Member
4) Shri D.S.Ganesh, Dy.CSTE/P&D/WR as Member
5) Shri AtanuDey, Dy.CSTE/Works/D&D/ER as Member

Observations of various zonal railways have been examined by the committee through rounds of about ten
videoconference including discussions with zonal railway design representatives and individual discussions among members,held
from 19.01.2022 to 28.03.2022 and concluded as briefed in the as Annexure-A (Page 174a to 174h).

Based on above, committee updated Typical Circuits mainly for Point operation, Starter signals for slow to release feature,
Route Release circuits as per SEM provision, block circuits and added new circuits for Advance Starter signals with deletion of
EGGRNZ counter circuits etc. Nine new pages in circuits i.e. 95a,95b,96a,96b,126a,126b,126c,165a,165b & Annexure-A (174a to
174h) are added without changing numbering scheme of the original report 2019 and updated booklet of Typical EI Circuits report
no.SS/159/ 2019 Version 2.0 Dtd.29.03.22.

Page 6 of 174
 EI Typical Circuits shall be used by all Zonal Railways for development of detailed application logic of the station. It is
recommended that Typical circuits like IBS, embedded Block Working in EI etc. shall be incorporated in next Phase.

DISCLAIMER: The circuits in this report are typical circuits for reference purpose only. The Zonal Railway shall get prepared
the complete application logics for the station based on these typical circuits and carry out complete testing of the designed and
approved station application logic before commissioning.

Page 7 of 174
Page 8 of 174
 II. INTRODUCTION

a. Purpose and Scope

The purpose of this document is to describe the application of the interlocking principles and interlocking functions as
System Generic Requirements for the function of Electronic Interlocking applied to Indian Railway applications.

This document is the input for developing the generic Signalling design as applied to the Indian Railway. These
specific rules can be adopted during the execution phase of each project.

All principles described in this document are extracted from the IRS documents as listed in below.

b. Applicability of the document: Exceptions and Assumptions

In the meeting held at Mumbai on 30th October 2018, certain decisions were taken and circulated by railway board
vide letter No. 2018/Sig/36-SD/1 dated 14.11.2018. Accordingly, considering the decisions taken, following are
salient feature of this standardisation report.

1. All EI shall be provided with Dual VDU and therefore no provision in standardised logic has been kept for
CCIP working.
2. All EI shall be having route setting feature, but point chain group feature is not considered essential as
maximum of 2 to 3 points may be required to be operated at any time.
 3. Currently recommended standardised logics are proposed to be used for way side station with maximum of
100 routes. This will cover more than 95% of stations on Indian railways.
4. These stations of less than 100 routes shall not be having Sectional route release feature.
5. All operation through VDU shall be by drop down menu.
6. A drop down menu can generate multiple command bits which is equivalent to press of multiple buttons
simultaneously.
7. For emergency operations, it is recommended that an additional physical key shall be provided which shall be
configured as redundant Vital input to Electronic Interlocking like vital field inputs.
8. For each independent route with each independent overlap, there shall be one controlling relay (LR). Thus LR
shall be equal to number of routes in Route control table. This will not require provision of swinging locking/
conditional locking. Direct locking of all conflicting movement shall be provided in LR circuit.
9. Logic for FCOR relay/bit is not prepared as there are no such directives in codes and manuals and there are
differences of opinion regarding its requirement among the OEM. Hence FCOR logic is not recommended
here.
10. Circuits for automatic signalling, IB signalling, operation of Interlock LC gates, axle counter resetting are not
included as they are external to EI. These shall be catered in next Phase.
11. Siding control through Ground frame are also excluded as now most of them are converted to motor
operation.
12. The recommended circuits are valid only for EI installation with Metal to Carbon interface relays. However, in
case of Proved type Signalling relays (Metal to Metal), the requirement of circuit design is different where
opening of front contact of relay is proved by closing of back contact. Hence, the present recommended
circuits shall not be used for EI installation with Metal to Metal interface relays.

c. References
[R1] RDSO/SPN/192/2005 RDSO Specification for Electronic Interlocking.
[R2] IRS S/36. - Route relay interlocking systems

[R3] General Rules for Indian Railways.

[R4] Signal Engineering Manual Part-1 and Part-2.

[R5] Report of SAG committee on Directive Principles.

[R6] RDSO report No. SS/137/2013 for standardisation of the typical circuits for electronic interlocking
Standardization of Signalling Design:
Typical Circuits for Electronic Interlocking

RECOMMENDATIONS OF COMMITTEE
CHAPTER-1 : EI START UP
1. EI START UP

a) EI starts with all bits in drop condition.

b) Whenever EI is started or reset, EI does not know the status of last operation of signalling gears at the time of last shut
down.

c) Thus entire process of EI start up is divided in to three stages

i) SYSDEL System delay (Initial Delay to stabilise the hardware and communication among them)
ii) SYSINIT System Initialisation (Delay to stabilise the application logic)
iii) SYSON System is ON (System is ready for operation).
Details of above are given below.

d) System Delay- SYSDEL

i) When EI is powered an initial delay of few seconds (as per requirement of OEM) is kept for recovery. During this
recovery time -
a. Any of the Processor shall be OK/Healthy.
b. Communications between main and standby EI/Processor shall be ok.
c. All Input & output communication, Network communication etc. shall be ok.
d. Health of Input and Output Modules are checked and found ok.
e. During above period no input is read and no output is delivered.

ii)
will go up and then pickup SYSINIT.1 and then SYSDEL will drops.
iii) initial time duration (as per OEM) , then SYSERR will pick up
and prevents delivering of outputs and display on VDU and wherever feasible EI shall be shut down.
e) System Initialisation - SYSINIT
i) As explained above, when entire hardware, communication and system is OK, then SYSDEL will pick up SYSINIT.1
ii) SYSINIT.1
iii) SYSINIT.1 for SYSINIT.
iv) This 120 sec time delay ensures that if any train is in motion at the time of shutting down of EI shall stop, before
interlocking start working.
v) As soon as SYSINIT n

f) - (Approx 10 second)
Initially, when EI is powered ON, SYSINIT and all routes are locked, all buttons are Blocked, all points are flashing, all
points are locked, all signals are at ON by default and when SYSINIT , then -
i) Communication with OPC shall be established.
ii) All command bit from OPC are reset to down.
iii) Inputs are read and displayed. Outputs remain disabled.
iv)
v) With , Point conditions are read and point position is stabilises in EI and on VDU.
vi) Wherever track circuits are up, ASR and OVSR pick up.
vii) Where tracks are down, concerned ASR and OVSR shall remain down.
viii) After establishing communication with OPC, buttons are UNBLOCKED by SM depending on the status of track
circuits.

g) System is ON (SYSON) slow to pick up 10 sec.

i) After 120 seconds after 10 sec. Thereafter SYSINIT.1 and
SYSINIT will drop. Dropping of SYSINIT ensure removal of bypass path provided for stabilising ASR, Point circuit etc.
ii) SM can now log into the system by Password and by SM Key.
iii)

h)
operator.
CHAPTER-2 : VDU OPERATION
2. VDU OPERATION

a) VDU shall display complete yard layout as per approved SIP.

b) When there is no communication with EI, the static layout in cyan/grey(as per OEM) colour shall be displayed without any
active bits.

c) After getting input from EI, layout shall become active and display the status.

d) The details to be displayed on VDU are

i) General Name of station, Colour with code R/G/B, UP/DN Direction, Date and Time, etc.
ii) System Information OEM Name/logo, Active system (A/B), Communication between VDU & EI, Communication of
EI with remote interlocking and OC.
iii) Signalling information SM key, Signal, Track, Point, Slots, Gate, etc.
iv) Alarms

e) Operation of Signalling system shall be through drop down menus.

f) The buttons operated while selecting a menu is as under:-

Operation Button Bit triggered
When OPC1 is active

When OPC2 is active

SM Key Physical SMKEY_ (Remains up so long as physical SM key is in)

EUUYN cancellation
ESUYN
 (Super Emergency cancellation)
Emergency Key Physical EMK
Signal Operation +
Calling On signal operation C +
Signal Cancellation
Overlap Cancellation
Point operation ( N to R )
Point Operation (R to N)
Emergency Point operation 105/106
(N to R)
Emergency Point operation
(R to N)
Crank Handle Control Transmit
Crank Handle Control Receive
Level Crossing Control Transmit LC32X
Level Crossing Control Receive LC32X
Alarm Acknowledgement

g) During each of the above operation, the button once pressed from VDU shall remain available for minimum of three seconds
(or as decided by OEM, based on response time of their EI).
h) .
 CHAPTER-3 :
BUTTON NOMENCLATURE AND THEIR FUNCTION
3. BUTTON NOMENCLATURE AND THEIR FUNCTION

Button and its logic are provided in Interlocking. However, in VDU operation, provision of direct operation by buttons is not kept and
all operation is through drop down menu. Each drop down menu will pick up the concerned button (or combination of buttons) and
in turn pick up the button logic as per conditions.

S.NO. NAME OF BUTTON FUNCTION EI BIT Example

1. Main Signal Button S**GN Provided for each Main signal to initiate S**GN_P S17GN_P
concerned function.
2. Shunt Signal Button SH**GN Provided for each Shunt signal to initiate SH**GN_P SH17GN_P
concerned function.
3. Calling ON Signal C**GN Provided for each Calling on signal to C**GN_P C17GN_P
button initiate concerned function.
4. Route Button UN Provided for each route for giving UN_P 01AUN_P
command to initiate route.
5. Point Button WN Provided for each point for operating the WN_P 101/102WN_P
point
6. Point group button NWWN For operation of point from Reverse to NWWN_P NWWN_P
Normal position
7. Point group button RWWN For operation of point in from Normal to RWWN_P RWWN_P
Reverse position
8. Emergency point EWN For operation of point in emergency (in EWN_P EWN_P
button track down condition)
9. LC button LC**XN For giving/taking command to open/lock LC**XN_P LC32XN_P
the gate.
10. Crank handle button CH**YN For giving/taking command to take CH1YN_P CH1YN_P
out/lock the crank handle
11. Slot button YN For giving slot to concerned cabin YN_P YN_P
 12. Group slot Button GSB For giving slot to LC Gate, CH and Other GSB_P GSB_P
Slot
13. Group slot return GSRB For taking back slot GSRB_P GSRB_P
Button
14. Emergency route EUUYN For releasing the route when train has EUUYN_P EUUYN_P
release button not passed the signal and all tracks in
route are clear
15. Emergency Sub-route ESUYN For cancellation of route when any of the ESUYN_P ESUYN_P
cancellation button route track is failed or route stuck up.
16. Overlap release button OYN For releasing overlap in emergency OYNR OYN_P

17. Buzzer ACKN For acknowledging the buzzer. ACK_P ACK_P

acknowledgement
button
18. Signal Raising Button EGRN For raising the signal to ON. EGRN_P EGRN_P

19. SM Operating Key SMKEY SM key for normal operation SMKEY SMKEY
20. Emergency Key EMKEY SM Key for Emergency operation through EMKEY_IN EMKEY_IN
VDU
21. Extreme Emergency EECHKEY SM key for Emergency release of all ECH_PR ECH_PR
external Key Crank handle during failure of EI/VDU

Note:

a) .
b) Any Button Relays _P will pick up only when the command is received from VDU, which is logged in and connected with EI.
3-1 Signal Button Logic (Main/ Calling-on/Shunt)

1) Signal button command is initiated.

2) No other signal button is pressed
3) Concerned button is unblocked
4)
5) No point button command is active .
6) Concerned GNR will 3 second.

3-2 Signal Button Normal check Logic (GNCR)

Purpose of GNCR is to ensure only one signal command is active and next signal command can be executed only after the first
signal command is over (i.e GNR )
are supposed to keep each button pressed for three seconds. GNCR is also useful in giving indication on VDU of button press
condition.

3-3 Route Button Logic It proves that

1) SM Key is in.
2) Route button command is initiated
3) No other route button command is active.
4) Concerned Route button is in Unblock condition.
5) SYSON
6) All other common buttons are down so that only one route command is initiated at a time.
7) Concerned UNR will 3 second.
 3-1

1 2
10 11 C11 12 13 C13 15 C15 16 C16 C17 24 C24 25 C25
17GN_P GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
a

2
26 C26 27 C27 28 C28 29 C29 35 36 C36 37 38 C38 SH15
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
a b

2
SH15 SH16 SH17 SH19 SH21 SH24 SH25 SH26 SH27 SH28 SH29 SH30 SH32 SH64 SH66
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
b c

3 5 4

17GN_UBLR WNCR SYSON 17 GNR

c
4
EGRNR

S 17 GNR LOGIC
 3-2

1
10 11 C11 12 13 C13 15 C15 16 C16 17 C17 24 C24 25 C25
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
a

1
26 C26 27 C27 28 C28 29 C29 35 36 C36 37 38 C38 SH15
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
a b

1
SH15 SH16 SH17 SH19 SH21 SH24 SH25 SH26 SH27 SH28 SH29 SH30 SH32 SH64 SH66
GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR GNR
b c

GNCR
c

GNCR LOGIC
 3-3

3
1 2 UP1 UP2 04T 2T 11T
05T 01B 01C 01D 02 03A 03B 06T
SMKEY 01AUN_P UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR
a

3 6
07T DN1 DN2 SD1 SD2 4 5
UNR UNR UNR UNR UNR GSBR GSRBR NWWNR RWWNR 01AUN_UBLR SYSON
a b

01AUNR
b

NOTE: NO BLOCKING BIT IN GSBR,

GSRBR, NWWNR , RWWNR LOGIC

01A_UNR LOGIC
3-4 Route Button Normal check Logic (UNCR)

Purpose of UNCR is to ensure only one route button command is active and next route command can be executed only after the
first route command is over (i.e UNR ). Each route button shall remain up; so long as press command from VDU is available.
keep each button pressed for three seconds. UNCR is also useful in giving indication on VDU of button
press condition.

3-5 Point Button Logic It proves that

1) Point button command is initiated.

2) No other point button command is active. All point buttons are grouped together so that only one command is initiated at a time.
3) No signal command is active .
4) Concerned Point button is in Unblock condition.
5) SYSON has picked up after EI boot up delay of 120sec.
6) Concerned WNR will 3 second.

3-6 Point Button Normal check Logic (WNCR)

Purpose of WNCR is to ensure only one point button command is active and next point command can be executed only after the
first point command is over (i.e.WNR ). Each point button shall remain up; so long as press command from VDU is available.

press condition.
 3-4

1
UP1 UP2 04T 05T 2T 11T 01A 01B 01C 01D 02 03A 03B 06T
UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR
a

1
07T DN1 DN2 SD1 SD2
UNR UNR UNR UNR UNR GSBR GSRBR NWWNR RWWNR UNCR
a

GSBR LOGIC
 3-5

2
1 3
103/104 105/06 107/08 109/110 111/112 151/152 153/154
101/102WN_P WNR WNR WNR WNR WNR WNR WNR GNCR
a

4 5
101/102
101/102 WN_UBLR SYSON WNR
a

101/102 WNR LOGIC

3-6

1
101/102 103/104 105/06 107/08 109/110 111/112 151/152 153/154
WNR WNR WNR WNR WNR WNR WNR WNR WNCR

WNCR LOGIC
3-7 Crank Handle/LC/Siding Button Logic It proves that

1) CH button command is initiated

2) Other CH, LC gate and Siding button commands are not active.
3) SYSON
4) All CH/LC/Sdg buttons are grouped together so that only one command is initiated at a time.

3-8 EGRN Button Logic It proves that

1) EGRN button command is initiated

2) SYSON is UP.
3) SM key is not proved to enable putting back the signal to danger without SM key.
4) EGRN will remain up till EGGN EGGN_P for at least 3 second.

3-9 EMKEY_INR key Logic It proves that

1) Emergency Key is in for Emergency operation like EWN and ESUYN.

2) SYSON is UP.

3-10 EWN Button Logic It proves that

1) EWN button command is initiated.

2) Emergency Key is IN.
3) SM key is not proved since it picks up with either NWWN or RWWN command.
4) SYSON is UP.
3-11 EUUYN Button Logic It proves that

1) SM Key is in.
2) EUUYN button command is initiated
3) Other group button commands are not active.
4) SYSON

3-12 ESUYN Button Logic It proves that

1) ESUYN button command is initiated

2) SM Key is in.
3) Physical Emergency key is in.
4) Other group button commands are not active.

3-13 SMKEY Logic It proves that

1) When SM key is inserted and turned, two interface relays SMKEY_IN1 and SMKEY_IN2 are picked up (refer sheet 4-1).
2) When
 3-7

2
1
CH2 CH3 CH4 CH5 CH2 CH6 CH7 CH8 LC 1 CH1
CH1YN_P YNR YNR YNR YNR YNR YNR YNR YNR XNR YNR

2
1
CH1 CH2 CH3 CH4 CH5 CH2 CH6 CH7 CH8 LC1
LC 1 XN_P YNR YNR YNR YNR YNR YNR YNR YNR YNR XNR

CH1 YNR & LC GATE XNR BUTTON LOGIC

 1 2
EGRN_P SYSON EGRNR
3-8

1 2
EMKEY_IN SYSON EMKEY_INR
3-9

1 3 4
EWN_P EMKEY_INR SYSON EWNR
3-10

1 2 3 4
EUUN_P SMKEY ESUYNR SYSON EUUYR
3-11

1 2 3 4 5
ESUN_P SMKEY EMKEY_INR EUUYNR SYSON ESUYR
3-12

1
SMKEY_IN1 SMKEY
3-13
1
SMKEY_IN2
3-14 Common Group Button (NWWN, RWWN,GSB, GSRB) logic It proves that

1) SM Key is in.
2) Concerned button command is initiated.
3) No route button command is initiated.
4) All other common buttons (like NWWN, RWWN, GSB, GSRB, etc) are down
5) SYSON is UP.

3-15. Overlap Cancellation Button Logic (OYN) It proves that

1. SM Key is IN.
2. Overlap cancellation command is initiated.
3. No other cancellation (EUUYR, ESUYR) is in progress.
4. SYSON bit is up to ensure that EI is ready.
 3
1 2 UP1 UP2 04T 2T 11T
05T 01B 01C 01D 02 03A 03B 06T
SMKEY GSB_P UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR
a

3
07T DN1 DN2 SD1 SD2 4
UNR UNR UNR UNR UNR GSRBR NWWNR RWWNR SYSON GSBR
a 3-14

3
1 2 UP1 UP2 04T 2T 11T
05T 01B 01C 01D 02 03A 03B 06T
SMKEY NWWN_P UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR UNR
a

3
07T DN1 DN2 SD1 SD2 4
UNR UNR UNR UNR UNR GSBR GSRBR RWWNR SYSON NWWNR
a

1 2 3 3 4
SMKEY OYN_P EUUYR ESUYR SYSON OYNR 3-15
 CHAPTER- 4
OPERATING CONTROL OVER INTERLOCKING
4. OPERATING CONTROL OVER INTERLOCKING

SM shall keep the operation of entire interlocking under his control through physical key (SM Key). Since most of the VDU
are not SIL compliant, cases of false command from operating VDU has been reported. Therefore it is essential to have
physical key control. The Key contact shall be taken as vital input through interface relay. To avoid possibility of single cause
failure, redundant Input of physical key in contact is taken through vital inputs on two different input cards of EI (on different
Object Controller wherever possible) as indicated on Sheet 4-1. Further these two relays are proved in parallel and picked
up a final relay SMKEY internally, which will be used in required logic circuits (refer 3-13).

Key control

An independent key box shall be provided in SM room that will keep control of operation. The key box shall have

i) SM Key For normal operation and routine emergency operation like EGGN, EUUYN, EOYN.
ii) Emergency key - For Emergency operation like EWN & ESUYN etc.
iii) Extreme Emergency External key control For extraction of crank handle during complete failure of EI/ VDU etc.

The functions of each key are as under:

i) SM Key
Insertion of this key authorises SM to operate and control entire interlocking. Following operations can be enabled by this
key:
i) Unblocking of Blocked buttons.
ii) Setting of point.
iii) Taking OFF all signals.
iv) Acknowledging alarm.
v) Sending and receiving slots of sidings, gate, inter cabins etc.
vi) Cancellation of route (EUUYN) & (ESUYN)
vii) Releasing and receiving crank handle key control.

It shall however be possible to put back signal to ON without presence of this key.
 ii) Emergency key (EMKEY)
Insertion of this key authorises SM to carryout Emergency operations like (i) Emergency point operation (EWN) (ii)
Emergency cancellation of sub route/ complete route or releasing of approach locking, back locking etc. (ESUYN)
(i) Emergency point operation (EWN) This is required to operate the point in case of failure of track circuit after
following due procedure laid down in SWR.
(ii) Emergency cancellation of sub route/complete route or releasing of approach locking, back locking etc.(ESUYN) -
This is required after following due procedure laid down in SWR when-
a) Route is held up when any of track circuit is down.
b) Route is held up after passage of train and not getting cancelled with EUUYN under normal cancellation.

Note: These emergency operations are carried out through positive proving of insertion of emergency key by SM.

iii) Extreme Emergency external control

This control is provided externally with a key and self restoring RED colour push button. During failure of VDU/ EI or
under any other emergency, insertion of this key along with pressing and releasing of RED button enable SM to put back
all signals to danger. After activating this feature, all signals shall go to danger immediately and after a delay of minimum
of 120 seconds all crank handle key controls shall be released.

Password control

i) Password control is not proposed for use of Electronic Interlocking.

ii) However password control can be kept to take control of active VDU (i.e. OPC1 or OPC2).
iii) Password management of Operating and Maintenance VDU is not a part of EI control, but controlled by PC of VDU.
Thus, it can be decided based on local condition by Zonal railway.
CHAPTER-5 :BLOCK UNBLOCK LOGIC
5. BLOCK UNBLOCK LOGIC

a) Block/ Unblock logic shall be provided through EI and not through OPC.

b) Block / Unblock logic implemented through one OPC shall remain effective even during changeover of OPC.

c) No extra password is necessary for Blocking and Unblocking of any individual button. When EI boots up initially all the
buttons shall be blocked by default and there shall be a facility to unblock all buttons using single command. However, a
on VDU. Procedure shall be defined in SWR.

d) SM KEY IN is required for unblocking a button, while same is not required for blocking of a button.

e) Block/ Unblock shall be provided on each Signal button, Point button and route button only.

f) Block/ Unblock logic shall be effective in following manner :-

g) BLOCKING
i) SIGNAL BUTTON Blocking of a Signal button shall prevent initiation of any route of the Main and Calling-on signal.
ii) SHUNT SIGNAL BUTTON - Blocking of a Shunt Signal button shall prevent initiation of any route of the shunt signal.
iii) POINT BUTTON - Blocking of a Point button shall prevent operation of point in either direction.
iv) ROUTE BUTTON - Blocking of a Route button shall prevent initiation of any signal route on that particular line.

h) UNBLOCKING
i) There shall not any automatic unblocking facility.
ii) Unblocking can be done on individual buttons.
iii) Unblocking can also be done by ALL UNBLOCK feature, preferable during EI startup.
i) Blocking of a button shall be indicated by a definite mark over the concerned button.
The logic for Blocking/ Unblocking shall remains similar for Signal/Point/Route button.

5-1 Signal Button Unblocking Logic

1. SM key is in.
2. As and when SM desires to UnBlock the button, the UnBlock logic command (17GN_UBL) is send from VDU.
3. SM can unblock by either individual UNBLOCK button or by ALL UNBLOCK button. The are 3 ALL UNBLOCK button for
Signal (ALLGN_UBL), Point(ALLWN_UBL) and Route (ALLUN_UBL).
4. When EI is powered on, UNBlock bit shall remain down, and all buttons shall be blocked.
5. Unblocking to start only after EI is ready af
6.

5-2 Blocking Logic

1. As and when SM desires to block the button, the Block logic command (17GN_BL) is send from VDU.
2. Blocking holds through 17GN_BLR .
3. When EI is powered on, all bits shall remain down. During SYSINIT stage, 17GN_BLR 1
This prevents any operation from VDU during starting up of EI.
4. d.
5.
6. Blocking of a button shall prevent operation through that button.
7.
 5-1

2 1 5
17GN_UBL SMKEY SYSON 17GN_UBLR

3
ALLGN_UBL

4
17GN_UBLR 17GN_BLR

S17GN UNBLOCKING LOGIC

(SIMILAR LOGIC FOR POINT & ROUTE BUTTON)

5-2

1
17GN_BL 17GN_BLR

2
17GN_BLR 17GN_UBLR

3
SYSINIT1 SYSON

S17GN BLOCKINGLOGIC
(SIMILAR LOGIC FOR POINT & ROUTE BUTTON)
CHAPTER-6 :Route initiation Logic (LR)
Page 48 of 174
 6-1
1 2 3 4 5
17 01A S17 OV 25 S_C_SH17 S_C_SH17 S_C17 101/102 101/102 103/104 103/104
GNR UNR ASR SR ESUYR EUUYR UYR1 WLR RCR1 WLR RCR1
a

101/102 103/104
S17_01A NWR NWR
LR

105/106 105/106 109/110 109/110 111/112 111/112 153/154 153/154 C17_01A C17
WLR NCR1 WLR NCR1 WLR RCR1 WLR RCR1 LR ASR
a b
105/106 109/110 111/112 153/154
NWR RWR NWR NWR

6 7 8

SH17_2T SH17 SH19_01A SH19 SH25_06T SH25 S12_UP2 S12 S16_04T S16 C16_04T
LR ASR LR ASR LR ASR LR ASR LR ASR LR
b c

C16 SH16_04T SH16 S28_2T S28 C28_2T C28 SH28_2T SH28 OV 28 S38_01B S38
ASR LR ASR LR ASR LR ASR LR ASR SR LR ASR
c d

8 9 10 11
C38_01A C38 SH66_01A SH66 C36_02 SH64_02 C36 SH64 S17 S17_01A
LR ASR LR ASR LR LR ASR ASR GNR VDU_FAIL LR
d
151/152
RWR EGRNR

NOTE: EXTRA LOCKING TO BE PROVED AS PER RAILWAYS RCC.

S17_01A LR LOGIC

Page 49 of 174
6.2 Calling on Route initiation Logic (C17_01ALR)

The following are to be proved in Co-LR logic:

1. Calling on Route initiation command given. Signal button (C17GNR ) and route button (01AUNR ).
2. No emergency cancellation command is initiated.
3. 04TPR back contact is taken to prove that train is standing at calling on track circuit. when pick up will drop the LR
during passage of train.
4. All points in the route, OV and isolation are not locked condition (WLR ) or points are in the required position
(internal latch relay NWR/ RWR ). NWKR/ RWKR is not taken as it suffers the disadvantage that if any point in
the route fails, the route will not set.
5. Point normal control relay NCR1 is down where point is required in reverse and point reverse control relay RCR1
where point is required in normal to achieve the locking of signals require same position of points.
6. Main signal on the same post, route may )
7. Shunt signal route on the same post is not initiated (LR & ASR ).
8. Conflicting movements in the same direction are not initiated (LR & ASR ).
9. Directly opposite movements are not initiated. Which require same point setting (LR & ASR ).
10. Other conflicting criss- cross movements are not initiated (LR & ASR may be conditional) .
11. Signal cancellation should be possible.
12. VDU_FAIL back contact to raise up the signal in case of VDU failure or Extreme Emergency Key is operated.
 6-2
1 2 3 4 5
C17 01A S_C_SH17 S_C_SH17 04T 101/102 101/102 103/104 103/104
GNR UNR ESUYR EUUYR TPR WLR RCR1 WLR RCR1
a

101/102 103/104
C17_01A NWR NWR
LR

6 7

105/106 105/106 109/110 109/110 111/112 111/112 17 17 SH17_2T SH17

WLR NCR1 WLR NCR1 WLR RCR1 HECR DECR LR ASR
a b
105/106 109/110 111/112
NWR RWR NWR

8 9

SH19_01A SH19 SH25_06T SH25_07T SH25 S12_UP2 S12 S16_04T S16 C16_04T C16 SH16_04T
LR ASR LR LR ASR LR ASR LR ASR LR ASR LR
b c

SH16 S28_2T S28 C28_2T C28 SH28_2T SH28 OV 28 S38_01B S38 C38_01A C38
ASR LR ASR LR ASR LR ASR SR LR ASR LR ASR
c d

9 10
11
SH66_01A SH66 S36_01B C36_01A C36_02 SH64_01A SH64_02 S36 C36 SH64 C17
LR ASR LR LR LR LR LR ASR ASR ASR GNR
d e
151/152
12 RWR EGRNR
C17_01A
VDU_FAIL
LR
e

C17_01A LR LOGIC
NOTE: EXTRA LOCKING TO BE PROVED AS PER RAILWAYS RCC.

Page 51 of 174
6.3 Shunt Signal Route Initiation Logic (SH17_2TLR)

The following are to be proved in SH17-2T LR logic:

1. Shunt signal Route initiation command gi 2TUNR ) and previous route is
released i.e. SH**ASR .
2. No emergency cancellation command is initiated.
3. UYR1 back contact is taken to drop the LR on passage of train.
4. All points in the route, OV and isolation are not locked condition (WLR ) or points are in the required position (internal
latch relay NWR/ RWR ). NWKR/ RWKR is not taken as it suffers the disadvantage that if any point in the route fails, the
route will not set.
5. Point normal control relay NCR1 is down where point is required in reverse and point reverse control relay RCR1 where
point is required in normal to achieve the locking of signals require same position of points.
6. Main /Calling ON signal, on the same post, route not initiated. (LR & ASR ).
7. Directly opposite movements are not initiated. Which require same point setting (LR & ASR ).
8. Other conflicting criss- cross movements are not initiated (LR & ASR may be conditional).
9. Main/Calling on signal route in rear not initiated (LR & ASR ).
10. Signal cancellation should be possible.
11. VDU_FAIL back contact to raise up the signal in case of VDU failure or Extreme Emergency Key is operated.
 6-3
1 2 3 4 5
SH17 2T SH17 S_C_SH17 S_C_SH17 SH17 101/102 101/102 103/104 103/104
GNR UNR ASR ESUYR EUUYR UYR1 WLR RCR1 WLR RCR1
a

101/102 103/104
SH17_01A NWR NWR
LR

6 7

17_01A 17_01B 17_02 17_03A 17_03B S17 C17_01A C17_02 C17_03A C17 S12_UP2 S12 S16_04T
LR LR LR LR LR ASR LR LR LR ASR LR ASR LR
a b
7

S16 C16_04T C16 SH16_04T SH16 S26_2T S26 C26_2T C26 SH26_2T SH26 OV 26 S24_2T
ASR LR ASR LR ASR LR ASR LR ASR LR ASR SR LR
b c

S24 C24_2T C24 OV 24 SH24_2T SH24 S28_2T S28 C28_2T C28 SH28_2T SH28 OV 28
ASR LR ASR SR LR ASR LR ASR LR ASR LR ASR SR
c d

109/110
NWR

8 9 10 11
S36_02 C36_02 S36 C36 C13_04T C13 SH17 SH17_2T
LR LR ASR ASR LR ASR GNR VDU_FAIL
LR
d
151/152
RWR EGRNR

153/154
RWR

NOTE: EXTRA LOCKING TO BE PROVED AS PER RAILWAYS RCC.

SH17_02 LR LOGIC

Page 53 of 174
 CHAPTER- 7
POINT CONTROL AND POINT OPERATION LOGIC
7. POINT CONTROLS

Points shall be controlled automatically to the required position when either a route is called or manually by a command.

A) NORMAL POINT CONTROL

Point Control when free to move
Points shall be prevented from moving under the train. Points are controlled from one position to another position only when
they are free to move.
Under Normal working, a point is said to be free and can be controlled from one position to another only when all the
following conditions are satisfied
i) The track circuits on which the point is located, is not occupied,
ii) No route is set & locked passing through the point.
iii) Crank handle key of the point is not inserted.

When condition (i) & (ii) above are not available and point is required to be controlled, then point can be controlled under
various feature of Emergency point control which are described below.

B) EMERGENCY POINT CONTROL

Point Control Track occupied

Track circuit is occupied - When the point track is occupied, there is a facility to control the point from one position to another
position under some surveillance. There are instructions specified in the signal engineering manual before using this feature.
In VDU, there is an emergency command for Emergency Point Operation. This is secured by the Emergency key. After
Emergency key is inserted, the point control command can be executed by SM, subject to fulfilment of conditions laid down
in SWR. Control of point using the emergency point operation is logged through a counter.
 Point is locked
Points is kept locked and not allowed to be moved when either
i) Any signal route passing over the point is approach locked or any sub route over the point is set & locked (Route locking).
ii) Overlap in which points are lying is set & locked
Point locked in Route When the point is locked either under a signal route, subroute, or overlap route, then point can be
controlled only be crank handle.

C) CRANK HANDLE KEY CONTROL

Control of the crank handle key is interlocked with the concerned signals. When the control of key is out, then concerned
signal cannot be taken off and point cannot be controlled automatically. However, point can still be controlled manually, till
such time crank handle key is not inserted in point machine.
LOGIC RELATED TO POINTS

The various logic bits related with point control and their functions are described below:

7-1. POINT LOCKING RELAY (WLR) LOGIC

This bit when low locks the concerned points electrically inside interlocking.
In WLR Logic, the following conditions are to be required to pickup WLR (Making point free)

1.
2. It should be proved that no route over point is set. This is achieved by proving concerned signals ASR/TLSR/TRSR Up.
3. No overlap towards the point is set. This is achieved by proving concerned OVSR Up
4. (a) Sometimes, a point may not be locked by any signal which are leading to parallel movements, but when this point is
set reverse both the movements may become conflicting to each other, e.g., a calling on signal does not lock the points
in overlap and the same point happens not to be in shunt signal movement. But when both the calling on and shunt
movements are initiated, this particular point may be required in locked condition to ensure isolation between the two
movements. In such cases, special locking is provided in WLR logic, wherein the TLSR/TRSR/ASR front contact of both
the movements will be proved in parallel. This enables dropping of WLR when both the movements are initiated, thus
ensuring isolation between both movements.
(b) In the above condition, the concerned contacts have to be by passed by front contacts of point NWR/RWR suitably to
avoid locking of the point for unconcerned movements.
7-2. AUTO NORMAL/REVERSE POINT CONDITION LATCH LOGIC (NCR/RCR)

The function of this relay is to initiate the condition for operation of point to concerned position automatically by route initiation, i.e.
when concerned LR pick up and hold it till LR is up. However, in order to ensure that point is operated only once, when LR pickup,
suitable conditions are built in and multiple bits are made as NCR1, NCR2, NCR3 etc.

In NCR/RCR Logic, the following are to be proved:

1. Normal position of NCR/RCR-

2. Any one of the route/overlap LR picking up that requires the point to be set to Normal should energize NCR1 relay. This is
achieved by proving all route/overlap LRs front contacts, which require the point in Normal position, in parallel.
3. Any one of the route/overlap LR picking up that requires the point to be set to Reverse should energize RCR1 relay. This is
achieved by proving all route/overlap LRs front contacts, which require the point in Reverse position, in parallel.
4. Sometimes special throwing of the point may be required to ensure isolation between two parallel movements and in
neither of them the point position is proved. In such cases, the route locking (ASR/TLSR/TRSR Dn) of one movement and
initiation of other movement (LR pick up) proved in series will throw the points to the concerned position. (wherever
required)
5. Sometimes a point is locked in overlap, however, initiation of another route requires this point in isolation or for parallel
movement, which can be achieved by conditional throwing of point, thus WLR contact is not proved here. (where ever
swinging locking is provided)
6. The back contact of the NCR2 has to be proved in RCR2 logic and vice versa.
7. NCR1 will remain up till LR is set.
8. NCR2 will drop after triggering point initiation.
9. NCR3 will drop after point is operated and detection is received. This prevents reoperation of point, since LR remains up and
if point fails.
10. The logic for NCR/RCR-1/2/3 for the given yard is as follow:
7-3. POINT INITIATION LOGIC - NORMAL/REVERSE MANUAL POINT INITIATION LOGIC (Z1NWR/Z1RWR)
The function of this logic is to operate the points in manual operation mode and in automatic mode (using auto point condition latch
logic) in either direction. The manual point initiation logic covers normal operation mode as well as emergency operation mode i.e.
when point track is down.

In this logic following conditions are ensured:

1.
2. Point is controlled under normal condition, then VDU will generate WNR and NWWNR/RWWNR bit UP.
3. Point is controlled under emergency condition, then VDU will generate WNR, EWNR and NWWNR/RWWNR bit UP.
4. When point is required to be controlled automatically, auto point condition latch logic (NCR/RCR) will trigger the point
initiation logic.
5. This triggers the actual point initiation (NWR/RWR) and drops itself as soon as the buttons are released.
6. This also triggers the Point operating window (WJR) to start and enable it to drop by disconnecting the supply, when buttons
are released.
7. The logic for Z1NWR/Z1RWR for the given yard is as follow:
7-4 NORMAL/REVERSE POINT INTERLOCKING LATCH LOGIC (NWR/RWR)

The function of this logic is to set the required condition of point as per interlocking. This logic is final logic which triggers the point
operation.

In this logic following conditions are ensured:

1.
2. dition
auto route condition (NCR2/RCR2)
3.
4.
5. Crank handle key is in, when triggered for operation in auto route mode.
6. The back contact of the contrary bit RWR has to be proved in NWR logic and vice versa.
7.
n point is locked.
8. When system is powered on, then all logic bits are in down condition and interlocking does not have any information of point
at last moment. Based on the point condition of site and position of interface latch relay, the interlocking takes the position of
is

9. The logic for NWR/RWR for the given yard is as follow:

7-7 POINT SWITCHING LOGIC (NWCR/RWCR)
This logic is final output logic, which enable picking of external relays for operation of point. This logic shall get enabled when
interlocking desire that the point is operated. This logic remains enable till point is brought to desired position (NWKR/RWK
time window

In this logic following conditions are ensured:

1.
2.
3.
4. Point is not
5.
6. The logic for NWCR/RWCR for the given yard is shown in 7-7.

7-8 POINT DETECTION LOGIC (NWKR/RWKR)

This logic detects the position of point at site with reference to required point position as per requirement of interlocking. This relay
also gives steady and flashing indication to VDU operator.

In this logic following conditions are ensured:

1. When Point is correctly set at site NDKR/RDKR
2. When NDKR
3. - it gives Normal steady indication.
4. - it gives Reverse steady indication.
5. - it gives Normal Flashing indication.
6. - it gives Reverse Flashing indication.
7.
8. The logic for NWKR/RWKR for the given yard is as shown in 7-8.
7-9 INTERFACE POINT OPERATION CIRCUITS (NWCZR/RWCZR/WCZR)

As discussed above, point switching logic (NWCR/RWCR) is final logic, which shall derive the point to the desired position. Thus
NWCR shall operate the point to Normal and RWCR shall operate the point to Reverse. Since point is very signalling function and
even a momentary output for few seconds may either unlock the point or operate it, thus it is decided that point operation in each
direction compulsorily be through two output relays. These two output bits must be derived from two different output cards of EI.
The third output bit of WJR.J is also derived.

The output relay of NWCR bit is defined as NWCZR, while that of RWCR is RWCZR and for WJR is WCZR. All these three Point
deriving relays i.e. NWCZR/RWCZR and WCZR are with Heavy duty contact for point operation (QBCA1).

The point is operated externally using these output relays along with latch relay deployed externally. Latch relay is proposed to
obtain double cutting in Point Detection Logics as well as to achieve the external cross protection feature. Also during EI powering
on, this latch relay determines the last operated position of point. If position of latch relay also corresponds with site position of
point, it provides EI the required point position as last operated.

In this circuit following sequence will work

a) Point operated to Normal - delivers output. This supply then extended to Reset (Delatch) the Reverse

b) Point operated to Reverse - delivers output. This supply then extended to Reset (Delatch) the Normal
latch, Set the Reverse latch and Pickup the RWCZR.
c) WCZR pick up from EI output of WJR.J.
d) Thus EI output is first setting the latch and then only point driving relay picksup.
e) Back contacts of other contrary relays are proved.
f) As soon as the point detection is received, the supply to point motor is disconnected due to picking up of external point
detection relay i.e. NDKR/RDKR.
g) The circuit for NWKR/RWKR for the given yard is shown in 7-9.
7-10 EXTERNAL POINT DETECTION CIRCUITS (NDKR/RDKR)

This external relay pick up when point is correctly set in the desired position and its position corresponds with Latch relay position.
In this circuit following conditions are ensured:
i) Point is correctly set in desired direction. Detection supply comes from the point detection contacts.
ii) External latch relay position corresponds with the point setting conditions.
iii) Cross protection is provided by contrary latch relay.
iv) The circuit for NDKR/RDKR for the given yard is shown in 7-10.
 CHAPTER- 8
Route Checking Logic (UCR)
8. Route Checking Logic (UCR)

1. UCR is route checking bit and normal position of UCR is .

2. 2nd stage interlocking is ensured in this logic circuit.
3. Each signal (Main, Calling on & Shunt) will have UCR for each route.
4. Route checking process takes place when route is successfully initiated.
5. All the points in route/ isolation/ OV (as the case may be) are controlled to the required position and detected.
6. Conflicting signals are not approach locked.
When all the above conditions are satisfied, the route will be checked and set.

8.1. Main Signal Route Checking Logic (S17 UCR)

The following is to be proved in main signal UCR logic-
1. The concerned points in the route/isolation/overlap are in the required position (NWKR/RWKR ).
2. Conflicting routes including overlap are not set (ASR ). (Though this is redundant, but as a second level vital locking,

till complete arrival of train, hence recommended for retention of ASR.)

3. Concerned LR is .
4. Conflicting locking common to all UCR is proved in main UCR.
5. Calling on UCR is proved in main UCR.
6. Conditional locking of points for isolation purpose if any.
7. All individual route UCRs are parallel to make main UCR.
8.

Note:-There are as many UCRs as many route of signal.

 8-1A

1 2 1 2 6 3
101/102 103/104 105/106 109/110 111/112 S28 C28 SH28 OV28 SH25 153/154 S38 C38 SH66 C36 SH64 S17_01A S17_01A
NWKR NWKR NWKR RWKR NWKR ASR ASR ASR SR ASR NWKR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2 3

153/154 151/152 S36 C36 SH64 S17_01B S17_01B

1 RWKR NWKR ASR ASR ASR LR UCR
111/112 105/106
NWKR NWKR

1 2 1 2 6 3

101/102 103/104 107/108 109/110 S28 C28 SH28 OV28 SH25 153/154 S38 C38 SH66 C36 SH64 S17_01C S17_01C
NWKR RWKR NWKR NWKR ASR ASR ASR SR ASR NWKR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2 3
153/154 151/152 S36 C36 SH64 S17_01D S17_01D
RWKR NWKR ASR ASR ASR LR UCR

1 2 1 2 3
101/102 103/104 105/106 109/110 S26 C26 SH26 OV26 151/152 153/154 SH27 S36 C36 SH64 S17_02 S17_02
NWKR NWKR NWKR NWKR ASR ASR ASR SR RWKR NWKR ASR ASR ASR ASR LR UCR

S17UCR LOGIC
 8-1B

1 2 6 3
1
101/102 103/104 105/106 109/110 S24 C24 SH24 OV24 151/152 C36 SH64 S17_03A S17_03A
NWKR NWKR RWKR NWKR ASR ASR ASR SR NWKR ASR ASR LR UCR

153/154
RWKR

1 2 3

151/152 153/154 SH29 S36 C36 SH64 S17_01D S17_01D

RWKR NWKR ASR ASR ASR ASR LR UCR

4 5 7
C17 SH17 S12 S16 C16 SH16 SH19 OV16 C17 S17_01A S17
ASR ASR ASR ASR ASR ASR ASR SR UCR UCR UCR

S17_01B
UCR

S17_01C
UCR

S17_01D
UCR

S17_02
UCR

S17_03A
UCR

S17_03B
UCR

S17UCR LOGIC
8.2 Calling on UCR Logic

The following are to be proved in Co-UCR logic:

The following is to be proved in Calling on UCR logic-

1. The concerned points in the route/isolation are in the required position (NWKR/RWKR ).
2. Conflicting routes are not set (ASR ).
3. Concerned LR is .
4. Conflicting locking common to all UCR is proved in main UCR.
5. Main signal UCR is proved in Calling on UCR.
6. All individual route UCRs are parallel to make main UCR.

Note:-There are as many UCRs as many route of calling on signal.

8.3 Shunt UCR Logic

The following is to be proved in shunt signal UCR logic-

1. The concerned points in the route/isolation are in the required position (NWKR/RWKR ).
2. Conflicting routes are not set (ASR ).
3. Concerned LR is .
4. All individual route UCRs are parallel to make main UCR.

Note:-There are as many UCRs as many route of shunt signal.

 8-2

1 2 3
101/102 103/104 105/106 109/110 111/112 S28 C28 SH28 OV28 SH25 S38 C38 SH66 S36 C36 SH64 C17_01A C17_01A
NWKR NWKR NWKR RWKR NWKR ASR ASR ASR SR ASR ASR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2 3
101/102 103/104 105/106 107/108 109/110 S28 C28 SH28 OV28 SH25 S38 C38 SH66 S36 C36 SH64 C17_01C C17_01C
NWKR RWKR NWKR NWKR NWKR ASR ASR ASR SR ASR ASR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2
101/102 103/104 105/106 109/110 S26 C26 SH26 OV26 SH27 S36 C36 SH64 S29 C29 SH29 S25 C25 SH25
NWKR NWKR NWKR NWKR ASR ASR ASR SR ASR ASR ASR ASR ASR ASR ASR ASR ASR ASR
a
153/154
3 NWKR
C17_02 C17_02
LR UCR
a

1 2 2 3
101/102 103/104 105/106 109/110 S24 C24 SH24 OV24 S36 C36 SH64 C17_03A C17_03A
NWKR NWKR RWKR NWKR ASR ASR ASR SR ASR ASR ASR LR UCR

4 151/152 153/154
5 6
NWKR RWKR
SH17 S12 S16 C16 SH16 SH19 OV16 S17 C17_01A C17
ASR ASR ASR ASR ASR ASR SR UCR UCR UCR

C17_01C
UCR

C17_02
UCR

C17_03A
UCR

C17UCR LOGIC
 8-3

1 2 3
101/102 103/104 107/108 105/106 109/110 10 C11 C38 SH66 C36 SH64 SH17_SD1 SH17_SD1
NWKR RWKR RWKR NWKR NWKR ASR ASR ASR ASR ASR ASR LR UCR

151/152
RWKR

1 2
101/102 103/104 S24 C24 SH24 OV24 S26 C26 SH26 OV26 S28 C28 SH28 OV28
NWKR NWKR ASR ASR ASR SR ASR ASR ASR SR ASR ASR ASR SR
a

109/110
2 3 NWKR

S36 C36 C36 SH17_2T SH17_2T

ASR ASR ASR LR UCR
a

151/152
RWKR

153/154
RWKR

2 4
12 C13 S17 C17 S16 C16 SH16 SH17_SD1 SH17
ASR ASR ASR ASR ASR ASR ASR UCR UCR

S17_2T
UCR

SH17 UCR LOGIC

 CHAPTER-9
Approach Locking Logic (ASR)
Page 82 of 174
 9-1
9
BXT C13T 13T 04T S17
TPR TPR TPR TPR ATR

1 2

S17_01A S17_01B S17_01C S17_01D S17_02 S17_03A S17_01B 1T 2T 3T 4T 8T 11T 12T 13T 14T
LR LR LR LR LR LR LR TPR TPR TPR TPR TPR TPR TPR TPR TPR
a
105/106 105/106 103/104 103/104 105/106
RWR NWR NWR NWR RWR

103/104 109/110
RWR NWR

b
1
S_C_SH17 S_C_SH17 S_C17 S17 S17 S17 S17_01 S17_03 S17 S17 S17 S17 S17
TSR EUUYR UYR1_7 RECR HR DR UHR UHR HECR DECR UECR UCR ASR
3
a

S_C_SH17 S_C_SH17 S_C_SH17

EUUYR JSLR JR
4

S17
ATR
5

SYSINIT
6

S_C_SH17 S_C_SH17
ESUYR JR EMKEY_INR
7
b

S17
ASR 8

S17 ASR LOGIC

Page 83 of 174
Page 84 of 174
 9-2

1 2
C17_01A C17_01C C17_02 C17_03A 1T 2T 3T 4T 8T 11T 12T 13T 14T
LR LR LR LR TPR TPR TPR TPR TPR TPR TPR TPR TPR
a
105/106 105/106 103/104 103/104 105/106
RWR NWR NWR NWR RWR

103/104 109/110
RWR NWR

b
1
S_C_SH17 S_C_SH17 S_C17 C17 C17 C17 C17
TSR EUUYR UYR1_7 HR HECR UCR ASR
3
a

S_C_SH17 S_C_SH17 S_C_SH17

EUUYR JSLR JR
4

SYSINIT
5

S_C_SH17 S_C_SH17
ESUYR JR EMKEY_INR
6
b

C17
ASR 7

C17ASR LOGIC

Page 85 of 174
 9-3

1 2 3 4
#
SH17_2T SH17_SD1 1T 2T 11T 12T 16T 13T 14T 17T 3T S_C_SH17 S_C_SH17 SH17 SH17 SH17
LR LR TPR TPR TPR TPR TPR TPR TPR TPR TPR TSR EUUYR UYR1 UYR.JR RECR
a
3
107/108 111/112 SH17
NWR NWR UYR2_7

107/108 S_C_SH17 S_C_SH17 S_C_SH17

NWR EUUYR JSLR JR
5

103/104
NWR 04T
TPR 6

SYSINIT
7

S_C_SH17 S_C_SH17
ESUYR JR EMKEY_INR
8

SH17
ASR
9

1
SH17 SH17 SH17 SH17
HR HECR UCR ASR
a

# 3 TPR FRONT CONTACT NOT REQUIRED IN ASR IF BERTHING TRACK IS AVAILABLE. SH17ASR LOGIC

Page 86 of 174
9.4 OVSR (OVERLAP STICK RELAY) LOGIC:-

OVSR is provided to hold the route in overlap portion. Its normal position is up. It drops when ASR drops.

The following are to be proved in OVSR logic:

1. Concerned route LR / UCR are down. LR & UCR taken in parallel so that OVSR drops only when route is checked and set.
2. Time release path. Provided to release OVSR
a) When train is on berthing track and route in rear is released.
b) In case of emergency overlap cancellation.
3. Overlap release path in case signal route is cancelled and also in case of run-through train.
4. Overlap release path in case EI start-up/reboot. In this case overlap will be immediately released only when route is
released.
5. Hold-up path.
6. Timer Initiation path in case of train is standing on berthing track.
7. Timer Initiation path in case of emergency overlap cancellation is initiated.
8. OV25UYR hold up path.
9. Timer circuit for overlap release.
10. Overlap counter logic for emergency overlap release.
 9-4A
1
S17_01A S17_01B S17_01C S17_01D S15_01A S15_01B OV25 OV25 OV25
UCR UCR UCR UCR UCR UCR UYR JR SR
2

S17_01A S17_01B S17_01C S17_01D S15_01A S15_01B 01T 01AT S15 S17
LR LR LR LR LR LR TPR TPR ASR ASR
3

4 103/104 109/110
SYSINIT NWR NWR

105/106
RWR

OV25
SR 5

S17_01A S17_01B S17_01C S17_01D S15_01A S15_01B OV25 S15 S17 01T OV25
LR LR LR LR LR LR SR ASR ASR TPR UYR
6

103/104 109/110 01AT

NWR NWR TPR

105/106
RWR
01A
OYNR UNR
7
01B
UNR

01C
UNR

01D
UNR
OV25 OV25 SR LOGIC
UYR
8
 9-4B

OV25 OV25
UYR JSLR

9
OV25 OV25
JSLR JR

(120 SEC)

OV25 OV25 10
SR UYR OYNR OYNZ

OV26 OV26
SR UYR

OTHER
OV2s

OV25 SR LOGIC
9.5 TRACK STICK RELAY (TSR) LOGIC

TSR is named after the signal and used to ensure one signal one train only. TSR drops as soon as train passes the signal

Generally each signal will have one TSR. Common TSR can be provided for many signals which are conflicting to each
other.

In TSR logic the following are proved-.

1. First controlling track of the signal is clear.(TPR up)
2. The concerned signal all route LR down and ASR up.
3. Hold-up path
4. TSR slow to release (STR), 500ms to eliminate signal failure due to track bobbing.
 9-5
1 2
1T S17 C17 SH17 S17_01A S17_01B S17_01C S17_01D S17_02 S17_03A S17_03B
TPR ASR ASR ASR LR LR LR LR LR LR LR
a

C17_01A C17_01C C17_02 C17_03A SH17_SD1 S17_2T S_C_SH17

LR LR LR LR LR LR TSR
a

3 500ms
STR
S_C_SH17 4
TSR

TSR LOGIC
 CHAPTER-10:
Route Release by Train (UYR) LOGIC
10. Route release by Train (UYR) LOGIC:-

UYR Logic prepared to release the set route when train movement is completed. UYRs are picked up in sequential manner by
dropping of at least two track circuits and picking up the tracks in sequence.

10.1 Main Signal S17 UYR Logic

The following are to be proved in UYR logic:

1. Concerned route is set.

2. Sequential dropping & picking of track.
3. Hold-up path.
4. Next UYR will pick up after 1st UYR pick up and so on.
5. Point position of internal latch relay (NWR/RWR) is proved so that route can be released on passage of train even when
NWKR/RWKR is failed.

10.2 Shunt Signal SH17 UYR Logic

It proves that

1. Concerned route is set.

2. Sequential dropping & picking of track.
3. Hold-up path.
4. Next UYR will pick up after 1st UYR pick up and so on.
5. Point position of internal latch relay (NWR/RWR) is proved so that route can be released on passage of train even when
NWKR/RWKR is failed.
6. Time release logic 120sec. in case of single track in the route.
 10-1A

1 2
S17 04 1T 2T S_C17
ASR TPR TPR TPR UYR1

C17
ASR 3
S_C17
UYR1

4 3
S_C17 1T 2T 103/104 3T S_C17
UYR1 TPR TPR NWR TPR UYR2

103/104 11T
RWR TPR
S_C17
UYR2

S_C17 2T 103/104 3T 105/106 4T S_C17

UYR2 TPR NWR TPR NWR TPR UYR3

105/106 8T
RWR TPR

103/104 11T 12T

RWR TPR TPR

S_C17
UYR3

S_C17 UYR LOGIC

Page 94 of 174
 10-1B

S_C17 103/104 3T 105/106 4T 109/110 02T/02AT S_C17

UYR3 NWR TPR NWR TPR NWR TPR UYR4

109/110 13T
RWR TPR
105/106 8T 03T/03AT
RWR TPR TPR

103/104 11T 12T 13T

RWR TPR TPR TPR

S_C17
UYR4

S_C17 103/104 105/106 4T 109/110 02T/02AT S_C17

UYR4 NWR NWR TPR NWR TPR UYR5

109/110 13T 14T

RWR TPR TPR
105/106 8T 03T/03AT
RWR TPR TPR

103/104 12T 13T 14T

RWR TPR TPR TPR

S_C17
UYR5

S_C17 UYR LOGIC

Page 95 of 174
 10-1C

S_C17 103/104 105/106 109/110 S_C17

UYR5 NWR NWR NWR UYR6

109/110 13T 14T 01T/01AT

RWR TPR TPR TPR
105/106
RWR

103/104 13T 14T 01T/01AT

RWR TPR TPR TPR

S_C17
UYR6

S_C17 103/104 105/106 109/110 S_C17

UYR6 NWR NWR NWR UYR7

109/110 14T 01T/01AT

RWR TPR TPR
105/106
RWR

103/104 14T 01T/01AT

RWR TPR TPR

S_C17
UYR7

S_C17 UYR LOGIC

Page 95a of 174

 10-1D

S13 C13 S13 04T S_C13

ASR TPR TPR TPR UYR1

C13
ASR S_C17
UYR1

S_C17 S13 04T 1T S_C13

UYR1 TPR TPR TPR UYR2

S_C17
UYR2

S_C13 UYR LOGIC

Page 95b of 174

 10-2
1 2
SH17 04 1T 2T SH17
ASR TPR TPR TPR UYR1

3
SH17
UYR1

4 3
SH17 1T 2T 103/104 3T SH17
UYR1 TPR TPR NWR TPR UYR2

103/104 11T
RWR TPR
SH17
UYR2

SH17 2T 103/104 3T SH17

UYR2 TPR NWR TPR UYR3

103/104 11T 12T

RWR TPR TPR

SH17
UYR3

SH17 103/104 SH17

UYR3 NWR UYR4

103/104 11T 12T 107/108 13T

RWR TPR TPR NWR TPR

107/108 16T SH17 UYR LOGIC

RWR TPR

SH17
UYR4

Page 96 of 174
 10-2A

SH17 103/104 SH17

UYR4 NWR UYR5

103/104 12T 107/108 13T 14T

RWR TPR NWR TPR TPR

107/108 16T
RWR TPR
SH17
UYR5

SH17 103/104 SH17

UYR5 NWR UYR6

103/104 107/108 13T 14T 111/112 01T/01AT

RWR NWR TPR TPR NWR TPR

111/112 17T
107/108 16T RWR TPR
RWR TPR
SH17
UYR6

SH17 103/104 SH17

UYR6 NWR UYR7

103/104 107/108 14T 111/112 01T/01AT

RWR NWR TPR NWR TPR

111/112 17T
107/108 RWR TPR
RWR
SH17
UYR7

SH17 UYR LOGIC

Page 96a of 174

 10-2B

SH17 1T 2T 103/104 SH17

UYR1 TPR TPR NWR 6 UYR.JSLR

SH17 SH17
UYR.JSLR UYR.JR

(120 SEC)

SH17 UYR LOGIC

Page 96b of 174

 CHAPTER-11:
Route Release by cancellation
11-1 EMERGENCY ROUTE RELEASE LOGIC (EUUYR):-

Emergency Route release is provided to release the route of a given signal when train has not passed the signal.
The following are to be proved in S_C_SH17 EUUYR logic:

1. The signal has been put back to ON. Signal controlling relays HR down and route initiation relay LR are down.
2. Back lock TPRs are UP
3. Train has not passed the signal (TSR up) except Calling ON route release.
4. Emergency route release command is initiated for calling on C17 ensuring that shunt route is not set.
5. Emergency Route release command is initiated for main signal S17 ensuring that shunt route is not set.
6. Emergency route release command is initiated for shunt signal SH17 ensuring that Main and Calling on route is not set.
7. Emergency sub route cancellation is not initiated.
8. SYSON
9. Timer logic starts for 120 second delay.

11-2 EMERGENCY SUB-ROUTE CANCELLATION LOGIC (ESUYR):-

Emergency Sub-Route cancellation is provided to release the route of a given signal when route release by EUUYN is not possible
for any reason.
The following are to be proved in S_C_SH17 ESUYR logic:

1. The signal has been put back to ON. Signal controlling relays HR down and route initiation relay LR are down.
2. Emergency route release command is initiated for calling on C17 ensuring that shunt route is not set.
3. Emergency Route release command is initiated for main signal S17 ensuring that shunt route is not set.
4. Emergency route release command is initiated for shunt signal SH17 ensuring that Main and Calling on route is not set.
5. Emergency route release cancellation is not initiated.
6. SYSON
7. Timer logic starts for 120 second delay.
 11-1
1
S17 C17 SH17 S17_01A S17_01B S17_01C S17_01D S17_02 S17_03A S17_01B C17_01A C17_01C C17_02
HR HR HR LR LR LR LR LR LR LR LR LR LR
a
1 2
C17_03A C17_SD1 C17_2T 1T SH17 2T 103/104 3T 8T 105/106
LR LR LR TPR ASR TPR NWR TPR TPR RWR
a b
4T 105/106 109/110
TPR NWR NWR

109/110 13T 14T

RWR TPR TPR
103/104 11T 12T
RWR TPR TPR

SH17 103/104 2T 11T 12T 16T

ASR RWR TPR TPR TPR TPR

103/104
NWR

4 7 8
C17 SH17 C17 S_C_SH17
ASR ASR GNR EUUYNR ESUYR SYSON
EUUYR
b
S_C_SH17
EUUYR
3
S_C_SH17 S17 SH17 S17 5
TSR ASR ASR GNR EUUYNR

S_C_SH17
EUUYR

SH17 S17 C17 SH17 6

ASR ASR ASR GNR EUUYNR

S_C_SH17
EUUYR

S_C_SH17 EUUYR LOGIC

 11-2

S17 SH17 C17 S17_01A S17_01B S17_01C S17_01D S17_02 S17_03A S17_03B C17_01A C17_01C C17_02 C17_03A C17_SD1
HR HR HR LR LR LR LR LR LR LR LR LR LR LR LR
a

SH17_SD1 SH17_SD2 SH17_01A SH17_2T C17 C17 2 5 6 S_C_SH17

LR LR LR LR ASR GNR ESUYR EUUYR SYSON ESUYR
a

S_C_SH17
ESUYR

S17 S17 3
ASR GNR ESUYR

S_C_SH17
ESUYR

7 SH17 4
SH17
ASR
S_C_SH17 GNR ESUYR
S_C_SH17
EUUYR
JSLR
S_C_SH17
ESUYR
S_C_SH17
ESUYR

S_C_SH17 S_C_SH17
JSLR JR

(120 SEC)

S_C_SH17 ESUYR LOGIC

Page 101 of 174
 11-3
1
S_C_SH17 S_C_SH17
EUUYR JR EUUYZ

S17
ATR

S_C_SH16 S_C_SH16
EUUYR JR

S16
ATR

LIKE WISE
OTHER SIGNAL

1
S_C_SH17 S_C_SH17
ESUYR JR ESUYZ

S_C_SH16 S_C_SH16
ESUYR JR

LIKE WISE
OTHER SIGNAL
EUUYN & ESUYN
COUNTER LOGIC

Page 102 of 174

 CHAPTER- 12
SIGNAL CLEARANCE LOGIC (HR)
12- SIGNAL CLEARANCE LOGIC (HR)

MAIN SIGNAL CLEARANCE

conditions
for mains signal clearance depending upon the type of main signal. (viz. Home, Starter etc.)

12-1 Home Signal Control-

1. Route cancellation is not initiated, i.e. (EUUYR/ESUYR/JSL OVJSL

must be proved.
2. It should be proved that the sequential proving Relays ( ) are dropped after the previous train movement.
3. Route is initiated i.e
4. Concerned points in the route, overlap and isolation are correctly set, locked and detected concerned
and concerned to be proved.
5. It should be proved that concerned crank handle(s) is/are locked in the EKT meant for it front contact.
6. Route is checked i.e
7. All Track Circuits in the route & overlap (including Fouling Tracks, if any), berthing tracks are clear i.e. concerned
8. One signal one train feature by proving i.e. Track Stick Relay is energized
9. It should be proved that the (i) Route is locked i.e. back contact is proved. (ii) Overlap is locked- back
contact is proved.
10. Next Stop Signal is not blanked i.e. ECPR
11. All diversion relays are de-energized i.e. and All diversion route lamp checking relay is de-energized i.e.
12. Level Crossing gate closed, locked & detected i.e. LX-NP
13. Conflicting Signals of same post are not cleared i.e.
 X

STR 2 SEC

STR 2 SEC

Page 105 of 174

12-2 Home signal Control- Loop Line YELLOW aspect with Route Indicator (UHR)
.

Route indicators are provide on Home Signal in general to inform the driver if the route is set for a moment in the diverted
point position. This will allow the driver of the train to control the speed applicable to pass on the points.. A route indicator is

1. Route cancellation is not initiated, i.e. (EUUYR/ESUYR/JSL OVJSL

must be proved.
2. It should be proved that the sequential proving Relays ( ) are dropped after the previous train movement.
3. Route is initiated i.e
4. Concerned points in the route, overlap and isolation are correctly set, locked and detected concerned
and concerned to be proved.
5. It should be proved that concerned crank handle(s) is/are locked in the EKT meant for it front contact.
6. Route is checked i.e
7. All Track Circuits in the route & Overlap (including Fouling Tracks, if any), berthing tracks are clear i.e. concerned

8. One signal one train feature by proving i.e. Track Stick Relay is energized
9. It should be proved that the
(i) Route is locked i.e. back contact is proved.
(ii) Overlap is locked- back contact is proved.
10. Next Stop Signal is not blanked i.e. ECP
11. In case of more than one diversion, it is proved that Non-required diversion control relay is de-energized. i.e. other

12. Level Crossing gate closed, locked & detected i.e. LX-NP
13. Conflicting Signals of same post are not cleared i.e.
 .
12-3 Home Signal Control-

Home Signal is controlled to OFF aspect to Green, if the following conditions are satisfied:-

1) Yellow Aspect control relay is energized i.e. 17

2) All diversion relays are de-energized i.e. 17
3) All diversion route lamp checking relay is de-energized i.e. 17
4) Ahead Signal Green Aspect control relay is energized i.e. 27
5) Ahead Signal Green Lamp checking relay is energized i.e. 27
6) Route Initiation Relay for main line i.e. 17-02A LR
7) All facing points are proved normal (in case of home signal only).
12-4 Calling on Signal Control

Calling On signal is controlled to OFF (YELLOW) aspect if the following conditions are satisfied:-

1. Route cancellation is not initiated, i.e. (EUUYR/ESUYR/JSLR ).

2. Control and clearing the calling on signal is logged through a counter.(See on 12-11)

3. Route is initiated i.e

4. All points in the route and isolation are correctly set, locked and detected i.e. concerned and concerned
to be proved.

5. It should be proved that concerned crank handle(s) is/are locked in the EKT meant for it front contact.

6. Route is checked i.e

7. Approach Track is occupied i.e. CO- for calling on signal below Home signal or berthing TPR for below starter signal
respectively.

8. (a) Necessary time delay of 60 Secs has been completed (JSLR ,JR ) in HR1 and the same has been de-energized in HR.

(b) In case Calling On has been provided below the starter signal, no time delay is required.

9. Route is locked i.e. back contact is proved.

10. Level Crossing gate closed, locked & detected i.e. LX-NP

11. Conflicting Signals of same post are not cleared i.e.

 A

Page 113 of 174

 A

A
12-7 LAMP CHECKING RELAY (MAIN ECR)

i. ECR has been provided in NX110 in the Signal lighting circuit in Relay Room itself.
ii. ECR pickup means Signal is lit at site i.e. conformity of Signal lighting in association with picking of the relevant controlling
relay.
iii. Universal ECRs are used.
iv. In case of Non picking of relevant ECR, the aspect will be downgraded to lower aspect and respective Signal aspect indication
will exhibit flashing, whereas displayed aspect will have steady indication.
v. Separate fuse of 0.63 amp. will be used for each aspect.
 LOCATION RELAY ROOM

SIG.17
Page 118 of 174
 LOCATION RELAY ROOM

SIG.C17

SIG.SH17

RELAY ROOM
LOC:
SH:19
 12-9 ROUTE LAMP CHECKING RELAY (UECR)

i. UECR has been provided in NX110 in the Route Indicator of Signal Lighting Circuit in Relay Room itself.
ii. UECR pickup means minimum 3 Lamp of Route Indicator is lit at site i.e. conformity of Route Indicator Signal lighting in
association with picking of the relevant controlling relay (UECR).
 12-10 TIMER INITIATION RELAY (CALLING ON LOWERING)

1. In Signalling Circuit, time delay circuits are incorporated through JR for Releasing/Cancellation of route,
lowering of Calling on Signal, Opening of L-xing Gates etc.
2. For lowering of Calling on Signal, and Calling on berthing is proved.

12-11 Calling on Signal Release Counter -

To facilitate lowering of Calling on Signal for any movement, a required command is given, which is duly registered in a
counter called Calling on Signal release Counter called COZ.

The same is achieved through following:-

i. Calling on releasing 60 Second timer has been elapsed JSLR & JR .

ii. Calling on Signal control Relay
iii. After this action, the Counter will be registered to next higher number.
12-11
SLOW TO PICK UP 3 SEC

SLOW TO RELEASE 3 SEC

Page 126 of 174

 ADVANCED STARTER CIRCUITS
6-1a

NO EMERGENCY TO ENSURE
ROUTE INITIATION LR TO DROP
CANCELLATION COMMAND
COMMAND GIVEN AFTER CONFLICTING LRs DOWN & CONFLICTING ASRs PICKED UP
IS INITIATED
TRAIN
MOVEMENT
12 UP2 S12 S12 S12 S12 S13-04 S13 C13-04 C13
GNR UNR ASR ESUYR EUUYR UYR1 LR ASR LR ASR
A

S12-UP2
LR
CONFLICTING LRs DOWN & CONFLICTING ASRs PICKED UP

S17-02 S17-01A S17-01B S17-03A S17-03B S17 SH17-SD1 SH17-SD2 SH17-01A

LR LR LR LR LR ASR LR LR LR
A B

SIGNAL CANELLATION TO RAISE UP THE SIGNAL

SHOULD BE POSSIBLE IN CASE OF VDU FAILURE
CONFLICTING LRs DOWN & CONFLICTING ASRs PICKED UP

SH17-2 SH17 SH16-04 SH16 S12 VDU

LR ASR LR ASR GNR FAIL S12-UP2
B
LR

EGRNR

S12 -UP2 S17 SH17 SH16 S13 C13

LR ASR ASR ASR ASR ASR S12 - UP2
UCR

S12 LR & UCR LOGIC

Page 126a of 174

 ADVANCED STARTER CIRCUITS 6-1b
SIGNAL PUT BACK
TO ON ALL
CONTROLLING ALL BACK LOCK
RELAYS DOWN TPRs UP
S12-UP2 S13T S12 S12 S12 S12
LR TPR TSR EUUYR UYR2 RECR
A
EMERGENCY ROUTE
RELEASE PATH

S12 S12 S12

EUUYR JSLR JR

APPROACH TRACK
CLEAR PATH
EI START UP/
REBOOT PATH
S12
ATR
* * WHERE REQUIRED
SYS
INIT

EMERGENCY SUB ROUTE

CANCELLATION PATH

S12 S12
ESUYR JR EMKEY-INR
S12
ASR

SIGNAL PUT BACK TO ON

ALL CONTROLLING RELAYS DOWN
(OFF ECR DOWN, ON ECR UP)

S12 S12 S12-UP2

DR DECR UCR S12
A
ASR

S12 ASR LOGIC

Page 126b of 174

 6-1c
ADVANCED STARTER CIRCUITS
SEQUENTIAL DROPPING
CONCERNED ROUTE OF TRACK CIRCUIT
IS SET
S12 04T S13T
ASR TPR TPR S12
UYR1
S12
UYR1

SEQUENTIAL DROPPING &

NEXT UYR PICK UP PICKING UP OF TRACK CIRCUIT
AFTER 1ST UYR PICK UP
S12 S13T C13T 04T
UYR1 TPR TPR TPR S12
UYR2
S12
UYR2

FIRST CONTROLLING CONCERNED SIGNAL

TRACK CLEAR LR DOWN & ASR UP

S13T S12-UP2 S12

TPR LR ASR S12
TSR
S12
TSR

S12 S12 S12 S12 S12 S12 BPAC

SYSON ESUYR EUUYR JSLR UYR1 UYR2 TSR AXTPR
A

LINE CLEAR
PROVING CONTACTS S12-UP2 S13T S12-UP2 12
LR TPR UCR ASR 12
A
DR

NOTE:-
1) IF BPAC TRACK IS AVAILABLE, THEN CO3 TPR BACK CONTACT
CAN BE REPLACED BY BPAC TRACK BACK CONTACT.
2) WHEN THERE IS A LC GATE AHEAD OF ADVANCE STARTER,THEN TRACK CIRCUIT
SHALL BE EXTENDED UPTO LC GATE TO PROVE BACK LOCKING. S12 UYR ,TSR & DR LOGIC

Page 126c of 174

 CHAPTER- 13 :

CRANK HANDLE KEY CONTROL

AND
EMERGENCY KEY EXTRACTION
13 CRANK HANDLE CONTROL LOGIC:
Crank Handle (CH) is provided to enable operation of the point in Normal or Reverse, manually. The crank handle operation can be
used for testing and during several types of failures like electrical failure of point, route/sub-route fail or during any other failure in
EI.
The interlocking of CH is by means of interlocking of CH key. The CH is not interlocked but kept under custody of SM under
physical lock and key.
The CH in IRS type point can be inserted only when its flap is opened with a CH key. As soon as the CH key is inserted and turned
to open the flap, CH contact is broken inside Point machine, which breaks the point operation circuit and point motor cannot be
operated. The second CH contact can be used in detection circuit of point for high speed direction for the machine.
CH key can be extracted under following conditions
a) Normal CH key extraction
Buttons are pressed by SM for extraction of CH key of a particular point under Normal conditions i.e. point is not locked in
route/ subroute.
b) Emergency CH Key extraction
When route/subroute is held and point is required to be operated
c) Extreme Emergency CH key extraction - When EI/VDU PC/ VDU fails
CH key can also be extracted when
1. EI fails Under this conditions all signals assumes ON aspect and through external circuits, crank handle key of all
points are free to be extracted after a time delay of 120 secs.
2. VDU PC fails/ Communication between EI & VDU PC fails Under this condition, EI detects the failure of communication
between EI and VDU and VDU_Fail bit in EI logic pickup. This will drop all LR and restores all signals to ON. Crank
handle key of all points are free to be extracted after a time delay of 120 secs.
3. Operating display unit fails Under this condition, Display may be blank. Display may also go blank in above mentioned
two failure condition of failure of EI or operating PC. The SM shall then operate Extreme Emergency Control (EEC) key
along with pressing of a self restoring button. This will put all signals to ON and crank handle key of all points are free to
be extracted after a time delay of 120 secs

The circuit for Crank Handle control logic for the given yard is as follow:
13-1 NORMAL CH KEY EXTRACTION CONTROL (CH01YR)
In this circuit following conditions are ensured:
1) SM key is in
2)
3) Concerned CH button (NR) and GSBN Button (CH Transmit) pressed
4) All other Emergency Crank ha
5)
6) The Crank handle control can be taken back by pressing of concern CH button and GRN (CH receive) button, but effective

7) The circuit for CH01YR for normal extraction for the given yard is as follow:

13-2 EMERGENCY CH KEY EXTRACTION CONTROL (CH01EYR)

In this circuit following conditions are ensured:
1) SM key is in
2) ed signals are at ON.
3)
4)
5) Concerned CH button(NR) and GBN Button (CH Transmit) pressed
6) Extreme Emergency Crank handle
7) CH1EYR pickup and sticks (Required for 120 secs as timer is in progress and CH1YR not picked up)
8)
9)
contact
10) The circuit for CH01YR for Emergency extraction for the given yard is given in sheet 13-2.
Page 130 of 174
PAGE 131 OF 174
PAGE 132 OF 174
Page 133 of 174
 a

a
 CHAPTER-14
Level Crossing Gate Control
14-1 Level Crossing Gate Control

For clearance of any signal, the en-routed level crossing gate, if any, shall be closed, locked against the road traffic and
detection of the same shall be proved in the respective HR/UHR circuit of main signal, shunt signal, calling-on signal, as the
case may be :

1) LC Gate is not locked in any concern Signals route and overlap. It is achieved by picking LX-1XLR which means LC
Gate is free for opening.
2) Gate can be opened after release of the route. Gate can also be opened immediately after picking of the
concernedUYR, when the train has passed the Gate.
3) Indication- RED STEADY: when gate is open, WHITE STEADY: when the gate is closed and locked, WHITE
FLASHING: when the gate is closed but slot is not taken back by the ASM.
4) Level Crossing Button with slot release buttons are pressed by ASM i.e. GSBNR & LX-1NR for energisation of
LX1YR for opening of LC Gate.
5) After getting the slot for closing of Gate (XCKPR ), NPR picks up when the slot is received by ASM by pressing group
button (GSBRNR ) and the concerned LC button (LX1NR ).
6) LX-1YR repeater Relay pick up in L-xing Gumty i.e. LX1YPR .
7) Signal ON to be proved in Train Clearing sequence along with UYR path (IRSEM para 21.1.11(b)).
8) After Rebooting of the system, ASM shall withdraw the LC gate Slot.
14-2 In continuation of previous LC Gate Sheet

1) Indication for opening L-xing slot appear as LX1YKE in Gumty through LX1 and flashing indication also appear on
panel, till the time XCKP
2) XCKPR means L-xing is closed and locked and it is being proved in the Relay Room, which is repeater of XCKR (L-xing
closed and locked).
3) Now, Gate is opened by the Gateman by seeing Gate opening indication LXYKE.
4) Gate opened & Road Traffic passed and afterwards Gateman closes the Gate, in the Gumty and XCKPR in the
Relay Room as repeater of XCKR.
5) As soon as XCKP pick up in the Relay Room, flashing indication again appears on Panel.
6) On appearing flashing indication, Station Master locks the slot by pressing LX1-NR and GSBRN. Now, Gate is closed
and electrically locked, now a steady white slot lock indication appears on Panel i.e. LX1NP
CHAPTER-15 :Block Logic
11) Advance starter circuit:
a)
due to premature TOL, a bypass path to LCR is also provided.
b) To ensure one signal one train feature, SR has been picked up and sticks.
c)
d) The departure buzzer and its indication on VDU with Acknowledgement feature has been provided.
 A

A
 Sheet No. 15-1(1/4), 15-1(2/4) , 15-1(3/4), 15-1(4/4)

15-1-B DOUBLE LINE MODIFIED SGE BLOCK(PTJ MAKE) CIRCUIT

In Double Line modified SGE Block Instrument of Podanaur make, all the features of conventional SGE double line Block
Instrument are to be adopted. Additionally one extra input bit (LCD-TOLCR : Line closed to TOL contact proving relay) to EI is
required.
 A

B
UP

DN
UP

DN
CHAPTER- 16 : INDICATIONS
 (Sheet No. 16-1)

16 INDICATIONS

Indications of various Signalling functions are being provided over the Panel/VDU or through a separate means to facilitate the
operator or maintainer to know the Status/Position of that very function. In fact, it is the true replica of the Signalling Gazette Status.
All type of actions/command and its derivatives/output is exhibited in different colours and in different forms (Steady/flashing or any
other desired feature).

1) RED LAMP INDICATION (RGKE)

(i) The concern stop signal is at ON i.e. concerned , which gives steady Red Indication i.e. RGKE.

(ii) In case of , along with signal control relay it gives Red flashing indication.

2) YELLOW LAMP INDICATION (HGKE)

which gives steady Yellow Indication i.e. HGKE.

(ii) In case of , along with signal control relay , it gives Yellow flashing indication.

3) GREEN LAMP INDICATIO (DGKE)

d which gives steady Green Indication i.e. DGKE.

(ii) In case of along with signal control relay , it gives Green flashing indication.

4) CALLING ON LAMP INDICATION (CO-HGKE)

CO- which gives steady Yellow Indication i.e. CO-HGKE.

(ii) In case of CO- along with signal control relay CO- it gives Yellow flashing indication.
 a b

a b
PAGE 162 OF 174
 (Sheet No. 16-4)

13) POINT LOCK INDICATION (WLKE)

Point locking condition is indicated with the concerned and it will give a steady point lock indication.

14)ROUTE WHITE /RED TRACK INDICATION (TKE/TKRE)

Route lock indication is indicated with White Colour. It proves the following :-

(i) Concerned
(ii) Concerned will give steady White indication.
(iii) When only concerned , it will give Red steady indication.
 16-4A

Page 165a of 174

 16-4B

Page 165b of 174

S.No. Para of MoM dated 30.10.2018 vide Para wise Committee decision over MoM.
No. 2018/Sig/36-SD/1, dtd 14.11.2018 for which action was
required to be taken by the committee.
1 1. These circuits should normally be applicable to Electronic Noted and covered in the report.
Interlocking upto 100 routes.
2 2 .Only self-restoring type push buttons to be used for CCIP. The standardisation has been recommended considering dual VDU
And for VDU, dropdown menu should be preferably used. operation only. All operation through VDU is proposed through drop
& down menu only.
3. All future EI interlocking works upto 100 routes shall be
done with dual VDU as far as possible.
Discussion on Route Initiation (LR) Circuit
3 4. As many route buttons shall be provided as the numbers of Noted and covered in the report. For VDU, the dropdown Menu is
overlaps are available. convenient which do not have restriction on number of route options as
the option for routes at particular signal appears only after clicking over
it. More detailed description can be easily provided on VDU. This shall
also avoid confusion that may occur due to multiple route buttons. An
example of such is as below:

4 5. In case of Route button for every path should be provided including alternate
possibility of two or more combination of points setting paths. The default setting will not be provided as it will make the circuit
leading to same destination, one default route setting will be complex. In VDU operation there is provision of drop down menu where
defined. The other routes will be set as per position set by no. of routes (Path) can be considered in dropdown list.
individual setting of the alternate points.
5 6. In proposed route initiation (LR) circuit of RDSO report Noted. UYR has been preferred over TSR front contact.
(SS/137/2013), the drop contact of UYR1 may be preferred
over TSR front contact as it will facilitate setting of route if
first track circuit is failed.
6 7. Two Opposite starters or Starter at one end and Shunt No Action required for typical circuits.
Signal on other end (moving away from each other) shall be
permitted to be taken OFF simultaneously. It shall not lock
each other. This is as per Directive Principles (Para 7.8 of
release 1.0)
7 8. Shunt Signal will lock Main Signal ahead. If the situation No Action required for typical circuits.
demands to dispatch a train from siding, Starter Signal should
be provided at the siding.
8 9. Detail discussions were done for requirement to prove all Conflicting LR requiring different point setting will not come in LR
conflicting routes in LR circuit. In proposed circuit, only circuit. To overcome the possibility of conflicting LR picking up
conflicting routes which require same setting of point are simultaneously, the LR circuit is now modified. The point relays have
considered. However, if conflicting routes (requiring different been taken out of stick path and NWKR (or RWKR) has been replaced by
setting of points) are initiated almost simultaneously before NWR (or RWR) to avoid dropping of LR due break in detection
dropping of WLR, then there is possibility that conflicting (NWKR/RWKR). (Please refer Chapter 6)
routes LR can be picked up. The solution for avoiding such
situation needs to be catered by either taking all conflicting
routes or doing changes in existing proposed LR circuit.
9 10. Separate OVLR relay shall be used to simplify the circuits. It is observed that in EI there is no major restriction on the number of
logic bits, thus it is advisable to use one LR for a signal completely
covering overlap, rather than having one LR for signal and many OVLR
for overlaps. Thus the use of separate OVLR is not proposed. This also
simplifies the interlocking/initiation logic. Accordingly, separate OVLR is
not considered.

Discussion on Route Checking (UCR) Circuit

10 11. Some Railways recommended that duplicity in UCR circuit As a second level check, locking in UCR required. There is no much
like conflicting route checking which is already covered in effect in EI for keeping contacts in UCR again. (Please refer 8.1)
LR circuit may be removed in EI. This need to be studied.
 Discussion on TSR circuit
11 12. Slow to release feature of 500msec for TSR is agreed. Noted.
Delayed replacement of starter has been taken care and is placed in
replacement of starter signal also need to be taken into concerned HR circuit. (Please refer section 12-12)
account in the standard circuits.
12 13. Minimum Track Circuit length is defined at 65 mtrs. for Does not pertain to this committee.
straight portion in Directive principles (para 3.6). Some
Railways pointed out that minimum two rail length track
circuit is also permitted as per SEM para 17.2.this needs to be
studied.
Discussion on Route locking (ASR) circuit
13 14. LC Gate - As per SEM provisions, LC Gate control should Noted. The circuits have been accordingly prepared. The LC gate proving
be last gear to be locked and first gear to be released to is done in HR logic.
cause minimum disruption to the road users. This may be
done by proving of LC gate in HR control circuit instead of
ASR Control Circuit.
14 15. In the proposed circuit, proving of readback contact of HR Noted. Reading back of all output relays for FCOR is not proposed.
in addition to internal HR is not required in ASR circuit.
Discussion on Emergency route release
15 16. Emergency route release facility (EUUYN) for situation Noted.
when train has not passed the signal as per SEM para 21.5.6
may be retained as per proposed circuit.
16 17. It was suggested that BPAC may be taken as approach Noted. BPAC has been taken in ATR of Home signal. However,
locking track circuit for Home Signal where specific approach bypassing of BPAC may affect the working of approach locking of
lock track is not provided for emergency route release circuit. Home signal, thus individual Railway has to take a decision on this
issue, as bypassing of BPAC is not covered in any standard directives.
17 18. In case of requirement to release the route when any/all Noted. This feature is part of VDU software and can be developed
backlock tracks are occupied, the provision for ASM emergency based on practice of local railway.
route release (ESUYN) may be provided with time delay of
minimum 120 seconds with physical verification of the line by
traffic representative as per SEM para 7.114, ACS 16. The
requirement of physical verification should be positively
proved. After detailed deliberation, it was decided that on VDU
screen a pop-

should allow Station Master for emergency cancellation of

route. For Panel separate Key and a button shall be provided
which shall require breaking of seal.
18 19. Noted. The logic has been modified now.

such provision is given in SEM. The route release feature with

time delay is already catered for ASM.

Discussion on Sub-route release circuit

19 20. Sectional Route Release shall generally not be provided in Agreed. The logic has been designed accordingly.
yards upto 100 routes.

Discussion on Overlap locking stick relay (OVSR) circuit

20 21. There was difference in opinion in drawing the inference Noted. The concept is incorporated in typical circuit.
for SEM para 21.5.8. It was clarified that the overlap release
timer shall only initiate after both the conditions are met i.e.
berthing track is occupied and last point zone track is cleared.

21 22. Facility for emergency overlap release shall be provided. Noted. Logic has been designed with 120 sec, same can be modified to
However, the overlap shall not be released immediately as 60 Second with approval of PCSTE, as per requirement, as stipulated in
proposed in circuit. It should be released only after 120 sec SEM.
(or 60 sec with approval of PCSTE) in line with provision of
SEM para 21.5.8 ACS-7 for normal overlap release.
 Discussion on Signal Control relay (HR) circuit
22 23. Cascading arrangement for Signal Aspect control Circuit Noted. This has been incorporated in circuits.
shall be provided outside EI as done conventionally. Providing
cascading inside EI may cause signal to be blank for longer
time during switching to restrictive aspect during lamp
failure.

23 24. 4 second delay in HR circuit was proposed by some of the Delay in HR Circuit is not recommended on safety consideration.
Railways to arrest Signal fly back to danger cases due to
bobbing of track. This feature is implemented in WR recently.
It should be studied in detail before taking a final decision.

24 25. Crank handle should be proved in HR circuit not in LR Noted and circuits have been modified. Similarly HR Drop has been
(Route Initiation Circuit) as done in proposed circuits. proved in CH release circuit.

25 26. Provision shall be made to enable withdrawal of crank Implemented.

Discussion on Calling On Signal circuit

26 27. Directive principles para 7.16: Red lamp protection is not Not in scope of this committee.
required for subsidiary signals. This needs to be discussed in
SSC.

27 28. All isolation points in the route of calling-on-signal on Noted. The points to be taken in interlocking of calling on signal shall
need to be taken as per para 7.11 of Directive principles. be decided by Zonal Railways and shall be reflected in selection
table/Route control Chart. The proposed logic covers all the points in
the ST/RCC.

28 29. For cancellation of calling on time delay of 120 sec to be Noted. 120 sec time delay shall be used.
provided. Few Railways informed that calling on
cancellation time is 240 seconds. It should be checked.
 Discussion on Point Control and detection circuits
29 30. In the discussions of Point Control Circuit, emphasis has Noted
been made to provide a uniform circuit for use over IR.

a. The use of external Latch Relay should be studied before a. External latch relay is proposed
finalization. Provision of Stick Relay within EI may also be
studied.

b. Point Operation should generally be centralized. It should b. Point operating relays shall be placed at either centralised place or at
be inside goomti in case of distributed EI Keeping WCR distributed location.
Relay at site near point should be avoided.

c. Circuit should be designed to enable parallel operation of c. Noted and implemented

both ends of Point simultaneously.

d. Common detection of point has already been decided in d. Noted and implemented
previous SSC. It should not be changed.

30 31. Point Operation with Track Circuit failed condition in the Noted.
sub section route is allowed as per SEM Para 21.8.2. SR, SCR
and SW Railway are not using this feature. It should be
provided.

31 32. In the point feed circuit, only heavy duty contact should Operation of point by single relay and by two relays is explained in
be used with minimum 2 relays. This need to be chapter-7.
incorporated in the standard circuits.

32 33. CR raised an issue regarding provision of Crank handle in Noted and explained in chapter-13.
point detection circuit. It was clarified that Crank handle
contact shall not be provided in point detection circuit. This
will facilitate setting the route from Panel once point is set
by CH operation at site. Signal will take off only after CH is
restored and locked.
 General discussion
33 34. Presently FCOR Relay has been designed in EI to reset the FCOR logic is not recommended by the committee.
EI in case of any mismatch between field and internal EI
data. Resetting of EI leads to heavy repercussions in train FCOR logic may be provided to guard against inadvertent operation of
operations. It is therefore, recommended that the provision the field gears. However, in case of Metal to Carbon interface relays,
should be made in such a way that FCOR Relay energisation reading back each output relay additionally for the purpose of FCOR
shall lead to putting back of all signals of that direction to unnecessary increases the number of additional inputs. These additional
Danger aspect sensing any mismatch between field and EI inputs are as high as the number of total vital outputs of EI which makes
control and shall not reset EI. This must give an alarm to the EI installation bigger requiring more space in relay room, more
ASM. relays, wiring and cost.
One of the EI OEM suggested that additional readback of output relays
may not be required for FCOR because EI is already getting status of
field gears through input relays like ECRs. Accordingly, the FCOR logic
can be built by the existing interface relays without requiring additional
readback of output relays. This will serve the purpose of guarding
against inadvertent operation of the field gears and at the same time
will reduce the extra EI hardware, installation size, wiring, etc.

However, readback of output relays may be provided based on the

-4 system. Hence this
committee has not covered FCOR in its recommendation. However,In
case FCOR logic is provided, the FCOR Relay energisation shall lead to
putting back of all the signals to Danger aspect sensing any mismatch
between field and EI control and shall not reset EI. This must give an
alarm to ASM.

As the requirement of readback is stipulated in Specification for EI,

RDSO need to examine the issue detail and review instructions.
34 35. Use of non-resettable counters need to be standardized Some of the EI models used on Indian Railways do not have the fool-
for EI. proof provision for non-resettable counters in VDU. Under certain
situation, the counter in two VDUs can differ and can also be
manipulated on VDU. Hence, we may keep compact size counter box
having Electromechanical counters like an example below.
 ANNEXURE-

DISCUSSION ON ZONAL RAILWAYS OBSERVATIONS & DECISIONS BY THE STANDING COMMITTEE ON EI

STANDARDIZATION OF CIRCUITS [REFERENCE REPORT NO.- SS/155/2019]

Sr. Observations by Zonal railways, as forwarded by RDSO to the Discussion held thro VC on 19.01.22, 02.02.22, 14.02.22, 16.02.22,
No. Standing Committee - 21.02.222, 24.02.22, 25.02.22, 28.02.22 & decision by the Standing
1) North West R Committee as below -
Letter no.SG/42/NWR/HQ/VII dtd.15.02.2021
Letter no.SG/42/NWR/HQ/VII dtd.03.02.2021
2) N
Letter no. NCR/S&T/8003/RDSO/Pt-2 dtd.12.10.2021
Letter no. JHS/S&T/Wks/2017/09/RE9/Stn dtd.23.02.22
3) Eastern R
By Dy.CSTE/W/D&D/HQ
Letter no. Nil dtd.05.07.21 & 24.02.22
4) Southern R
Letter no. E-202271-SG.199/V/2/77 dtd.25.11.2021
5) Northern R
No letter reference provided by RDSO
6) Western R
Letter no.SG42/2/13 dtd.03.11.2021
7) South Central R
Letter no.SCR-HQ0SNT(WKS)/3/2020 dtd.10.06.2021

1 In Emergency Route Release circuit, counter keeps on incrementing JSLR contact require to be Replaced with JR front contact in EUUYR &
till 120sec as both JSLR and EUUYR are in picked up condition till EEUYR circuits (Page 102).
120 sec. Similarly, counter of Emergency Sub- route cancellation In addition, in EUUYR ckt, JR contact to be parallel with Approach
keeps on increasing till 120 Sec. Only triggering of counter is needed.Locking Relay ATR front contact (when there is not train).(Page 102)
Page 102. In Para 11.3 of the ckts - Note nos.2,3 also corrected (Page 101).
Circuit by WR
2 1) HR of starter signals should be slow to release 3 to 5 sec only for 1) LR circuit for starter signal S25 added now and UYR1 back contact to
train movement. In RDSO approved circuit, even normal cancellation be parallel with HR front contact in 25LR & 25HR circuit (Page 113,
Page 174a
 signal is slow to release for 3 to 5 sec. To be rectified. Page 48- Note 13 added).
2) In case of starter, since first track repeater is made slow to release 2) Note 12 deleted as No slow to release feature reqd for Shunt Signal
by 5 seconds and this repeater is taken in TSR, due to which if any below Starter Signals (Rly Bds directives for only Starter signals)
light engine passes over that track in less than 5 seconds. TSR does (Page 114, 115).
not drop and root of that starter gets stuck. (Page number 125 and
126) 3) Separate TSR to be made for Shunt below Starter signal
(Page 113, 115, 125, 126).

4) To cater for max. sectional speed of 130kmph it is likely with Light

Engine passing, TSR may not drop if time delay is kept to 5Sec.
Committee deliberated & decided to adopt TSR slow to release by 3 Sec
uniformly (Minimum required as per railway Boards directives) to be
implemented uniformly in Std Ckts. Even then, if this problem persists
then Rly. Bd. may be approached to issue directives to reduce time delay
less than 3 Sec.
TSR will now be slow to release by 3 sec. due to TP1R is made slow to
release by 3 sec. (Page 126)
Note 12 is updated of Para12-5 (Page112)

5) As per item no.6 of Annexure at page 167, opposite starters not to lock
each other. RDSO/TOC team to take note of it.

Circuits by WR
3 Signal Failure, Point Failure indication, buzzer & ECH counter 1) Signal and Points Failure Buzzer Indications circuits now included.
circuit not provided. (New Pages 165a, 165b added)

2) ECHZR counter circuits is now included and nomenclature of CH

ZPR is changed to CH NPR (Page 130)
Circuits by NR
4 ASR of Advance Starter S12 is proved in S17 UCR logic circuit, but 1)Advance starter S12 LR, UCR, TSR, ASR, DR circuits prepared. New
S12 ASR logic circuit is not designed. Pages 126a,126b, 126c added now. Page 3 also updated to include Adv
Starter Signal in table.
In S-17LR circuit at Chapter 06 drawing 6-1, additionally proving of

Page 174b
 25 0VSR (UP) contact in series with 17GNR(UP), 01 INR(UP), S17 2) there is a gate ahead controlled
ASR(UP) in the above circuit for ensuring that the concern overlap is by Advance starter then TC to be extended upto LC gate to ensure Back
free. b).

3) Converse proving of S12ASR in S17LR, C17LR & Sh17LR ckts also

done. (Page nos. 49, 51, 53)

Circuits by WR

5 1) (a)When point is operated through buttons and immediately route 1) Para 7.5 at Page no 66 of the std. ckt. document, prevent operation of
is initiated for a movement where point is required in opposite point when the point is under operation by XR logic. Hence after route
direction WJR.J is still in pick up condition through point button initiation no point operation is allowed. However, it is recommended that
operation. Route initiation picks up LR for above said movement. signal route LR indication may be provided on VDU for guidance
Under such conditions point can't be operated through point button in of ASM/Signal Staff that point is inoperative due to XR logic.
the required direction, as XR is dropped by pick condition of WJR.J. Para 7-5, A new note 5 added to XR ckt. (Page 66).
When WJR.J is dropped after 12 sec, pick up condition of NCR or
RCR (picked up through pick up contact of LR), will not allow XR to Other changes as below are agreed & standard circuits updated -
pick up. In above condition, point becomes inoperative though point (i)NWKR back & RWKR back contacts are provided in stick path of
is not in locked condition. To operate point, route initiation WJR.J to drop WJR.J soon after point is detected (Page 67)
cancellation to be done first. This is not desirable as station master
should be able to operate point through point operation buttons in (ii)Now WJR1 is made slow to release by 12 Sec instead of WJR.J. (Page
desired direction for route locking after route initiation. no.67)

(b) Even though point operation is completed, WJR timer drops only (iii)Point WN_BLR back is now to be proved in common path for
after 12 secs. Therefore, when point operation is completed in say 9 Z1NWR/Z1RWR ckts to prevent point operation with route initiation if
secs, WJR.J remains in picked up condition for 3 more seconds, point is already blocked. (Page 62)
hence XR will not pick up. Now if the point is operated immediately
within these 3 seconds Z1NWR/ Z1RWR and NWR/RWR pick up, (iv)NCR1 back is already proved in NWR ckt. Now RCR1 back is also to
but WJR will not pick up (since XR down). Hence WJR.J up will be be proved along with and vice versa in RWR ckt. NCR1 back is to be
available only for the left over 3 seconds. Hence point may operate proved (Page 64/65)
half the way. Whereas WJR full timer has to run for every point
operation for complete operation.

(c)NCR1 and RCR1 drop may be proved in Z1 NWR Z1 RWR,

Page 174c
 by auto route setting and detection fails, if the point is individually

logic will change. Provision of NCR1, RCR1 will prevent this. (Ref.
Sheet 62, 64). In above Normal/ Reverse Control relays start
chattering.

2) For WCZR, QBCA1 relay is being used which is a heavy duty 2) If QBCA1 2F(HD)/4B relays are used then an additional QN1 relay i.e.
relay having 2F(HD)/4F-4B in RDSO circuits, 6 Front contacts of WCZR to be pickup from EI Output of WJR.J which should pick up
this relay are being used in NWZR, RWZR, NECZR, RWCZR WCZR1 (QBCA1) relay through a separate fuse (Page 71, 73).
circuits and in supply being extended to locations (page number 71 In Point Operation circuit WCZR contacts shall be replaced by WCZR1
and 73). Due to limitation of contacts in QBCA1 relay with 2F(HD) and Note 1 & 2 also added (Page 73). (circuit is shown in dotted line)
/4B configuration, repeater needs to be generated. But circuit not
provided. (Page 71, 73)

3) Two relays (QL1 & QBCA1) for NWZR/RWZR & NWCZR/ 3) It is clarified that the two output function relays NWZR/RWZR &
RWCZR operating from single output is not accepted by OEM NWCZR/ RWCZR are not simultaneously picked up from the same EI
(M/s.Kayson) and it is not specified also. (Ref Sheet 71 & 73). Output bit. Rather NWCZR picks up after latch relay NWZR gets latched
first and committee decides no change required.

Circuits by WR

6 OV_FLASH indication appears only after 120 sec as OV_JR pick up Agreed and OV_JR front replaced by OV_JSLR front in OV_Flash.
contact is proved in the OV_ FLASH logic. This is not desirable as (Page 161)
flashing indication should appear as soon as timer is started. In
25_OV flashing indication (OV_FLASH) circuit JR pickup will not Circuits by ER.
initiate flashing indication while OV release timer is in progress
7 Conflicting ASRs of same post signal (calling on, Shunt or main) are 1) Conflicting ASR front removed in ESUYR Ckt to facilitate Emergency
proved in Emergency Sub Route ESUYR cancellation logic of either Sub Route cancellation without proving of other route normal. (Page
of these signals. If during booting of system any of back lock track no.100)
circuit is in failed condition, it would not be possible to release route 2) Mistakenly shown Front contacts of EUUYNR, EUUYR I ESUYR
by emergency sub route cancellation logic. This is highly undesirable circuits replaced by concern ESUYR front contact. (Page no.100)
as at the time of booting, route remains in locked condition in case of

Page 174d
 track failure Circuit by ER

8 Track circuit pickup condition not proved in route release circuit after In order to comply SEM para 21.1.8 (c) it is discussed & decided to use
passage of the train (only track drop is proved), for e.g., in UYR1, 1T berthing /calling-on track back contact along-with 1st track (ahead of the
and 2T drop are proved and in UYR2, 2T and 3T drop are proved. 1T signal) back contact for UYR1 ckts uniformly. Circuit for signal
is not proved pick up in UYR2 and 2T is not proved pick up in S/C/SH17 UYRs updated as per revised SEM. (Page 84, 85, 86, 94, 95,
UYR3. 96, 105, New Pages 95a, 96a, 96b added)).
Sequential pick up and drop as prescribed in statement of RDSO
standard document chapter 10, point no 10-1 & 10-2 not followed. (New Page 95b added).
(Applicable to all UYRs ckts except for Advance Starter signal).
It proves only sequential dropping. If we pick up tracks in any
manner after sequential dropping, the route will be released. Circuits by NR.
Necessary modification is required. Modified circuit is attached.

9 Signal counter (EGGNZ) does not increase after Discussed & decided that there is no codal provision & neither practice to
putting back signal to danger. This is happening due to pick up
contact of HR in counter circuit. HR bit drops immediately when same is deleted from Standard Circuits (Page 124)
signal and EGRRN button are pressed, which breaks path of counter. Circuits by ER.

10 On page no. 135 of RDSO standardization of typical circuits, in 1) JSLR need to be made slow to release to avoid chattering.
ECH_JSLR relay pick up path, drop contact of ECH_CZR is proved 2) As per SEM para 21.2.1 (c) solid state timers shall be provide in
and in ECH_CZR relay pick up path, front contact of ECH_JSLR is duplicated manner with g. Both timer
proved. This causes chattering of relays (ECH_JSLR & ECH_CZR) contacts are now proved in series in ECH_CZR and ECHRBPZR circuits.
and ECH_CZR required to be picked up for extraction of crank (Page 135)
handle in extreme emergencies cases, never picks up. This has been 3) Changes due to HZR relay nomenclature corrected as HR -
rectified by removing contact of ECH_JSLR from pick up path of Page no.131- Note 13-4 B(1) ; Page no.132 - Note 13-4 C(4)
ECH_CZR.
4)Note added for HKT controlled LC gate working (Page133)
Circuit by ER

11 In case of independent shunt signal, if command for lowering is given 1) It is required to take Shunt ON ECR and OFF ECR inputs to EI after
and HR relay (physical relay) does not pick up due to any reason then segregation with HR back, GECR front as Shunt OFF ECR input and HR
at VDU, indication for signal 'OFF' aspect will appear while at site, back, GECR front as Shunt ON ECR input. (Page 119)
signal remains in ON condition. 2) Para 12-8 Note (v) to be modified (to remove along with its repeater

Page 174e
 i.e. SH HPR), note (vi) to be added for 'ON'ECR & 'OFF'ECR inputs
(Page 118).
3) Changes in Shunt lamp indication circuit - GECR contacts to be
replaced by ON ECR and OFF ECR respectively (Page 160 & 161 ).
4) HR back to be removed from Shunt 'ON'GKE indication circuit
(Page 161).
Circuits by ER.

12 During emergency route cancellation i.e. EUUYR operation - Signal As per IRSEM 21.8.1 (a), (g) signal put back to ON shall be proved for
B 21. 5 .1 (Page 83). normal route release with train passage and for EUUYR cancellation.
In ASR circuit RECR (UP) of concerned signal is not proved which Signal RECR front added in common path in ASR circuit updated
is required to ensure signal is not blank before releasing the route. (Page 83) and Note 1 corrected in Para 9-1 (Page 82)
Circuits by WR

13 During opening of LC gate, all gate controlled signals are to be 1) As per SEM 21.1.11 (b) page 441, concerned gate controlled signals
are at ON required to be proved in series with concerned UYRs front
Sheet 138). contact proving that the train has passed the gate. (Page 138).
New Notes 7 added (Page 137).

2) After Rebooting of the EI system, there are cases reported that LC Slot
indication is not available on the VDU, however Gate control is not
transmitted.
It is decided to include a new note 8 in para 14-1 to guide ASM to
withdraw LC Gate slot from VDU after rebooting of the EI system to
avoid any confusion. (Page 138).
Circuits by WR.

14 FCOR logic is not shown and left on OEM. Clear directives may be In the original RDSO report at page 172, it was mentioned that
issued in specification of EI.
to ensure SIL-4 system.
Requirement of is stipulated in Specification for EI, as
per original report and RDSO was to examine & review instructions but
the same is still found pending.
RDSO to decide this aspect early. It will have impact on Std Ckts.

Page 174f
 RDSO FOR N/ACTION
16 Provision of Double cutting contact in the negative path of ON aspect
may be avoided to enhance reliability (Ref.Sheet-117). aspect is agreed and circuit modified. (Page 117)
Circuit by ER

17 OVLR bit shall be removed from NCR1/RCR1 logic as OVLR bit is Since overlap points are thrown with concerned signal route LR,
not required. This may be done by LR (Ref.Sheet-60). committee a
(Page 60)
Circuit by WR

18 Calling-ON Initiation timer indication circuit not given 1) Calling-On Initiation Timer indication circuit now included in the
circuit (Page 161).
2) New note (iii) added to para 5 (Page 160)
Circuits by ER

In S-17LR circuit at Chapter 06 drawing 6-1, additionally proving of Required Overlap is now proved normal, OV25SR pickup contact in
19 25 0VSR (UP) contact in series with 17GNR(UP), 01 INR(UP), S17 Signal LR circuit (Page 49)
ASR(UP) in the above ckt for ensuring that the concern overlap is Up Previous overlap are normal to be added in Note-1 in para 6-1 (Page 48)

20 Emergency Sub-Route cancellation (ESUYR) is not possible with There is no provision of co-operative emergency sub route cancellation in
berthing track occupied (Chapter 09), whereas in earlier Siemens Std EI circuits as well as in SEM.
circuit RRBU used to clear in this case. In case of track ckt failures, ASM to do Emergency Sub route cancellation
with 120Sec time delay (without any co-operation). - No change
Where Signals are having Single back lock track circuit but with Regarding 120sec Time delay release where there is single back lock
Approach track/ Berthing track at either end of the back lock track, track with berthing tracks both sides, Railways may provide circuits with
120Sec Time delay is not given. Rather adjacent track front contact is timer or sequential track occupation/clearance as per operational
21 used in UYR logic to prevent delay in route release every time 10 :- requirements.
Route Release by Train (UYR) logic For Signals having Single back No Change in Std ckt.
lock track circuit, route release is always with 120 sec time delay.
page-93-96

22 As per IRSEM 7.89(b), it shall not be possible to close the line and Reception Signal S1-RECR front contact shall be proved in 1-DCR ckt at
grant or receive Line Clear unless the 'ON' aspect of the relevant First page 142, 145, 148, 149, 150, 153, 154

Page 174g
Stop Signal is proved. This feature is to be provided. SCR has not
provided this feature at Wangapalli. This feature is being provided in Circuits by WR
SCR with different block logic. 15-1-A: Double Line Block Circuit
ON aspect of relevant First Stop Signal is not proved, before closing
the line and grant or receive line clear. (Page no-144)

Page 174h
 SOUTHERN RAILWAY

No.SG.51/IV/CN/Typical/Vol.3 Office of Chief Administrative

Officer/Construction
S&T Construction Wing,
Project Office Complex, II Floor,
Egmore, Chennai – 600 008.

Dt.09.07.2024

Principle Executive Director / S&T,

R.D.S.O,
Lucknow.

Sub: Report on standardisation of typical circuits for automatic signalling.

Ref: Railway Board’s letter No. 2018/Sig/36-SD/1/Pt Dated: 30.05.2023
******

Railway Board vide letter under reference re-nominated the standing

committee for “standardisation of Typical circuits for EI and development of SigDATE”
comprising of:-

1. Shri D.Sunil, CSTE/CN/SR, Convener

2. Shri Amit Misra, ED/Sig-I/RDSO, Secretary
3. Shri S.R.Murthy, Dy.CSTE/Plg/HQ/SCR, Member
4. Shri V.K.Pandey, Dy.CSTE/Plg/NR, Member
5. Shri D.S.Ganesh, Dy.CSTE/P&D/WR, Member
6. Shri D.S.Arunachalam, SSTE/SR, Member
7. Shri Anirban Sengupta, SSTE/Works/Sig/SER, Member
8. Shri S.K.Agrawal, SSTE/D&D/PU/NCR, Member

The committee was entrusted with the development of standard typical

circuits for automatic signalling. The initial draft standard typical circuits of EI for automatic
block signalling were circulated to all the Zonal Railways and EI OEMs for their comments
vide RDSO’s l.no. RDSO-SIG0EI(CKT)/1/2020 dated 06.03.2023. Comments were received
from CR, ECR, ECoR, NFR, NWR, SR, SER, SWR, WCR zonal railways and M/s Kyosan EI
OEM. Meanwhile during the meeting held in Railway Board on 15.09.2023 to review the
progress of standardization of circuits, it was highlighted that various schemes are being
adopted by the Zonal Railways for implementation of automatic block signalling and it will not
be possible to issue standard circuits which will be suitable for all the schemes. The
committee was advised to develop the standard typical circuits for automatic block signalling
by adopting a suitable standard scheme. Accordingly, the scheme having EI/OC option with
one exclusive EI controlling the entire section between 2 block stations has been taken for
development of the standard typical circuits. As per this scheme, each auto location hut and
both the block stations will have OCs with the CIU located at either of the block stations or at
any one of the auto location huts depending on the factors like space availability, ease of
approach for maintenance staff etc.

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 The comments received from Zonal Railways and EI OEM on the initial draft
standard typical circuits of EI for automatic block signalling were deliberated by the Standing
committee and the required corrections/modifications/improvisation in the initial draft circuits
were made and the final draft typical circuits prepared were circulated to all the zonal
Railways and EI OEMs for their comments vide RDSO’s l.no. RDSO-SIG0EI(CKT)/1/2020
dated 21.03.24.

Comments on the final draft typical circuits were received from ER, SCR,
NWR & SECR zonal railways and M/s Kyosan & M/s Hitachi EI OEMs. The received
comments from Zonal Railways and EI OEMs were further deliberated by the Standing
committee and the required corrections/modifications/improvisation in the final draft circuits
have been done and the final standard typical circuits of EI controlling the automatic
signalling in the block section (double line and single line) and the modifications required in
the station’s circuits of EI for introduction of automatic signalling have been prepared.
Proposed modifications in circuits for the stations are as per the standard typical circuits v2.0
for EI having less than 100 routes. Please note that modifications in 15 existing pages i.e.
14, 36, 60, 83, 91, 94, 95b, 105, 109, 113, 117, 126, 126a, 126c & 138 and 6 new pages i.e.
40a, 49b, 77a, 113a, 138a & 159a are added in the standard typical circuits v2.0 for EI
without changing original numbering.

For stations having other than the standard typical circuits, suitable
modifications will have to be made as per the requirement. The automatic signalling scheme
based on EI and OCs taken in this document is only indicative for preparation of standard
typical circuits. However, the suggested standard typical circuits will be suitable for
implementing ABS as per other EI/OC schemes also for which Zonal Railways will have to
make suitable modifications especially in the interface circuits to suit the scheme specific
requirements.

The report is being forwarded for further necessary action.

Encl: Report No.SS/164

Digitally signed

D SUNIL by D SUNIL
Date: 2024.07.09
09:58:58 +05'30'

(D.SUNIL)
CSTE/CN/S/MS &
Convener of Committee

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 GOVERNMENT OF INDIA
MINISTRY OF RAILWAYS

STANDARD TYPICAL CIRCUITS FOR AUTOMATIC BLOCK

SIGNALLING

Report no. SS/164/2024

08th July, 2024

Signal Directorate

Page 177 of 334

File no. RDSO-SIG0EI(CKT)/1/2020 Date:- 08-07-2024

Brief on standard typical circuits of El for automatic signalling working

1. The initial draft standard typical circuits of EI for automatic block signalling were
circulated to all the Zonal Railways and EI OEMs for their comments vide RDSO’s
l.no. RDSO-SIG0EI(CKT)/1/2020 dated 06.03.2023. Comments were received from
CR, ECR, ECoR, NFR, NWR, SR, SER, SWR, WCR Zonal Railways and M/s
Kyosan EI OEM. Meanwhile during the meeting held in Railway Board on 15.09.2023
to review the progress of standardization of circuits, it was highlighted that various
schemes are being adopted by the Zonal Railways for implementation of automatic
block signalling and it will not be possible to issue standard circuits which will be
suitable for all the schemes. Accordingly, the committee was advised to develop the
standard typical circuits for automatic block signalling by adopting a suitable standard
scheme.

2. The committee examined the draft scheme which was issued by RDSO in the year
2008 and also the sample scheme indicated in the IRSEM which is with overlapping
track sections with the boundaries of the individual track sections being from the foot
of the signal to the overlap of the signal in advance. This scheme had the following
limitations:

a. The scheme of overlapping track sections may create confusion to on duty

SM. Since the track section in the RDSO draft scheme is from the foot of the
signal to the overlap of the signal in advance, when a train passes a signal,
the track portion beyond the signal in advance up to the overlap will be shown
as occupied whereas the signal protecting the overlap may be displaying
proceed aspect. Some Zonal Railways suggested to logically derive virtual
track section of the overlap portion for provision of clear/occupied indication.
Creation of virtual track sections through combination of adjacent track
sections for displaying on the VDU to address this issue is not desirable since
there will be mismatch in track section shown on VDU and the physical track
section available at site. All these can create confusion to the operating staff
especially during manually resetting the failed track section.

b. In future while implementing CTC/TMS in the section, while displaying the

auto sections under a section controller on the large format display on the
OCC, the issues mentioned in the above para will be more pronounced.
Moreover due to the less number of track sections which are also
overlapping, locating the exact position of the train in the auto section will be
difficult and thereby affects the operational efficiency of CTC/TMS
applications.

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 c. When interlocked LC gates are available in the section, the overlapping track
sections will not facilitate immediate opening of the gate after the passage of
the train. The delay in opening of LC gates may lead to public unrest.

3. To overcome the above limitations, it was decided to have the track sections
contiguous as shown in figure VDU layout diagram included in the proposed typical
circuits. The number of DPs in this scheme remains the same as the number of DPs
in the sample scheme indicated in the IRSEM with overlapping track sections.

4. For exchange of signalling information between the auto location huts, out of the
various options available viz. multiple copper cables, UFSBI, Electronic
Interlocking(EI)/Object Controllers(OC) and FnMUX, scheme having EI/OC option
with one exclusive EI controlling the entire section between 2 block stations has been
taken for development of the standard typical circuits. As per this scheme, each auto
location hut and both the block stations will have OCs with the CIU located at either
of the block stations or at any one of the auto location huts depending on the factors
like space availability, ease of approach for maintenance staff etc.

5. The comments received from Zonal Railways and EI OEM on the initial draft
standard typical circuits of EI for automatic block signalling were deliberated by the
“Standing committee for standardisation of typical circuits for EI”. Based on the
scheme mentioned in the above paras, the required
corrections/modifications/improvisation in the initial draft circuits were made and the
final draft typical circuits prepared were circulated to all the Zonal Railways and EI
OEMs for their comments vide RDSO’s l.no. RDSO-SIG0EI(CKT)/1/2020 dated
21.03.24.

6. Comments on final draft standard typical circuits of EI for automatic signalling were
received from ER, SCR, NWR & SECR Zonal Railways and M/s Kyosan& M/s Hitachi
EI OEMs. The received comments from Zonal Railways and EI OEMs have been
further deliberated by “Standing committee for standardisation of typical circuits for
EI” and required corrections/modifications/improvisation in the final draft circuits have
been done and the final standard typical circuits have been prepared.

7. Final standard typical circuits of EI are being proposed for automatic signalling
(double line and single line) and the modifications required in the station’s circuits of
EI for introduction of automatic signalling. Proposed modifications in circuits for the
stations are as per the standard typical circuits v2.0 for EI having less than 100
routes. For stations having other than the standard typical circuits, suitable
modifications may be made as per the requirement. The automatic signalling scheme
based on EI and OCs taken in this document is only indicative for preparation of
standard typical circuits. However, the suggested standard circuits will be suitable for
implementing ABS as per other EI/OC schemes also for which Zonal Railways will
have to make suitable modifications especially in the interface circuits to suit the
scheme specific requirements.

8. Following documents are enclosed:

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 a. Standard typical circuits for automatic signalling on double line section (44
pages).
b. Standard typical circuits for automatic signalling on single line section (49
pages).
c. Modifications in station’s circuits for introduction of automatic signalling (22
pages).
d. Deliberations of Standing committee on the comments received from Zonal
Railways and EI OEMs (6+25+8= 39 pages).

Digitally signed
Saladi Rama by Saladi Rama
Chandra Chandra Murthy VIJAY Digitally signed by
VIJAY KUMAR
Digitally signed by
SRIDHAR SRIDHAR GANESH
Date: 2024.07.08
Murthy 15:54:51 +05'30' KUMAR PANDEY GANESH DEVULAPALLI
Date: 2024.07.08
PANDEY 14:20:21 +05'30' DEVULAPALLIDate: 2024.07.08 13:
57:40+05'30'
(S. Rama Chandra Murthy) (V. K. Pandey) (D. S. Ganesh)
Dy.CSTE/Plg/HQ, S.C. Railway Dy. CSTE/D&D, N. Railway Dy.CSTE/D&D, W. Railway
Member Member Member

DS Digitally signed by D
S ARUNACHALAM
ARUNACHALA Date: 2024.07.08
ANIRBAN Digitally signed by
ANIRBAN SENGUPTA SUNIL Digitally signed by
SUNIL KUMAR

M 10:44:51 +05'30' SENGUPTA Date: 2024.07.08 KUMAR AGRAWAL

10:27:56 +05'30' Date: 2024.07.08
Retd. on 31.05.2024 AGRAWAL 13:32:37 +05'30'

(D. S. Arunachalam) (AnirbanSengupta) (S. K. Agarwal)

Dy.CSTE/CN-II/HQ, S. Railway Dy.CSTE/Project/D&D, S.E.R. SSTE/D&D/PROJECT, N.C. Railway
Member Member Member

D Digitally signed
by D SUNIL AMIT Digitally signed by
AMIT MISRA
SUNIL
Date: 2024.07.08
13:57:06 +05'30'
MISRA Date: 2024.07.08
16:14:50 +05'30'
(D. Sunil) (Amit Misra)
CSTE/CN, S. Railway ED/Signal-I, RDSO
Convener Secretary

Page 3 of 3

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 AUTO HUT

STATION - A STATION - B

STATION A STATION B
AUTO
SECTION (EI - I/O
(EI - I/O AUTO
CARD OC KEPT CARD
SECTION
OR AT OR
EI
RRI) STN B RRI)

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NOTE: 1. TRACK CIRCUITS CONSIDERED FOR APPROACH LOCKING AND WARNING ARE ONLY INDICATIVE, AS PER SEM PARA 14.1.9,
THE ACTUAL DISTANCE SHALL BE DECIDED BY ZONAL RAILWAY AS PER EXTANT PRACTICES/POLICIES
2. GATE RELEASE LOGIC SHALL BE AS PER ZONAL RAILWAY PRACTICE.
3. ADDITIONAL INDICATIONS/BITS MAY BE PROVIDED BY ZONAL RAILWAYS DEPENDING ON LC GATE RELEASE LOGIC
4. WHERE SEPERATE BACK LOCKING CIRCUITS ARE USED BY ZONAL RAILWAYS FOR OPENING OF LC GATE, THE TRACK
CIRCUITS IN ADVANCE OF THE SIGNAL PROTECTING THE LC GATE SHALL ALSO BE PROVED IN THOSE CIRCUITS
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NOTE :- SIMILAR ARRANGEMENTS FOR ALL AUTO SIGNALS & MSDAC TRACK SECTIONS SHALL BE PROVIDED

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NOTE :- 1. WIRING IS SHOWN FOR MSDAC EVALUATOR KEPT IN AUTO HUT, ACTUAL WIRING SHALL BE OEM SPECIFIC
2. ALL MSDAC OUTPUTS TO BE READ IN

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 LOCATION AUTO SECTION EI RELAY ROOM

Sig S840

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 BI DIRECTIONAL AUTOMATIC SIGNALLING DOT SETTING

FLOW CHART

RELAY/LOGIC NOMENCLATURE
SENDING STATION AUTO EI RECEIVING STATION
STATION-A STATION-B
UP STN_A-B
UP_INI - UP INITIATION
STN_A-B
UP INITIATE BUTTON PRESSED DN_INI - DOWN INITIATION
(HOME & LSS NORMAL & STN_A-B_BLOCK_TPR )

STN_A-B
UP_INI_J - UP INITIATION WITH SLOW TO RELEASE
STN_A-B_UP_INI STN_A-B
STN_A-B_UP_INI_J STN_A-B_A_UP_INIT_KE DN_INI_J - DOWN INITIATION WITH SLOW TO RELEASE

STN_A-B - ALL THE TPR's FROM LSS OF STATION 'A' TO

STN_A-B_A_UP_INI_J ACKNOLEDGE BUTTON PRESSED BLOCK_TPR LSS OF STATION 'B'
STN_A-B_BLOCK_TPR (HOME & LSS NORMAL & STN_A-B_BLOCK_TPR )
STN_A-B
STN_A-B_B_UP_ACK STN_A-B_B_ACK UP_LR - UP DIRECTION LOGIC
STN_A-B
DN_LR - DOWN DIRECTION LOGIC
STN_A-B_DN_LR STN_A-B
STN_A-B UP_LPR - UP DIRECTION LATCH RELAY
STN_A-B_DN_DOT_KE STN_A-B_DN_DOT_KE
DN_DOT
STN_A-B
STN_A-B_UP_LR DN_LPR - DOWN DIRECTION LATCH RELAY
STN_A-B
UP_LPR_RB - UP DIRECTION LATCH RELAY READBACK
STN_A-B_DN_LPR STN_A-B
(LATCH RELAY) DN_LPR_RB - DOWN DIRECTION LATCH RELAY READBACK
STN_A-B
UP_DOT - UP DIRECTION OF TRAFFIC ESTABLISHED
STN_A-B_UP_LPR
(LATCH RELAY) STN_A-B
DN_DOT - DOWN DIRECTION OF TRAFFIC ESTABLISHED

STN_A-B_UP_LPR_RB

STN_A-B_UP_DOT

UP AUTO SIGNAL

STN_A-B_UP_DOT_KE CLEARS STN_A-B_UP_DOT_KE

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 AUTO HUT

STATION - A STATION - B

AUTO AUTO
SECTION SECTION STATION B
STATION A
EI OC KEPT
(EI - I/O AT (EI - I/O
CARD STN B CARD
OR OR
RRI) RRI)

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 NOTE:- DOT - DIRECTION OF TRAFFIC
BLOCK TPR - ALL TRACK SECTIONS BETWEEN LSS OF STN-A AND STN-B

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 LX AUTO RELAY NOMENCLATURE

LX AR - L-XING FINAL APPROACH RELEASE RELAY

LX XCKPR - L-XING CLOSED AND LOCKED

LX DN_AWR - L-XING AUTOMATIC DOWN DIRECTION APPROACH WARNING RELAY

LX DN_AR - L-XING AUTOMATIC DOWN DIRECTION APPROACH LOCKING RELAY

LX UP_AWR - L-XING AUTOMATIC UP DIRECTION APPROACH WARNING RELAY

LX UP_AR - L-XING AUTOMATIC UP DIRECTION APPROACH LOCKING RELAY

NOTE: 1. TRACK CIRCUITS CONSIDERED FOR APPROACH LOCKING AND WARNING ARE ONLY INDICATIVE, AS PER SEM PARA 14.1.9,
THE ACTUAL DISTANCE SHALL BE DECIDED BY ZONAL RAILWAY AS PER EXTANT PRACTICES/POLICIES
2. GATE RELEASE LOGIC SHALL BE AS PER ZONAL RAILWAY PRACTICE.
3. ADDITIONAL INDICATIONS/BITS MAY BE PROVIDED BY ZONAL RAILWAYS DEPENDING ON LC GATE RELEASE LOGIC
4. WHERE SEPERATE BACK LOCKING CIRCUITS ARE USED BY ZONAL RAILWAYS FOR OPENING OF LC GATE, THE TRACK
CIRCUITS IN ADVANCE OF THE SIGNAL PROTECTING THE LC GATE SHALL ALSO BE PROVED IN THOSE CIRCUITS
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 *

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 *

NOTE:
* - SIMILAR OUTPUT RELAYS SHALL BE PICKED UP FOR M551, M552, M553, M554, M556, M557, M558, M559, M560
@ - SIMILAR OUTPUT RELAYS SHALL BE PICKED UP FOR M556 Page 249 of 334
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NOTE :- 1. WIRING IS SHOWN FOR MSDAC EVALUATOR KEPT IN AUTO HUT, ACTUAL WIRING SHALL BE OEM SPECIFIC
2. ALL MSDAC RESET BITS TO BE READ IN
Page 251 of 334
 *

NOTE:
* - SIMILAR INPUT SHALL BE READ IN FOR M551, M552, M553, M554, M556, M557, M558, M559, M560
@ - SIMILAR INPUT SHALL BE READ IN FOR M556
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INTERFACE CIRCUIT

#F
#F

#F
#F

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 LOCATION AUTO SECTION EI RELAY ROOM

Sig M555

A
AG

SPT

M555

100Ω 2200MFD

100Ω 2200MFD

100Ω 2200MFD

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 Remarks on comments received from Zonal Railways on final draft automatic signalling circuits

Railway SN Comments/Remarks received from Zonal Railways Remarks of Standing Committee

As all the controls (track proving & ECPR) for entire section are As per the scheme since separate EI proposed for auto
1 available within EI itself, HR, DR & HHR logic may be generated section, the HYR, HHYR & DYR logics are required to
directly eliminating HYR, HHYR & DYR Iogic. interface with station EI.
Limitations stated at SN. () &(ü) of Page 1 of 2 can be overcome
with following modifications: This modification is not agreed since there will be mismatch
in track section shown on VDU and the physical track
2 "For track section clear indication rear section and advance section available at site. Moreover the issue of locating the
section Axie Counter pick up to be proved in parallel. And for train exactly on the track section is not getting addressed
occupied indication rear section and advance section Axle Counter by the suggested modification.
drop to be proved in series.
3 Power distribution at Hut to be confirmed. Not within the scope of standard typical ckt.s of EI.
Logic for Gate control Semi-Automatic signals including Gate Gate release logic may be generated as per the zonal
4
Release logic may be generated through El. railway practices.
In case of inter signal distance between two auto signals is less Aspect control sequence adopted in approved signalling
5 than 1km (due to site constraint) aspect control logic may be plan shall be taken for implementing the aspect control
ER provided, logic.
Condition for AM40 HR or AM39 HR (Auto mode of Advanced Logic for AM39LR and AMHR has now been added in the
6
Starters) clearance logic may be provided. double line standard typical circuit.
How the circuit will behave during failure of signal aspect is
As per G.R. para 9.03.(1) (g) " all stop signals against the
stipulated in IRSEM para 20.2.2(f). This has no effect on the
7 direction of traffic shall be at ON."This is to be considered in HR
direction setting circuits hence 'ON' aspect is not required
logic for bi-directional auto.
to be proved.
As per IRSEM para 20.4.1(a) MABS should be implemented in MABS for bidirectional line is mentioned in GR-9.03 (3)(a)
8 double line auto working only. But the same is proposed for bi- and same is also implemented in some of the zonal
directional line also. This may be reviewed. railways.

When Modified Automatic Signalling mode is active, AGM & AM

marker wi! not glow. Now, if Gate Failure occurs, the concerned
For MABS GR-9.01 (4) and GR 9.03 (4) is applicable.
9 Gate Signal will not glow, causing the train to stop till Gate failure
is irestored which is not in line with GR Para 9.15. Instead of AGM
marker, solid G marker may be provided as existing.

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Railway SN Comments/Remarks received from Zonal Railways Remarks of Standing Committee

In Sheet 32, in 860 HYR coil circuit C01_ECR drop to be proved in
Since Calling-ON track portion is covered in the controlling
series, since C-On track is not proved 860 HR circuit.This is
ER 10 Axle counter section in rear of the home signal, C01_ECR
required to restrict 860HR from picking up when C01 has been
proving is not required in 860HYR coil circuit.
lowered.
Separate Track section is provided for overlap, this will increase In view of the benefits mentioned in the brief, separate
1
number of Track sections. track section for overlap are retained.
How the circuit will behave during failure of signal aspect is
As per GR 9.03(1) (9) all stop signals against the direction of stipulated in IRSEM para 20.2.2(f). This has no effect on the
2
SCR traffic shall be ON. This is not ensured in the circuits. direction setting circuits hence 'ON' aspect is not required
to be proved.
Only one automatic control should be provided for all main
To have more flexibility and uniformity individual automatic
3 signals of one direction against individual buttons, which
control on signals are provided.
minimizes logic.
Page no-9
Observations in Draft Logic Circuit for
automatic Signaling with El(Double line)
In Approach warning logic UP AUXR1 or DN ADXR1 bit shown, but
circuit is not designed. Approach warning circuit Circuits for ADXR1/AUXR1 and ADMR1/AUMR1 have now
NWR AD
(ADXR1/AUXR1) for those Engineering Interlocked LC gate which been incorporated.
are in close proximity of station may be designed
Modification required.
Circuit may be designed for approaching warning. NWR has
implemented approach warning.

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 Remarks on comments received from Zonal Railways on final draft automatic signalling circuits

Railway SN Comments/Remarks received from Zonal Railways Remarks of Standing Committee

Annexure 14-A1,S.No.3(page 312) of SEM: Within or Outside

Station Limits interlocked LC gates: Provision of Warning bell or
hooter operated by Approach Train at Interlocked LC Gates in
suburban section and non-suburban sections is provided on
sections having Automatic Signaling. (Ref. RB's letter No.
2011/SIG/WP/LC/IR/1 dated 20.02.2013) provision of warning as
per SEM for within station limit interlocked LC gate is required in Circuits for ADXR1/AUXR1 and ADMR1/AUMR1 have now
automatic signaling section. been incorporated.

Circuit may be designed for warning in case of Within station limit

Gate.

Modification required.
NWR Circuit may be designed

Three track circuit (Signal controlling, Berthing and overlap) are

designed instead of one track circuit for clearing of
Signal but Sequential route releasing is not designed. In case
permanent picking up of axle counter (due to short cut),
unsafe condition may arise. Therefore, Sequential route releasing Since concept of route and sequential proving of track
along with ASR may be designed. circuits are not mandated/followed in automatic signalling,
suggestion is not applicable.
Modification required.

ASR, UYR1 & UYR2 circuit may be designed for route locking and
releasing.

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Railway SN Comments/Remarks received from Zonal Railways Remarks of Standing Committee

In the proposed scherne supervisory track sections have not

been shown. In case of failure of both system-A & system-B, the
on duty SM's on both ends SM's on both ends will initiate manual
reset (preparatory type) after verifying that there that there is no Note has been added in sheet no. 01 of automatic signalling
1 train in block section. In lengthy & busy block sections, manual circuit regarding provision of supervisory track sections for
resetting will not be feasible as availability of entire section being resseting purpose.
free of train is unikely. n such situations, supervisory track
sections will serve the purpose. In view of the above, it is
suggested that supervisory track sections & resulting

In RDSO guidelines vide letter no. STS/E/AC/ABS dtd 01.07.08

for auto signalling with MSDAC in Double line section, item no.
SECR Since concept of ensuring direction of movement in double
4.2 states that "The direction of movement must be ensured
2 line sections is not mandated as per SEM same is not
through circuit". This guideline has been implemented
considered.
in SECR.
The proposed new scheme there is no such provision.

In all signaling designs, fail-safe design practices must be

followed. As such, use of relays in either continuous pick-up or
Concept of ensuring that relays are not in continous pickup
continuous drop condition shall be avoided.
or continous drop condition is not a design practice followed
Self-verification of any state shall be ensured through sequence
3 in circuits using metal to carbon relays. Since the automatic
of pick-up/drop Conditions. In this regard, observation no. 4 of
signalling circuits proposed are with metal to carbon relays,
WCR may be reviewed. This will
suggestion is not applicable.
improve the overall safety as well as directional proving can be
achieved for unidirectional lines (UP/DN).

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 Remarks on comments received from Zonal Railways on final draft automatic signalling circuits

Railway SN Comments/Remarks received from Zonal Railways Remarks of Standing Committee

As per remarks of RDSO to Item no. 1l of SER it is mentioned

that MSDAC & EI are distributed architecture. However, it is not
The architecture of MSDAC to be used in auto signalling
apparent whether line-wise distribution of MSDAC is proposed in
shall be decided by the Zonal Railways as per the extant
4 the instant scheme.
practice/policy to suit the site conditions. Suitable note has
Further, use of distributed MSDAC may be reviewed as some
been added in the relevant sheets.
vendors for MSDAC (in approved RDSO list) are having
centralized evaluator configuration caterng for multiple lines.

In the proposed scheme, the UP/DN direction shown in the bi-

directional line diagrarm oes not match with the direction of
5 Same has now been corrected
signals i.e. UP Adv. Starter & DN Home Signal direction are
SECR opposite to the UP/DN direction in the diagram
In the proposed scheme, initiation for change in direction on bi-
directional line is through UP_LR or DN_LR following which final
Any indication for failure of a particular relay is not required
latch relay UP LPR or DN LPR is energized. If the concerned latch
to be made available to the SM. The reason for any failure
6 relay fails to energize due to any reason, this causes complete
for not able to set the direction of traffic can be found out
failure of direction establishment. To avoid this, suitable flashing
by the S&T staff using the EI maintenance terminal.
indication for concerned LR pick-up & LPR drop needs to be e
provided in the VDU.

Direction setting logic of bi-directional line auto signaling Red

7 Aspect of LSS & Home signal to be proved. RDSO remark on item Same is already proved in GNCR circuits.
no. 8 of ECoR confirms the same, but not shown in the logic.

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 Remarks on comments received from Zonal Railways on final draft automatic signalling circuits

Railway SN Comments/Remarks received from Zonal Railways Remarks of Standing Committee

As per Gazette notification dated 05.03,24 amendmnent to GR

9.04 & 9.06 was made, as quoted "Conditions for taking 'off
manual stop sgnal or semi-automatic stop sigrnal in automatic
block territory on single line:- for sub rule (1) Home Signal When
a train is approaching a Home signal, otherwise than at a Circuits have been modified in sheet no. 49A of Station's
8
terminal station, the signal shall not be taken 'off unless the line circuit.
is clear not oniy upto the starter but also for an adequate
distance beyond it and in addition for automatic working,
direction of the block sectlorn ahead is not set in opposite." This
shall be followed in the proposed scheme

Use of 17ASR drop indirectly proves overlap points (UCR pick up)
which is not desired as per remark of RDSO on observation of
9 ECoR vide item no. 1 & 3. Some Circuits have been modified.
SECR modifications to avoid proving of overlap points in illuminated 'A'
marker logic of S17 is hereby enclosed.

In S17AMLR, logic for auto signal cancelled by pressing of AMGRR

To maintain uniformity, AMGNR has been made as a
10 & 17GNR. It should be AMGRR & 17AMGNR. For lowering &
common button. Circuits have been suitably modified.
cancellation of a given signal, same button to be pressed.

Inputs for indications i.e. IPS, Fire alarm, Relay Room, OFC Non vital indications to be displayed to the SM through VDU
11
status ete of mid-section auto huts may be incorporated in logic. may be decided by the Zonal Railways.

The given interface is only indicative between EIs of

In the proposed scherne, relays are being used for interface
different OEMs. As and when standard interface protocol is
between auto El and station EI. Solution for software based
12 developed by different OEMs for EI-EI interface, the same
interface wherever feasible may be explored to minimize relays
can be implemented. Suitable note has been added in the
and exlernal wiring.
concerned sheet.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
1.01 Sheet 1 MSDAC's with Dual MSDAC with dual detection is not matching with SEM Remarks have already been given in the
Detection Annexure: 20-A1.II.C (Page 429 of 535). The brief on proposed final draft standard
following typical circuits in para 2 item (i) and (ii).
things mentioned in SEM is differing with Standard Scheme given in IRSEM is only an
typical circuit, kindly clarify example for information and not binding
1. In order to minimize the number of track sections, as per para 20.2.4 of IRSEM.
no separate track section has been made for overlap
portion of auto-sections.
2. Supervisory track sections have been formed
using the DPs of track sections for automatically
resetting track
sections.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
1.02 Sheet 2 & 3 Automatic Block Automatic Block Signalling Between STN 'A' & STN 'B' Remarks have already been given in the
Signalling Between System Configuration is not matching with SEM brief on proposed final draft standard
STN 'A' & STN 'B' Annexure: typical circuits in para 4. The automatic
System 20-A1 (Page 427 of 535). The following things signalling scheme based on EI and OCs
Configuration mentioned in SEM is differing with Standard typical taken in standard typical circuit in only
circuit, kindly indicative for preparation of standard
clarify typical circuits. Moreover, scheme given
1. Both Stations A & B on either end of the block in IRSEM also is only an example for
sections are provided with Electronic Interlocking information and not binding.
system.
2. The Automatic signals of either direction are
controlled by the EI of sending station.
3. Two OC's are provided in each Auto Goomty, for
controlling either direction Automatic signals. This
arrangement will ensure that if any OC has failed,
only one direction of traffic will get affected

1.03 Sheet 2 & 3 Automatic Block System configuration of EI's OEM will differ based on This has already been clarified in the
Signalling Between their system hardware and communication brief.
STN 'A' & STN 'B' arrangement, so clear notes to be mentioned
System provided system configuration only for Reerence.
Configuration

1.04 Auto signal Auto signal cancellation option can be provided to This option is not provided since it has not
cancellation cancel any automatic signal during any emergency been mandated by any rules.
situations like Up train fall on down track, track is
damaged, etc.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
1.05 Axle counter Reset Standard typical circuit to be provided for Axle Standard circuits for resetting have not
Circuit counter reset circuit, since Axle counter reset yet been issued since it may vary from
procedure should be as per IRSEM 17.7.4, 17.7.5 & OEM to OEM. It will be dealt separately.
17.7.6 (Page 350 of 535) and SEM Annexure: 20-
A1.II.D (Page 431 of 535).

1.06 EI System failure, EI System failure, VDU failure conditions to be SYSON contacts have already been
VDU failure considered and conerned circuits to be updated. incorporated in the relevant circuits. VDU
failure conditions are not considered in
the circuits since no input is taken
through the VDU.
1.07 AUTO/MABS 1. AUTO/MABS Changeover physical switch can be There is no benefit for providing this
Changeover provided instead of Soft button on VDU, since VDU or feature since the authority to send the
EI failed at Station A or Station B SM will not have train in to the block section has to be
any option to change the AUTO/ MABS. manually dealt by the SM for each train in
2. If AUTO/MABS Changeover physical switch not case of station EI failure.
provided means, AUTO_LR & MABS_LR circuit to be
updated to enable MABS mode during VDU or EI
failed at Station A or Station B, since MABS is the
safest mode during failure.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
1.08 BI-DIRECTIONAL BI-DIRECTIONAL physical switch can be provided Since other interlocking conditions of the
instead of Soft button on VDU, since VDU or EI failed station are also proved for changing the
at Station direction of traffic, the same cannot be
A or Station B SM will not have any option to change possible during station EI failure. Since
the Direction of Traffic. the status of signalling gears are not
known to the SM during VDU failure,
changing the direction of traffic will not be
attempted by the SM. Hence, there is no
benefit for providing a separate physical
switch for change of direction.

1.09 Level crossing at Level crossing at station section circuit to be Gate release logic may be generated as
station section provided per the zonal railway practices for
circuit to be automatic working at station. Suitable
provided note has been included in the concerned
sheet no. 138 of standard typical circuits
version 2.0.
PROPOSED STANDARD TYPICAL CIRCUITS FOR AUTOMATIC SIGNALLING ON DOUBLE
LINE SECTION
2 AUTOMATIC SIGNALLING SECTION EI LOGIC CIRCUIT

Page 4 of 25
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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.01 Sheet 1 Axle counter track 1. Axle counter track name can be mentioned with Corrections have been incorporated in the
name suffix AC instead of TS like 39AC to clearly indicate yard layout. The numbering scheme is
the Track only tentative. Suitable note has been
section is Axle counter. accordingly incorporated in the circuit.
2. Signal name can be mentioned with prefix S like
S865 instead of 865, since station signals mentioned
with
prefix S and in most of the circuit bit nomenclature
used with signal name prefix S.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.02 Sheet 4 I/O Distribution Axle counter Reset command and LVR bits to be Standard circuits for resetting have not
between Auto Hut & considered yet been issued since it may vary from
STN 'A' & B The following Bits to be added between AUTO Hut OEM to OEM. It will be dealt separately.
and STN 'A' I/O distribution Inputs for reset indications are now
1. STN_A-B_UPAC_RST_INI (STN 'A' to STN 'B' Up shown in the I/O distribution at stations.
direction Axle counter reset initiation)
2. STN_A-B_DNAC_LVR (STN 'A' to STN 'B' Down
direction Block section clear line verification)
3. STN_A-B_UPAC_LVR_J (STN 'A' to STN 'B' Up
direction Block section clear line verification with
Slow to
Release)
The following Bits to be added between AUTO Hut
and STN 'B' I/O distribution
1. STN_A-B_DNAC_RST_INI (STN 'A' to STN 'B'
Down direction Axle counter reset initiation)
2. STN_A-B_UPAC_LVR (STN 'A' to STN 'B' Up
direction Block section clear line verification)
3. STN_A-B_DNAC_LVR_J (STN 'A' to STN 'B' Down
direction Block section clear line verification with
Slow to
Release)

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.03 Sheet 4 I/O Distribution The following Bit nomenclature can be changed Bit nomenclature has been suitably
between Auto Hut & between AUTO Hut and STN 'A' I/O distribution modified.
STN 'A' & B 1. BLOCK SEC UP MSDAC FAIL to STN_A-B_UPACFR
2. UP_SFR to STN_A-B_UP_AUTO_SFR
3. UP_FCOR to STN_A-B_UP_AUTO_FCOR
4. LX2 AUXR1 to LX42_UPAWR
The following Bit nomenclature can be changed
between AUTO Hut and STN 'B' I/O distribution
1. BLOCK SEC DN MSDAC FAIL to STN_A-B_DNACFR
2. DN_SFR to STN_A-B_DN_AUTO_SFR
3. DN_FCOR to STN_A-B_DN_AUTO_FCOR
4. LX2 ADXR1 to LX42_DNAWR
5. LX2 ADMR1 to LX42_DNAR
The name INT can be changed as INI, since these
name given for Initiation and INT most of logic used
as INTERNAL naming.

2.04 Sheet 4 I/O Distribution EI System Healthy & VDU Healthy of Station A & B Requirement for providing these
between Auto Hut & bits to be considered additional bits is not clear since these
STN 'A' & B The following Bits to be added between AUTO Hut information are already made available on
and STN 'A' I/O distribution the auto section EI VDU provided on both
1. STN-A_AUTO_HLTY (STN 'A' EI System & VDU the stations.
Healthy)
The following Bits to be added between AUTO Hut
and STN 'B' I/O distribution
1. STN-A_AUTO_HLTY (STN 'A' EI System & VDU
Healthy)

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.05 Sheet 5 MSDAC & HOME ACPR circuit can be modified by proving Axle counter There is no such requirement.
SIGNAL APPROACH Reset command, reset initiation, Line verification and
LOGIC Reset relay drop contact.
2.06 Sheet 5 MSDAC & HOME Axle counter Reset logic proposed circuit can be Standard circuits for resetting have not
SIGNAL APPROACH added. yet been issued since it may vary from
LOGIC OEM to OEM. It will be dealt separately.

2.07 Sheet 5 MSDAC & HOME S01_AR logic SYSON contact can be proved, to Circuit has been modified accordingly.
SIGNAL APPROACH ensure AR will pickup after SYSON pickup.
LOGIC
2.08 Sheet 6 MSDAC & HOME S02_AR logic SYSON contact can be proved, to Circuit has been modified accordingly.
SIGNAL APPROACH ensure AR will pickup after SYSON pickup
LOGIC
2.09 Sheet 6 MSDAC & HOME ECR logic slow to releasse 2 second can be given Circuit has been modified accordingly.
SIGNAL APPROACH instead of 3 second as per RDSO std. ckt. ver. 2.0
LOGIC
2.10 Sheet 7,8 AUTO SIGNAL ECR S40HYR & S39HYR logic AUTO & MABS path can be To have better clarity in circuit, the MABS
LOGIC added and in MABS path track till mid-section TPR has been brought separately as a
modified auto single bit. The same is retained.
signal including overlap to be ensured. This will
reduce the I/O DISTRIBUTION BETWEEN AUTO HUT
& STN 'A/B'.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.11 Sheet 9 LEVEL CROSSING In LX42_YR logic 840DR, 840HHR, 840HR, 840DECR, Gate release logic may be generated as
GATE APPROACH 840HHECR, 840HECR, 845DR, 845HHR, 845HR, per the zonal railway practices. Line wise
LOGIC 845DECR, approch warning indication along with a
845HHECR, 845HECR drop contact can be ensured, if common buzzer shall be provided on the
the Approach lockking buzzer and indication not gate panel. Circuit has been modified
provided accordingly. Additional indications may be
on the Gate Panel. provided by Zonal Railways depending on
the LC gate release logic.

2.12 Sheet 9 LEVEL CROSSING The following bits to be added in I/O Distribution For providing the indications of LC gate
GATE APPROACH between Auto Hut & LX42 Location signal, bits mentioned under item no. 1 &
LOGIC 1. 840RECR, 840HECR, 840HHECR, 840DECR, 2 have been added in the I/O distribution.
840AMHECR, 840AGMHECR. Additional indications/ bits may be
2. 845RECR, 845HECR, 845HHECR, 845DECR, provided by Zonal Railways depending on
845AMHECR, 845AGMHECR. the LC gate release logic. Note for the
3. S840YR. same has been added in the circuits.
4. S845YR.
5. 840ACPR.
6. 845ACPR.
2.13 Sheet 9 LEVEL CROSSING The following bit nomenclature can be changed Already agreed in item 2.03 above. Since
GATE APPROACH 1. ADXR to DNAWR Up & DN AWR is being taken as output
LOGIC 2. AUXR to UPAWR bits from EI, common AWR circuit is not
3. ADMR to DNAR required. Necessary modifications in
4. AUMR to UPAR circuits have been done.
5. AR(W) to AWR

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.14 Sheet 9 LEVEL CROSSING I/O Distribution between Auto Hut & LX42 Location The I/O distribution between auto hut and
GATE APPROACH can be shown as separate sheet, next to I/O LX42 is shown along with the LC gate
LOGIC Distribution between Auto Hut & STN 'A' & B (Sheet circuits for better understanding.
4)
2.15 Sheet 10 DL MODIFIED ABS 1. S39_MABS_TPR & S40_MABS_TPR logic can be Item no. 1: It has already been discussed
LOGIC removed, since the MABS tracks can be ensured in in item no. 2.10 above. Item no. 2 & 3:
concerned SYSON has been added in the circuit.
HYR logic. This will reduce the I/O DISTRIBUTION MABS condition has not been added in the
BETWEEN AUTO HUT & STN 'A/B' circuit, since these are only status of
2. S39_MABS_TPR logic SYSON & STN_A- combined track detection sections.
B_UP_MABS to be ensured.
3. S40_MABS_TPR logic SYSON & STN_A-
B_DN_MABS to be ensured

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.16 Sheet 11 DL MODIFIED ABS 1. STN_A-B_UP_AUTO_LR logic stick path to be Since SYSON pickup contact is already
LOGIC proved parallel to SYSON contact also, since in some proved in AUTO_INT_J and MABS_INT_J
EI system circuits, same is not required to be proved
process drop before make concept, so when SYSON in AUTO_LR and MABS_LR circuits.
bit pickup it will drop STN_A-B_UP_AUTO_LR first SYSON drop contact has also been
instead of removedfrom the circuits since it is
holding by stick path. already proved in SYSINIT circuit. Circuits
2. STN_A-B_UP_AUTO_LR logic SYSINIT path SYSON have been modified accordingly.
drop contact to be removed as per RDSO Std. Ckt.
Ver 2.0.
3. STN_A-B_UP_MABS_LR logic stick path to be
proved parallel to SYSON contact also, since in some
EI system
process drop before make concept, so when SYSON
bit pickup it will drop STN_A-B_UP_MABS_LR first
instead of
holding by stick path.
2. STN_A-B_UP_MABS_LR logic SYSINIT path SYSON
drop contact to be removed as per RDSO Std. Ckt.
Ver 2.0.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.17 Sheet 11 DL MODIFIED ABS 1. STN_A-B_UP_AUTO_LR logic STNA_AUTO_HLTY_J This has already been discussed in item
LOGIC & STNB_AUTO_HLTY_J drop contact to be ensured to no. 1.07 above.
drop
STN_A-B_UP_AUTO_LR logic VDU or EI failed at
Station A or Station B, if AUTO/MABS Changeover
physical
switch not provided, since VDU or EI failed at Station
A or Station B SM will not have any option to change
the
AUTO/ MABS.
2. STN_A-B_UP_MABS_LR logic additional two paths
to be provided with STNA_AUTO_HLTY_J &
STNB_AUTO_HLTY_J contact, If AUTO/MABS
Changeover physical switch not provided means,
AUTO_LR &
MABS_LR circuit to be updated to enable MABS mode
during VDU or EI failed at Station A or Station B,
since MABS is the safest mode during failure.

2.18 Sheet 11 DL MODIFIED ABS 1. STNA_AUTO_HLTY_J & STNB_AUTO_HLTY_J logic Circuit proposed is for resetting of DAC
LOGIC proposed circuit mentioned. which is not covered in the given circuits.

2.19 Sheet 11 DL MODIFIED ABS STN_A-B_UP_AUTO_LPR & STN_A-B_UP_MABS_LPR Agreed. LPR circuit has been shifted to
LOGIC circuit to be moved to Interface Circuits. interface portion.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.20 Sheet 13 AUTO SIGNAL 1. S840 HR logic S840YPR contact to be ensured, Since LX_XCKPR proves LC gate in closed
CLEARANCE LOGIC since gate signal will be controlled from Gate Lodge. & locked condition, LCYR is not proved for
2. S840AMHR logic applicable only for MABS. signal clearance. Nomenclature of LCYR is
changed to LXAR to have more clarity.

2.21 Sheet 14 AUTO SIGNAL 1. S860 HHR logic S860HYR contact to be removed, Agreed. Circuit has been suitably
CLEARANCE LOGIC since and it's redundant proving and in other HHR modified.
logic not
proved.
2. S860 DR logic S860HYR, S860HHYR contact to be
removed, since and it's redundant proving and in
other DR logic not proved.

2.22 Sheet 15 AUTO SIGNAL 1. S845 HR logic S845YPR contact to be ensured, 1. Remarks same as given for item no.
CLEARANCE LOGIC since gate signal will be controlled from Gate Lodge. 2.20 above. 2. AMHR logic is applicable
2. S845AMHR logic applicable only for MABS. for both MABS as well as ABS sections.
Illuminated A marker has been corrected
as black colour in the layout diagram.

2.23 Sheet 16 AUTO SIGNAL & The following bit names can be changed Agreed. Required corrections have been
MSDAC 1. Signal bit names to be shown with prefix S. incorporated.
INDICATION LOGIC 2. TKE(W) to TKE.
3. TKE(R) to TKRE.
4. ACKE(G) to ACKE.
5. ACKE(R) to ACKRE.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.24 Sheet 16 AUTO SIGNAL & In Signal RGKE_FLASH logic HECR, HHECR & DECR Circuit is same as Std. Typical Ckt.
MSDAC drop contact can be ensured instead of HR drop Version 2.0 and hence has been retained.
INDICATION LOGIC contact, since
HR pickup time signal blank means RGKE will not
flash.
2.25 Sheet 17 AUTO SIGNAL 1. UP_SFR logic to be updated as per RDSO Std. Ckt. 1., 2. & 4.: Agreed. Circuit has been
FAILURE LOGIC Ver 2.0 SFR circuit. suitably modified. 3.: Illuminated A
2. UP_SFR bit name can be changed as STN_A- marker is applicable for both MABS as
B_UP_AUTO_SFR, since to clearly identify Auto signal well as ABS sections.
failure bit.
3. UP_SFR logic S845_AM proving applicable only for
MABS.
4. DN_SFR to be modified same as UP_SFR.

2.26 Sheet 18 AUTO SIGNAL FCOR FCOR logic slow to release 5 sec timer provided, but Suitable note has been added to indicate
LOGIC this timer will be different based on system that the actual logic provided is indicate
configuration, and it may vary OEM to OEM.
so clear notes to be mentioned.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
2.27 Sheet 18 AUTO SIGNAL FCOR 1. UP_FCOR bit name can be changed as STN_A- 1., 2., 3., 4. & 6.: Agreed. Circuits have
LOGIC B_UP_AUTO_FCOR, since to clearly identify Auto been suitably modified. 5. Illuminated A
signal FCOR marker is applicable for both MABS as
failure. well as ABS sections.
2. UP_FCOR logic S835DR, S835DECR duplicate
proving to be removed.
3. DN_FCOR logic S830 duplicate proving to be
removed.
4. DN_FCOR logic S850 & S860 signal provings to be
added.
5. UP_FCOR logic S845_AM proving applicable only
for MABS.
6. DN_FCOR to be modified same as UP_FCOR.
2.28 Sheet 18 AUTO SECTION The following bit names can be changed Agreed. Required corrections have been
MSDAC FAILURE 1. UP_A_AC_FAIL to STN_A-B_UP_AUTO_A_AC_FAIL incorporated.
LOGIC 2. UP_B_AC_FAIL to STN_A-B_UP_AUTO_B_AC_FAIL
3. UP_ACFR to STN_A-B_UP_AUTO_ACFR
4. DN_A_AC_FAIL to STN_A-
B_DN_AUTO_A_AC_FAIL
5. DN_B_AC_FAIL to STN_A-
B_DN_AUTO_B_AC_FAIL
6. DN_ACFR to STN_A-B_DN_AUTO_ACFR

3 AUTOMATIC SIGNALLING SECTION EI INTERFACE CIRCUIT

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
3.01 Sheet 20 AUTO SECTION EI 1. S850, S845, S855 signal output circuit to be 1. Signal output circuit has been shown
OC AT AUTO HUT shown. for S840. Similar circuit will be applicable
2. S840AMHR circuit applicable only for MABS. for all other signals. Suitable note has
been added. 2. Illuminated A marker is
applicable for both MABS as well as ABS
sections.
3.02 Sheet 22 & AUTO SECTION EI 1. SPARE bits relay contact circuit to be removed. 1. Agreed. Circuits have been suitably
23 OC AT AUTO HUT 2. S840AMHECR circuit applicable only for MABS. modified. 2. Illuminated A marker is
applicable for both MABS as well as ABS
sections.
3.03 Sheet 24 & AUTO SECTION EI 1. SPARE bits relay circuit to be removed. Agreed. Circuits have been suitably
25 OC AT AUTO HUT modified.
3.04 Sheet 25 AUTO SECTION EI The following Bit nomenclature can be changed Agreed. Circuits have been suitably
OC AT AUTO HUT 1. UP_AC_FAIL to STN_A-B_UP_AUTO_AC_FAIL modified.
2. UP_AUTO_SFR to STN_A-B_UP_AUTO_SFR
3. UP_FCOR to STN_A-B_UP_AUTO_FCOR

4 AUTOMATIC SIGNALLING SECTION SIGNAL LOCATION CIRCUIT

4.01 Sheet 31 AUTO SIGNAL LAMP 1. Circuit title can be given as AUTO SIGNAL Agreed. Necessary corrections have been
CIRCUIT LIGHTING CIRCUIT as per RDSO Std. Ckt. Ver 2.0. done accordingly.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
4.02 Sheet 31 AUTO SIGNAL LAMP 1. DGE circuit HHR contact can be ensured. 1. Agreed. Circuits have been suitably
CIRCUIT 2. RGE circuit OFFECPR drop contact in series with modified. 2. & 3. Since sufficient back
HECR drop can be ensured to avoid cascading time contacts are not there in ECR for using in
RGE signal lighting circuits, ECPRs will have to
lighting. be picked up externally. These ECPRs will
3. OFFECPR proposed circuit to be added. be made slow to release and the same
will be used in the RG aspect signal
lighting circuit in place of ECRs. This will
address the issue of signal momentarily
going to red aspect when switching
between off aspect takes place. Circuits
have been suitably modified.

5 STATION A LOGIC/ RRI CIRCUIT

5.01 Sheet 32 AUTO SIGNAL & 1. S860 HHYR logic S860HYR contact to be removed, 1., 2. & 4.: Agreed. Circuit has been
AUTO/MABS since and it's redundant proving. suitably modified. 3. Duplicate circuit has
CONTROL LOGIC 2. S860 DYR logic S01HHR, S860HYR, S860HHYR been removed.
contact to be removed, since and it's redundant
proving.
3. S01_HH_D_ECR circuit duplicate to be removed.
4. ECR logic Slow to release 3 sec to be changed to
slow to release 2 sec as per RDSO Std. Ckt. Ver 2.0.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
5.02 Sheet 32 AUTO SIGNAL & 1. SMKEY contact proving to be shown in STN- 1. & 2. Agreed. Circuits have been
AUTO/MABS A_UP_AUTO_INT, STN-A_DN_AUTO_INT, STN- modified.
CONTROL LOGIC A_UP_MABS_INT,
STN-A_DN_MABS_INT logic.
2. The name INT can be changed as INI, since these
name given for Initiation and INT most of logic used
as INTERNAL naming.

5.03 Sheet 33 LSS HR & FAILURE 1. MR, FAIL_BUZ & FAIL_KE logic SYSON contact to Agreed.
INDICATIONS be ensured.

5.04 LX42_AUXR1 circuit to be added. Circuit has now been added in

"modification in station circuit for
introduction of ABS".
6 STATION B LOGIC/ RRI CIRCUIT
6.01 Sheet 34 AUTO SIGNAL & 1. S835 HHYR logic S835HYR contact to be removed, Agreed. Circuits have been modified.
AUTO/MABS since and it's redundant proving.
CONTROL LOGIC 2. S835 DYR logic S01HHR, S835HYR, S835HHYR
contact to be removed, since and it's redundant
proving.
3. ECR logic Slow to release 3 sec to be changed to
slow to release 2 sec as per RDSO Std. Ckt. Ver 2.0.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
6.02 Sheet 34 AUTO SIGNAL & 1. SMKEY contact proving to be shown in STN- Agreed. Circuits have been modified.
AUTO/MABS B_UP_AUTO_INT, STN-B_DN_AUTO_INT, STN-
CONTROL LOGIC B_UP_MABS_INT,
STN-B_DN_MABS_INT logic.
2. The name INT can be changed as INI, since these
name given for Initiation and INT most of logic used
as INTERNAL naming.

6.03 Sheet 35 1. MR, FAIL_BUZ & FAIL_KE logic SYSON contact to Agreed. Circuits have been modified.
be ensured.
6.04 Sheet 36 LX42_ADXR1, LX42_ADMR1 circuit to be added. Circuit has now been added in
"modification in station circuit for
introduction of ABS".
PROPOSED STANDARD TYPICAL CIRCUITS FOR AUTOMATIC BLOCK SIGNALLING ON
SINGLE LINE SECTION
7 AUTOMATIC SIGNALLING SECTION EI LOGIC CIRCUIT

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
7.01 Sheet 1 Axle counter track 1. Axle counter track name can be mentioned with 1. Agreed. 2. & 3.: Given name is
name AC instead of TS like 39AC to clearly indicate the indicative and Zonal Railways may decide
Track the name. Note has been suitably
section is Axle counter. modified. 4. No change is required.
2. Track section name can be changed with 2 signal
numbers since every track section is common for 2
signals
like S35-S36AC instead of S36TS.
3. Singal name can be mentioned with prefix S
instead of M like S865 instead of M865, since station
signals
mentioned with prefix S.
4. BI-DIRECTIONAL AUTO BLOCK button 'BLOCK'
name can be changed as 'COMMON DIRECTION
INITIATION' as per AUTO/ MABS CHANGEOVER.

7.02 Sheet 3 BI DIRECTIONAL 1. In Direction Initiation Starter Normal to be Since proving direction of traffic (DOT) for
AUTOMATIC ensured. clearing starter signal and vice-versa is
SIGNALLING DOT 2. In Direction Acknowledge Starter Normal to be not mandated as per any rules, the same
SETTING ensured. has not been proved. Circuits have been
modified accordingly in sheet 37 & 41. In
addition, proving of AMLR back contact of
UP home signal in the circuit of DN_ACK
in DN home signal has been done.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
7.03 Sheet 4 I/O Distribution Axle counter Reset command and LVR bits to be Standard circuits for resetting have not
between Auto Hut & considered yet been issued since it may vary from
STN 'A' & B The following Bits to be added between AUTO Hut OEM to OEM. It will be dealt separately.
and STN 'A' I/O distribution
1. STN_A-B_UPAC_RST_INI (STN 'A' to STN 'B' Up
direction Axle counter reset initiation)
2. STN_A-B_DNAC_LVR (STN 'A' to STN 'B' Down
direction Block section clear line verification)
3. STN_A-B_UPAC_LVR_J (STN 'A' to STN 'B' Up
direction Block section clear line verification with
Slow to
Release)
The following Bits to be added between AUTO Hut
and STN 'B' I/O distribution
1. STN_A-B_DNAC_RST_INI (STN 'A' to STN 'B'
Down direction Axle counter reset initiation)
2. STN_A-B_UPAC_LVR (STN 'A' to STN 'B' Up
direction Block section clear line verification)
3. STN_A-B_DNAC_LVR_J (STN 'A' to STN 'B' Down
direction Block section clear line verification with
Slow to
Release)

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
7.04 Sheet 4 I/O Distribution The following Bit nomenclature can be changed Bit nomenclature has been suitably
between Auto Hut & between AUTO Hut and STN 'A' I/O distribution modified.
STN 'A' & B 1. BLOCK SEC UP MSDAC FAIL to STN_A-B_ACFR
2. UP_SFR to STN_A-B_UP_AUTO_SFR
3. UP_FCOR to STN_A-B_UP_AUTO_FCOR
4. UP_DOT to STN_A-B_UP_DOT
5. DN_DOT to STN_A-B_DN_DOT
6. LX2 AUXR1 to LX42_UPAWR
The following Bit nomenclature can be changed
between AUTO Hut and STN 'B' I/O distribution
1. BLOCK SEC DN MSDAC FAIL to STN_A-B_ACFR
2. DN_SFR to STN_A-B_DN_AUTO_SFR
3. DN_FCOR to STN_A-B_DN_AUTO_FCOR
4. UP_DOT to STN_A-B_UP_DOT
5. DN_DOT to STN_A-B_DN_DOT
6. LX2 ADXR1 to LX42_DNAWR
7. LX2 ADMR1 to LX42_DNAR
The name INT can be changed as INI, since these
name given for Initiation and INT most of logic used
as INTERNAL naming.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
7.05 Sheet 4 I/O Distribution EI System Healthy & VDU Healthy of Station A & B Requirement for providing these
between Auto Hut & bits to be considered additional bits is not clear since these
STN 'A' & B The following Bits to be added between AUTO Hut information are already made available on
and STN 'A' I/O distribution the auto section EI VDU provided on both
1. STN-A_AUTO_HLTY (STN 'A' EI System & VDU the stations.
Healthy)
The following Bits to be added between AUTO Hut
and STN 'B' I/O distribution
1. STN-A_AUTO_HLTY (STN 'A' EI System & VDU
Healthy)
7.06 Sheet 8 AUTO SIGNAL ECR S12HYR & S35HYR logic AUTO & MABS path can be To have better clarity in circuit, the MABS
LOGIC added and in MABS path track till mid-section TPR has been brought separately as a
modified auto single bit. The same is retained.
signal including overlap to be ensured. This will
reduce the I/O DISTRIBUTION BETWEEN AUTO HUT
& STN 'A/B'
7.07 Sheet 10 DL MODIFIED ABS 1. S35_MABS_TPR & S12_MABS_TPR logic can be Item no. 1: It has already been discussed
LOGIC removed, since the MABS tracks can be ensured in in item no. 7.06 above. Item no. 2 & 3:
concerned SYSON has been added in the circuit.
HYR logic. This will reduce the I/O DISTRIBUTION MABS condition has not been added in the
BETWEEN AUTO HUT & STN 'A/B' circuit, since these are only status of
2. S35_MABS_TPR logic SYSON & STN_A- combined track detection sections.
B_BD_MABS to be ensured.
3. S12_MABS_TPR logic SYSON & STN_A-
B_BD_MABS to be ensured.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
7.08 Sheet 12 1. In LX2_AUXR, LX2_ADXR, LS2_ADMR logic 1. M555ACPR has been added in
M555ACPR to be ensured. LX2_ADMR logic. The following note has
2. LX2AUXR logic LC42AUXR1 to be renamed as been added in the circuit "Where separate
LX2UPAWR1. back locking circuits are used by Zonal
3. LX2ADXR logic LC42ADXR1 to be renamed as Railways for opening of LC gate, the track
LX2DNAWR1. circuits in advance of the signal protecting
the LC gate shall also be proved in those
circuits". 2. & 3. Agreed and the circuits
have been suitably modified.

7.09 Sheet 14 In M555HR logic MA557ACPR to be proved instead of Agreed and circuit has been modified
M557ACPR in MABS path. accordingly.
8 STATION A LOGIC/ RRI CIRCUIT FOR BI DIRECTIONAL AUTO WORKING

8.01 Sheet 35 Axle counter track 1. BI-DIRECTIONAL AUTO BLOCK button 'BLOCK' No change is required.
name name can be changed as 'COMMON DIRECTION
INITIATION' as
per AUTO/ MABS CHANGEOVER.
9 PROPOSED MODIFICATION IN STATION CIRCUIT FOR INTRODUCTION OF AUTOMATIC
BLOCK WORKING
9.01 Sheet 1 Axle counter track 1. BI-DIRECTIONAL AUTO BLOCK button 'BLOCK' No change is required.
name name can be changed as 'COMMON DIRECTION
INITIATION' as per AUTO/ MABS CHANGEOVER.

9.02 Page 36 of 17AMGNR 17AMGNR bit name to be changed as AMGNR, since To maintain uniformity, AMGNR has been
174 it's a common group button relay. made as a common button. Circuits have
been suitably modified.

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Sl. Chapter/ Standard Typical Circuit Observations Remarks of Standing Committee

No. Page No. Circuit
Requirement
9.03 Page 49A of S17_AMLR, 1. S17_02LR logic 17AMGNR name to be changed as 1. AMGNR is proved in S17AMLR circuit
174 C17_02LR AMGNR. and not in S17_02LR. Required
2. C17_02LR logic TSR to be ensured. modification has been done in S17AMLR
circuit. 2. UYR1 has now been added in
C17_02LR similar to main signals.

9.04 Page 105 of 17HR/UHR/ECPR, The following bitnames can be changed to match Agreed. Required corrections have been
174 27ECPR RELAY with Auto Section EI logic incorporated to match with the
CIRCUITS 1. 17_ECPR to 17_ECR nomenclature adopted for automatic
2. 17_OFFECR to 17_H_HH_D_ECR signalling circuits.
3. 27_OFFECR to 27_H_HH_D_ECR

9.05 Page 117 of S17 MAIN SIGNAL 1. DGE circuit HHR contact can be ensured. Remarks same as given in item 4.02
174 LIGHTING CIRCUIT 2. RGE circuit OFFECPR drop contact in series with above. Circuits have been modified
HECR drop can be ensured to avoid cascading time accordingly.
RGE
lighting.
3. OFFECPR proposed circuit to be added.

Page 25 of 25
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 Remarks on comments received from M/s Hitachi on final draft automatic signalling circuits

Page Remarks of Standing

SN Description HRSTS Comments
No. Committee
a) In VDU Layout, AxCo Occupancy
Status can be further simplified with
single bubble indication with 3 colour
display with RDSO proposed colour
coding. This proposal is to avoid
clumsiness & multiwindow display in
case of larger section or at CTC end.
During failure of single axle
counter, both preparatory and
fail indication are required to
5 of be displayed together which
1
119 can not be achieved in the
proposed arrangement and
hence, the existing
arrangement is retained.

b) Furthermore, redundant AxCo

unoccupied status in the Bubble Green
may be avoided as overall Track
occupancy status will be available in
track section itself.

Page 1 of 8
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 Remarks on comments received from M/s Hitachi on final draft automatic signalling circuits

Page Remarks of Standing

SN Description HRSTS Comments
No. Committee

a) AxCo auto-resetting circuit may be

included as part of ABS standard Circuit
through EI/VDU in case of any of
redundant (‘A’ or ‘B’) failure.
Standard circuits for resetting
b) In case of Preparatory reset, VDU
5 of have not yet been issued since
2 ABS section AxCo auto resetting from EI operation may be included.
119 it may vary from OEM to OEM.
c) In case both main and redundant axle
It will be dealt separately.
counter fails, axle counter reset co-
operation working needs to be included
which will be required to be standardized
from OEM Specific.

a) Connectivity colour coding may vary

system to system and configuration to
The automatic signalling
configuration. Hence, flexibility to be
scheme based on EI and OCs
considered for solution like Microlok II,
taken in standard typical circuit
where instead of OC, EI to consider in
in only indicative for
6 & 7 of ABS Hut for ABS EI logic. In place of
3 preparation of standard typical
119 Auto Section OC at Station B, EI to be
circuits. This has already been
considered to avoid complete auto
clarified in the brief on
section failure in case of Station “A” EI
proposed final draft standard
failure.
typical circuits in para 4.
b) ABS hut MPVDU display will be same
as station ABS OPVDU.

Page 2 of 8
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 Remarks on comments received from M/s Hitachi on final draft automatic signalling circuits

Page Remarks of Standing

SN Description HRSTS Comments
No. Committee

a) We request you to kindly clarify the

below.
“Is bottom yellow failed during double-
No change in existing circuit is
11 & 38 yellow aspect allowed for passing the
4 mandated for the situation
of 119 train which is currently restricted by few
pointed out.
ZR operation teams” or else suitable
interlocking contact to be proved.
b) Hitachi is ok with current proposal.

a) We find that ADXR1, ADMR1, AUXR1

& AUMR1 are missing in these circuits. Required modifications have
14 of we request you to include them.
5 been incorporated in the
119
circuits.

Agreed. Repeater relay for

a) Self-drop contact is used in pickup UP/DN_AUTO_LPR and
path for latch relay. Hence interim UP/DN_MABS_LPR has been
failure may be surfaced. Ensure break picked up and its contact has
16 of before making, LPPR or LBPR contact been used as suggested in the
6
119 may be used respective pick up coil circuits.
Similar changes have been
incorporated in the
BD_AUTO_LPR and
BD_MABS_LPR circuits.

Page 3 of 8
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 Remarks on comments received from M/s Hitachi on final draft automatic signalling circuits

Page Remarks of Standing

SN Description HRSTS Comments
No. Committee
Please clarify the below.
“Purpose of marked path is not clear.
These contacts are proved to
This path has been provided to restrict
18 of prevent the picking up of HR if
7 picking up of HR in case of false
119 previously picked up OFFECRs
feed/failure. In that case HR will pick up
are not normalised.
immediately after dropping of
unintended OFFECR”.

To address this issue the circuit

Please clarify the below.
has been modified by having
“AC_FAIL bit will not drop until complete
separate AC_FAIL for individual
section is free after rectification of track.
24 of track sections.
8 If any train entering to the block section
119
after successful reset, AC_FAIL bit will
The common AC_FAIL relay
remain energized through self-stick
circuit has been modified
path”
accordingly.

Page 4 of 8
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 Remarks on comments received from M/s Hitachi on final draft automatic signalling circuits

Page Remarks of Standing

SN Description HRSTS Comments
No. Committee
a)
In addition, we propose that QBCA1
relay may be used for FCOR & HD front
contact to be used for signal feeding 110
VAC supply for OFF aspect.
b)
Purpose for sending FCOR bit status to a) Additional use of FCOR will
Sation need to be clarified with relevant be OEM specific and as such
circuits. existing arrangement is
retained in proposed standerd
8, 31 &
circuit.
9 34 of
119
b) The purpose of sending
FCOR bit to station is for
indication and alerting the
ASM.

Page 5 of 8
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 Remarks on comments received from M/s Hitachi on final draft automatic signalling circuits

Page Remarks of Standing

SN Description HRSTS Comments
No. Committee

a)
Timer values for ABS & Station ECPR
relays or shown as 3 sec & 2 sec
respectively, whereas we propose this
should be kept the same as 3 SEC.
a) Timer values have been
b)
corrected as per
Timer value needs to be re-visited for
12 & ver-2.0.
the case of ECR Inputs are coming from
10 100 of
other EI/RRI through external relay to
119 b) Since ECR,s are made slow
avoid blanking of signals. (Up to 5 Sec
to release this issue may not
may be considered)
arrive.

a)
Typo error, AMHR signal number to be
rectified as S845.

20 of a) Typo error has been

11
119 corrected.

Page 6 of 8
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 Remarks on comments received from M/s Hitachi on final draft automatic signalling circuits

Page Remarks of Standing

SN Description HRSTS Comments
No. Committee
a)
Whether the level crossing emergency
control & Sliding Boom shall be
controlled by Stationmaster or Gate
Man?
12 5 Please note that in current NCR practice a) These can be decided as per
Level crossing emergency key the Zonal railways practices.
release/lock control & indications are in
the Station VDU.

a)
Please clarify the below.
6 of “Whether ABS VDU at station will be part a) ABS VDU will be separate
13 General
119 of Station VDU or separate VDU to be VDU.
provided for ABS section over & above
Station VDU?”
a)
We propose that HR pickup with all OFF a) Suggested change is not in
21 of aspect ECR drop condition may be added
14 line with ver-2.0
119 in parallel to HR drop condition to Hence not considered.
provide Signal no light condition with HR
pickup condition
a)
As the standard circuits being followed
15 General for stations indicating EI nomenclatures, a) Same has been adopted.
the standard circuits same shall be
Followed for ABS circuits also.

Page 7 of 8
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 Remarks on comments received from M/s Hitachi on final draft automatic signalling circuits

Page Remarks of Standing

SN Description HRSTS Comments
No. Committee
a)
Emergency direction change for
48 of a) Not considered, since same
16 Reversible line operation reversible line provision is not provided
119 is not mandated as per SEM.
during track failure condition. Same
provision may be considered.

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