Unit1 Lecture 2 Introduction Package Assembly Process
Unit1 Lecture 2 Introduction Package Assembly Process
Assembly Processes
Chapter-1 (Lecture-2)
1
Memory Evolution
2
Semiconductor/IC Packaging
• Semiconductor packages are designed to allow the Semiconductor die to communicate with the outside world
Bondpad
Credit: https://www.macdermidalpha.com/semiconductor-solutions/
Credit: https://www.powerwaywafer.com/polycrystalline-silicon-wafers.html products/plating-copper/microfab-spm-1100
Substrate Strip/Interposer Die stacking and interconnecting on Molded IC packaging IC Package (example)
substrate (Entire Substrate/strip form)
(unit level)
Credit: https://www.pcbmay.com/ic-substrate/
Credit: https://www.semanticscholar.org/paper/INVESTIGATION-OF-WARPAGE-INDUCED-ON-
MOLDED-STRIP-OF-Mokhtar-Rasid/bc2ba8c870f31f79b5769f45157771c8a65b6e0e
Plasma Plasma
treatment Treatment
Die
Preparation Die Attach Automated
Incoming Wire Bond Encapsulation Laser Mark Ball Attach Singulation Visual
Wafer (Thinning (and Cure) (Interconnect) and Baking Inspection
and Dicing)
Substrate
with
Capacitor /
Controller
Attach
Wafer Tape
Laser Groove
Oven Cure
Plasma Clean 1
Wire Bond
Wafer Thinning
Wafer Saw
Wafer Mount
Plasma Clean 2
Singulation
BGA Bake
Credit: https://emsxchange.com/baking-process-of-pcb-and-its-components/
https://www.besi.com/products-technology/product-details/product/fico-sawing-line/#tabs-220 7
https://www.directindustry.com/prod/kla-tencor/product-113449-2029539.html
Why Memory/Semiconductor Packaging is Challenging
• Memory packages Deals with die thickness ranging from 300 um – 30um (Incoming wafer thickness 800-900 um)
Wire Bond – ~ 400 wires 15-18 um Mold – Powder Molts Compression (PMC)
8
Packaging Assembly Process Flow
Plasma Plasma
treatment Treatment
Die
Preparation Die Attach Automated
Incoming Wire Bond Encapsulation Laser Mark Ball Attach Singulation Visual
Wafer (Thinning (and Cure) (Interconnect) and Baking Inspection
and Dicing)
Surface Mount
Substrate + DCA
(Optional)
Electrical
Test
Wafer
Thickness
Wafer Detape Wafer Mount Measurement
• Back grinding is the main process that remove excess silicon material
• Polishing removes the mechanical damages generated by thinning; typically used for thin wafer applications
10
Wafer Dicing
• Wafer Dicing : A process of singulating wafer into individual dies for electronic packaging
Ref:
Hamamatsu Photonics
11
Packaging Assembly Process Flow
Plasma Plasma
treatment Treatment
Die
Preparation Die Attach Automated
Incoming Wire Bond Encapsulation Laser Mark Ball Attach Singulation Visual
Wafer (Thinning (and Cure) (Interconnect) and Baking Inspection
and Dicing)
Surface Mount
Substrate + DCA
(Optional)
Electrical
Test
• Die attach is the process of removing singulated dies from the wafer and attaching them to the interposer
by use of adhesive (Die attach film).
Types of Adhesives
➢ Die Attach Film (DAF)
- Taped onto the back of the wafer/die
- certain DAFs will need oven cure after die attach
➢ Film Over Wire (FOW)
- taped onto the back of the wafer/die
- needs oven cure after die attach
➢ Epoxy paste
- dispensed onto the interposer
- needs oven cure after die attach
13
Die Stacking Configurations
Wire-bond location
OR
Direct Shingled Stack Reverse Shingle on Shingled on Shingled Stack Flip-flop Stack Same Size Die Stacking
shingled Stack (RSOS)
14
Packaging Assembly Process Flow
Plasma Plasma
treatment Treatment
Die
Preparation Die Attach Automated
Incoming Wire Bond Encapsulatio Laser Mark Ball Attach Singulation Visual
Wafer (Thinning (and Cure) (Interconnect) n and Baking Inspection
and Dicing)
Surface Mount
Substrate + DCA
(Optional)
Electrical
Test
✓ Plasma before wire bond to remove the contaminants any on bond pads
Credit: https://industrial.panasonic.com/kr/products-fa/solution/plazma-cleaner
16
Packaging Assembly Process Flow
Plasma Plasma
treatment Treatment
Die
Preparation Die Attach Automated
Incoming Wire Bond Encapsulatio Laser Mark Ball Attach Singulation Visual
Wafer (Thinning (and Cure) (Interconnect) n and Baking Inspection
and Dicing)
Surface Mount
Substrate + DCA
(Optional)
Electrical
Test
2nd Bond
18
https://www.protoexpress.com/blog/wire-bonding-efficient-interconnection-technique/
Impact on stack-up on DA and Wirebond passes
SBS 8DS
1 pass DA + 1 pass WB
2x8RSOS
2 pass DA + 2 pass WB
4x4RSOS
4 pass DA + 4 pass WB
DA: Die Attach
WB: Wirebond
SBS: Side by SIDE
SOS- Shingle on Shingle
8x2RSOS
RSOS: Reverse Shingle on Shingle 8 pass DA + 8 pass WB
19
Packaging Assembly Process Flow
Plasma Plasma
Treatment Treatment
Die
Preparation Die Attach Automated
Incoming Wire Bond Encapsulation Laser Mark Ball Attach Singulation Visual
Wafer (Thinning (and Cure) (Interconnect) and Baking Inspection
and Dicing)
Surface Mount
Substrate + DCA
(Optional)
Electrical
Test
Encapsulation as its name suggest, it is to form a protection barrier of epoxy mold compound to cover up the
silicone die and wire in the memory chip.
Encapsulant
(Epoxy resin)
21
Packaging Assembly Process Flow
Plasma Plasma
treatment Treatment
Die
Preparation Die Attach Automated
Incoming Wire Bond Encapsulation Laser Mark Ball Attach Singulation Visual
Wafer (Thinning (and Cure) (Interconnect) and Baking Inspection
and Dicing)
Surface Mount
Substrate + DCA
(Optional)
Electrical
Test
3
2
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Packaging Assembly Process Flow
Plasma Plasma
Treatment Treatment
Die
Preparation Die Attach Wire Bond Automated
Incoming Encapsulatio Laser Mark Ball Attach Singulation Visual
(Interconnect
Wafer (Thinning (and Cure) n and Baking Inspection
)
and Dicing)
Surface Mount
Substrate + DCA
(Optional)
Electrical
Test
• Ball Attach is to attach the solder balls permanently on the ball pads of the interposer
• This is achieved with temperature reflow (application of pre-determined heat for a duration of time) after
solder balls have been placed on the ball pads.
• The solder ball will form a metallic joint with the ball pad
25
Packaging Assembly Process Flow
Plasma Plasma
treatment Treatment
Die
Preparation Die Attach Automated
Incoming Wire Bond Encapsulation Laser Mark Ball Attach Singulation Visual
Wafer (Thinning (and Cure) (Interconnect) and Baking Inspection
and Dicing)
Surface Mount
Substrate + DCA
(Optional)
Electrical
Test
Process control:
Package Dimension X & Y (Customer form fit function)
Plasma Plasma
treatment Treatment
Die
Preparation Die Attach Automated
Incoming Wire Bond Encapsulation Laser Mark Ball Attach Singulation Visual
Wafer (Thinning (and Cure) (Interconnect) and Baking Inspection
and Dicing)
Surface Mount
Substrate + DCA
(Optional)
Electrical
Test
Assembly Test
AVI
What do we do?
Package Visual Inspection (PVI) Inspects for gross external package defect
caused by:
• OS Testing
• Upstream processes (Encapsulation, Laser, Ball Attach, Singulation)
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