EE503 Topic 5
EE503 Topic 5
Introduction
Chips that pass the wafer sort test undergo final assembly and packaging. IC final assembly separates each good die from the wafer and attaches the die to a metal leadframe or substrate. IC packaging encloses the die in a protective package.
Backgrind reduces the wafer thickness to the appropriate dimension. Die separation cuts each die from the wafer. Die attach is the physical attachment of the die to the leadframe or substrate. Wirebonding attaches fine-diameter wires between die bonding pads and the terminals of the leadframe to form electrical connections. All assembled and packaged chips undergo a final electrical test for IC reliability.
Thermocompression Bonds
Functions of IC packaging
1. Protection from the environment and handling damage. 2. Interconnections for signals into and out of the chip. 3. Physical support of the chip. 4. Heat dissipation.
(encapsulation)
IC packaging material
1. Plastic
Plastic packaging uses an epoxy polymer to encapsulate the wirebonded die and leadframe. This technology has many different types of plastic packages.
2. Ceramic
Ceramic packaging is used for state-of-the-art IC packages that require either maximum reliability or high-power. The two main types of ceramic packaging are either a refractory (high temperature) ceramic or ceramic DIP (CERDIP) technology. Both have a hermetic seal (sealed against moisture).
3. Metal
Plastic Packages
CERDIP Package
Flip chip packaging mounts the active side of a chip toward the substrate. It uses bump technology (typically solder bumps) to form the interconnection between the chip and substrate. An epoxy underfill is used around the area-array of bumps to improve reliability.
Ball grid array (BGA) uses a ceramic or plastic substrate with an area array of solder balls to connect the substrate to the circuit board. To lower costs, this technology is readily integrated into standard surface mount assembly.
Multichip module (MCM) has several die assembled onto one substrate. This permits a higher density of chips.
Chip on board (COB) mounts IC chips directly to the substrate, along side other surface mount (SMT) or pin-in-hole (PIH) components.
Tape automated bonding (TAB) uses a plastic tape as a chip carrier. The tape has a thin copper foil that is etched to form the leads. The chip and leads are removed from the carrier prior to assembly onto the circuit board.
Chip scale packaging (CSP) has an IC package that is about the same size as the silicon chip (< 1.2 times the footprint of the die). This is a fast growing method of advanced packaging, and provides for lower cost, lower weight and lower thickness.