Computer Architecture and Organization

Computer architecture and organization involve the design, functionality, and operation of computer systems,
including the CPU, memory, input/output (I/O) devices, and how they are connected and interact. Below is a
detailed explanation of the key components.

1. Machine Instructions and Addressing Modes

Machine Instructions are the basic commands executed by a computer's central processing unit (CPU). Each
instruction is composed of an opcode (operation code) and the operands (data or address of the data to be
operated upon).

Common Types of Instructions:

• Arithmetic: Add, subtract, multiply, divide.

• Data Movement: Move data between registers, memory, or I/O devices.

• Control: Jump, branch, halt, etc.

Addressing Modes specify how to locate the operands for instructions. Common addressing modes include:

1. Immediate Addressing: The operand is directly specified in the instruction.

o Example: MOV R1, #5 (Move immediate value 5 to register R1).

2. Direct Addressing: The operand’s memory address is specified in the instruction.

o Example: MOV R1, [1000h] (Move value at memory address 1000h to R1).

3. Indirect Addressing: The instruction specifies a register or memory location that contains the address
of the operand.

o Example: MOV R1, [R2] (Move value at address stored in R2 to R1).

4. Register Addressing: The operand is located in a register.

o Example: MOV R1, R2 (Move the value from register R2 to register R1).

5. Indexed Addressing: A register value is added to the base address to get the operand’s address.

o Example: MOV R1, [R2 + 5] (Move value from memory at address (R2+5) to R1).

2. ALU and Data Path

Arithmetic and Logic Unit (ALU):

The ALU performs arithmetic (addition, subtraction, multiplication) and logical (AND, OR, NOT) operations. It is
a critical component of the CPU.
Data Path:

The data path refers to the paths through which data flows between registers, ALU, memory, and I/O devices.
The data path involves various components:

• Registers: Temporarily hold data during processing.

• Multiplexers: Select data sources for different parts of the data path.

• ALU: Performs the actual computation.

• Control Signals: Direct the flow of data and operations in the data path.

3. Register Transfer Language (RTL)

Register Transfer Language (RTL) is a formal way of describing the operations of a CPU in terms of data
transfer between registers. It specifies the movement of data, the operations performed on the data, and the
conditions under which these actions occur.

For example:

• R1 ← R2 + R3 means "Transfer the sum of registers R2 and R3 to register R1".

• R2 ← M[1000h] means "Transfer the value from memory location 1000h to register R2".

4. Hardware and Microprogrammed Control

Control Unit manages the execution of instructions by generating control signals that coordinate the
operations of the CPU. There are two main types of control mechanisms:

• Hardwired Control: Uses fixed logic circuits to generate control signals based on the instruction type. It
is faster but less flexible.

• Microprogrammed Control: Uses a set of microinstructions stored in memory (microcode) to generate

5. Memory Interface

The memory interface facilitates communication between the CPU and memory. It includes:

• Memory Address Register (MAR): Holds the address of the memory location to read/write.

• Memory Buffer Register (MBR): Holds data being transferred to or from memory.

• Control Unit: Directs the memory read and write operations.

• RAM (Random Access Memory):

o Volatile memory, which loses its contents when the system is powered off.

o Used to store data and programs that are currently being executed.

o Types of RAM:

▪ Dynamic RAM (DRAM): Needs periodic refreshing.

▪ Static RAM (SRAM): Faster than DRAM, does not need refreshing.

• ROM (Read-Only Memory):

o Non-volatile memory, which retains its contents even when the system is powered off.

o Used to store firmware or permanent instructions.

o Types of ROM:

▪ PROM (Programmable ROM): Can be programmed once.

▪ EPROM (Erasable Programmable ROM): Can be erased and reprogrammed using UV

▪ EEPROM (Electrically Erasable Programmable ROM): Can be erased and reprogrammed

7. I/O Interface (Interrupt and DMA Modes)

Interrupts:

An interrupt is a signal that temporarily halts the CPU's current task to give priority to other tasks. The CPU
saves its current state, processes the interrupt, and then resumes the interrupted task.

• Types of Interrupts:

o Hardware Interrupt: Triggered by external hardware devices.

o Software Interrupt: Generated by software instructions.

DMA (Direct Memory Access):

DMA is a mode of data transfer that allows peripherals to communicate with memory without involving the
CPU. It speeds up data transfer and reduces CPU load.

8. Serial Communication Interface

• Protocols: UART, SPI, I2C, and others.

• Advantages: Fewer wires and simpler physical setup compared to parallel communication.

• Disadvantages: Slower speed compared to parallel communication.

9. Instruction Pipelining

Instruction pipelining is a technique where multiple instruction stages are overlapped. It allows the CPU to
execute multiple instructions concurrently by breaking them into stages, such as:

1. Fetch: Instruction is fetched from memory.

2. Decode: Instruction is decoded to determine the operation.

3. Execute: The operation is performed.

4. Write-back: The result is written back to the register or memory.

10. Cache Memory

Cache memory is a small, high-speed memory placed between the CPU and main memory to store frequently
accessed data or instructions. It helps reduce the time the CPU needs to access data from the slower main
memory.

• Levels of Cache:

o L1 Cache: Directly connected to the CPU core.

o L2 Cache: May be located on the CPU or nearby on the motherboard.

o L3 Cache: Shared by all cores on multi-core processors.

11. Main and Secondary Memory Storage

• Main Memory (RAM): Volatile storage used to store data that is currently in use by the CPU.

• Secondary Memory: Non-volatile storage used for long-term data storage.

o Examples: Hard Disk Drives (HDDs), Solid-State Drives (SSDs), optical discs, etc.

12. Organization and Structure of Disk Drives

Disk drives are used for secondary storage. The basic components include:
 • Platters: Disk surfaces where data is stored.

• Tracks: Concentric circles on the disk where data is written.

• Sectors: Subdivisions of a track.

• Read/Write Head: A head that moves over the disk surface to read and write data.

• Spindle: Rotates the disk platters.

13. RAID Architectures

RAID (Redundant Array of Independent Disks) is a technology used to combine multiple disk drives into a
single logical unit to improve performance, redundancy, or both.

Common RAID Levels:

1. RAID 0: Striping, no redundancy, improves performance.

2. RAID 1: Mirroring, provides redundancy by duplicating data.

3. RAID 5: Striping with parity, offers both performance and redundancy.

4. RAID 10: Combination of RAID 1 and RAID 0, offering high performance and redundancy.

Microprocessors

Microprocessors are integrated circuits that contain the central processing unit (CPU) of a computer.

8085 Microprocessor:

The 8085 is an 8-bit microprocessor developed by Intel. It has the following features:

• 8-bit data bus.

• 16-bit address bus, allowing access to 64KB of memory.

• 5 flags: Zero, Sign, Parity, Carry, Auxiliary Carry.

• Instructions: Includes arithmetic, logical, control, data transfer instructions.

8086 Microprocessor:

The 8086 is a 16-bit microprocessor with the following features:

• 16-bit data bus.

• 20-bit address bus, allowing access to 1MB of memory.

• Segmentation: Memory is divided into segments for better management.

• Enhanced instruction set: More instructions than the 8085.

Interfacing:

• The microprocessor interfaces with peripheral devices such as keyboards, displays, and printers.

• It also interfaces with memory through the use of buses and control signals.

Memory Addressing:

• 8085: Uses a 16-bit address bus, allowing access to up to 64KB of memory.

• 8086: Uses a 20-bit address bus, allowing access to 1MB of memory. It uses segmented addressing for
managing memory.

These notes provide a comprehensive understanding of computer architecture and organization, focusing on
key components like the ALU, registers, memory interfaces, microprocessors, and the control mechanisms that
govern their interactions.