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DLD--MODULE--1

The document outlines the syllabus for a Digital Logic Design course (ECE2002) taught by Dr. Om Prakash Pahari, covering topics such as number systems, Boolean algebra, combinational and sequential logic design, and hardware description languages like Verilog HDL. It includes details on experiments, required software, textbooks, and applications of digital systems. The course emphasizes the design and implementation of various digital circuits and systems.

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0% found this document useful (0 votes)
9 views

DLD--MODULE--1

The document outlines the syllabus for a Digital Logic Design course (ECE2002) taught by Dr. Om Prakash Pahari, covering topics such as number systems, Boolean algebra, combinational and sequential logic design, and hardware description languages like Verilog HDL. It includes details on experiments, required software, textbooks, and applications of digital systems. The course emphasizes the design and implementation of various digital circuits and systems.

Uploaded by

nabh.23bce10635
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Digital Logic Design

(ECE2002)

Dr. Om Prakash Pahari


Assistant Professor
School of Electrical & Electronics Engineering
Module-1 Syllabus

Digital Logic Design Fundamentals :


• Number Systems – Positional number systems, Number base conversions
between binary, octal , decimal and hexadecimal numbers – Unsigned and
Signed binary number systems.
• Boolean Algebra : Basic definitions, theorems and properties of Boolean
Algebra - Boolean functions – canonical and standard forms –Digital logic
gates – Introduction to digital logic families (RTL , TTL,ECL and CML)

2
Module-2 Syllabus

Combinational Logic Design :

• Gate Level minimization – SOP and POS forms – The Karnaugh’s map
method – Four and Five variable functions – don’t care conditions.
Combinational Logic Functions: Analysis and design procedure –
Non-arithmetic logic functions – MUX, DEMUX, Code converters, Encoders,
decoders, Parity checker and generator. Arithmetic Circuits – Adders,
subtractors, BCD adder and Multiplier
3
Module-3 Syllabus

Sequential Logic Circuits :

Introduction – Synchronous sequential logic – Latches & Flip-flops – SR, D,


JK and T – characteristic equations & wave forms – Analysis and design
procedure – State diagram –state reduction – state assignment

4
Module-4 Syllabus

Registers, Counters & FSMs :

• Ripple counter and synchronous counter – Design procedure for


synchronous MOD counters – UP/DOWN counter- Johnson & Ring
Counters - Shift registers – SISO, SIPO,PISO,POPI. Finite State Machine :
Mealy and Moore machine – Design of sequence detectors

5
Module-5 Syllabus
Hardware Description Language :

Verilog HDL – Lexical Conventions –Ports and Modules, Gate Level


Modeling, Operators, Data Flow Modeling, Behavioral level Modeling,
Testbench.

Modeling of Combinational and Sequential Logic Circuits using Verilog HDL.

Guest Lecture on Contemporary Topics

6
Text Books
1. M. Morris R. Mano and Michael D. Ciletti , “Digital Design With an Introduction to the
Verilog HDL”,6th Edition, Prentice Hall of India Pvt. Ltd., 2014.
2. Stephen Brown and ZvonkoVranesic, “Fundamentals of Digital Logic with Verilog
Design”, Third Edition, McGraw-Hill Higher Education, 2013.

Reference Book(s):
1. Mandal ”Digital Electronics Principles & Application, McGraw Hill Edu,2013.
2. Comer “Digital Logic & State Machine Design, Oxford, 2012.
3. William Keitz, Digital Electronics-A Practical Approach with VHDL,Pearson,2013

Required Software:
1. Multisim
2. VHDL Simulator (XiLinx/ModelSim)
3. Proteus
7
List of Experiments:

1. Design and Implementation of HA, FA, HA, FS


2. Code Converters (BCD to Gray, Gray to BCD and BCD to Excess-3)
3. MUX realization
i. Boolean function implementation using MUX IC
ii. Implementation of MUX/DEMUX using basic logic gates
4. Design of data-path elements a) 4-bit Adder b) 2-bit Multiplier
5. a)Verification of Flip-flops b)Construction of a flip flop using gates (any one FF)
6. Design and implementation of MOD Counters
7. Simulation of Half Adder, Full Adder, Half subtractor and full subtractor
8. Simulation of Encoder/Decoder circuits
9. Simulation of N-bit Adder/ Multiplier/code converters
10. Design and simulation of Shift Registers
11. Design and simulation of different types of counters

8
Signal
A signal is a function or a data set representing a physical quantity
or variable. Usually, the signal encapsulates information about the
behavior of a physical phenomenon, for example, electrical current
flowing through a resistor, sonar sound waves propagating under
water, or earthquakes. Any Physical
Quantity
Sonar
Sound Current 9
Wave Voltage

Dependent Variable
1D Signal

Audio Speech

Video Image
Independent Variable
2D/3D Signal
Time Space
Signal
Continuous Time Discrete Time Discrete
Continues Value Signal Discrete Time Value Signal
Continuous Time Continues Value Signal [Digital Signal]
Discrete Value Signal
Analog & Digital vs
Continuous & Discrete
▹ The concept of continuous time is often confused with that of analog. The
two are not same.
▹ The same is true of the concepts of discrete and digital.

▹ A signal whose amplitude can take on any value in a continuous range is an


analog signal. This means that the signal can take on infinite number of
values.
▹ A digital signal, on the other hand is one whose amplitude can take on only
two values (binary signals). For a signal to qualify as digital, the number of
values need not to be restricted to two. It can be any finite number.
Source: https://www.youtube.com/watch?v=zucfv7lU0Ws&pbjreload=10
A/D Converter
Discrete Time
Discrete Value
Signal

Continuous Time
Continuous Value
Signal

Discrete Time
Continuous Value
Signal
Quiz:
The following two signals are represented in computer. Identify the
Analog signal and Discrete Signal.
Digital System
A system is a defined by the
type of input and output it
deals with.
System
✔ Since we are dealing with signals, so in our case, our system would be
a mathematical model, a piece of code/software, or a physical device,
or a black box whose input is a signal and it performs some processing
on that signal, and the output is a signal.

✔ The input is known as excitation and the output is known as response.

Digital System: Digital systems are designed to store,


Analog system: The type of systems whose input process and communicate information in digital form.
and output both are continuous signals or analog Both the excitation and the response of digital systems
signals are called continuous systems. are discrete in nature.
Benefits of Digital System
✔ It is economical and easy to design.
✔ It is very well suited for both numerical and non-numerical information processing.
✔ It has high noise immunity.
✔ It is easy to duplicate similar circuits and complex digital ICs are manufactured
with the advent of microelectronics Technology.
✔ Adjustable precision and easily controllable by Computer.
Applications of Digital System

Communication System
Business Transaction

Automatic Traffic Control

Spacecraft Guidance Weather Monitoring Health Monitoring


Why Binary [Digital] ?
System of Counting

Transistor

✔ Computers are made of micro-transistors.


[Millions of Transistors]

Source: https://www.youtube.com/watch?v=Xpk67YzOn5w
The World of Digital….

Video
Number System
▹ In a digital system, the system can understand only the optional number
system. In these systems, digits symbols are used to represent different
values, depending on the index from which it settled in the number system.
▹ In simple terms, for representing the information, we use the number
system in the digital system.
Examples of Base in Number Systems


Binary Number System

Octal Number System

Hexadecimal Number System

24
Binary to Decimal Conversion
25
(10110.001)2=(1×24)+(0×23)+(1×22)+(1×21)+(0×20)+
(0×2-1)+(0×2-2)+(1×2-3)
(10110.001)2=(1×16)+(0×8)+(1×4)+(1×2)+(0×1)+
(0×1⁄2)+(0×1⁄4)+(1×1⁄8)
(10110.001)2=16+0+4+2+0+0+0+0.125
(10110.001)2=(22.125 )10

Binary to Octal Conversion


(111110101011.0011)2
1. Firstly, we make pairs of three bits on both sides of the binary point.
111 110 101 011.001 1
On the right side of the binary point, the last pair has only one bit. To make it a complete pair of three bits, we added two zeros
on the extreme side.
111 110 101 011.001 100
2. Then, we wrote the octal digits, which correspond to each pair.
(111110101011.0011)2=(7653.14)8
Binary to Octal Conversion
26
(111110101011.0011)2
1. Firstly, we make pairs of three bits on both sides of the binary point.
111 110 101 011.001 1
On the right side of the binary point, the last pair has only one bit. To make it a complete pair
of three bits, we added two zeros on the extreme side.
111 110 101 011.001 100

2. Then, we wrote the octal digits, which correspond to each pair.


(111110101011.0011)2=(7653.14)8
Binary to Hex Conversion
27

(10110101011.0011)2
1. Firstly, we make pairs of four bits on both sides of the binary point.
111 1010 1011.0011
On the left side of the binary point, the first pair has three bits. To make it a complete pair of
four bits, add one zero on the extreme side.
0111 1010 1011.0011

2. Then, we write the hexadecimal digits, which correspond to each pair.


(011110101011.0011)2=(7AB.3)16
Decimal to Binary Conversion
28
Example: (152.25)10
Step 1:
Divide the number 152 and its successive quotients with base 2.

Operation Quotient Remainder Step 2:


152/2 76 0 (LSB) Now, perform the multiplication of 0.25 and
76/2 38 0
successive fraction with base 2.

38/2 19 0 Operation Result carry


19/2 9 1 0.25×2 0.50 0
9/2 4 1
0.50×2 0 1
4/2 2 0
(0.25)10=(.01)2
2/2 1 0
1/2 0 1(MSB)

(152)10=(10011000)2 (152.25)10=(10011000.01)2
Decimal to Octal Conversion
29
Example: (152.25)10
Step 1:
Divide the number 152 and its successive quotients with base 8.

Step 2:
Operation Quotient Remainder
Now, perform the multiplication of 0.25 and
152/8 19 0 successive fraction with base 8.
19/8 2 3
Operation Result carry
2/8 0 2
0.25×8 __.00 2
(152)10=(230)8
(0.25)10=(.2)8

(152.25)10=(230.2)8
Decimal to Hex Conversion
30
Example: (152.25)10
Step 1:
Divide the number 152 and its successive quotients with base 16.

Step 2:
Operation Quotient Remainder
Now, perform the multiplication of 0.25 and
152/16 9 8 successive fraction with base 16.
9/16 0 9
Operation Result Carry
(152)10=(98)16 0.25×16 __.00 4

(0.25)10=(.4)16

(152.25)10=(98.4)16
Octal to Decimal Conversion
31
(152.25)8
Step 1:
We multiply each digit of 152.25 with its respective positional weight, and last we add the
products of all the bits with its weight.
(152.25)8=(1×82)+(5×81)+(2×80)+(2×8-1)+(5×8-2)
(152.25)8=64+40+2+(2×1⁄8)+(5×1⁄64)
(152.25)8=64+40+2+0.25+0.078125
(152.25)8=106.328125

So, the decimal number of the octal number 152.25 is 106.328125


Octal to Binary Conversion
32
(152.25)8
We write the three-bit binary digit for 1, 5, 2, and 5.

(152.25)8=(001101010.010101)2
So, the binary number of the octal number 152.25
is (001101010.010101)2
Octal to Hex Conversion
33
Example 1: (152.25)8
Step 1:
We write the three-bit binary digit for 1, 5, 2, and 5.
(152.25)8=(001101010.010101)2
So, the binary number of the octal number 152.25 is (001101010.010101)2
Step 2:
1. Now, we make pairs of four bits on both sides of the binary point.
0 0110 1010.0101 01
On the left side of the binary point, the first pair has only one digit, and on the right side, the last
pair has only two-digit. To make them complete pairs of four bits, add zeros on extreme sides.
0000 0110 1010.0101 0100
2. Now, we write the hexadecimal digits, which correspond to each pair.
(0000 0110 1010.0101 0100)2=(6A.54)16
Hex to Binary Conversion
34
Example 1: (152A.25)16
We write the four-bit binary digit for 1, 5, A, 2, and 5.
(152A.25)16=(0001 0101 0010 1010.0010 0101)2
So, the binary number of the hexadecimal number 152.25 is (1010100101010.00100101)2
Hex to Octal Conversion
35
Example 1: (152A.25)16
Step 1:
We write the four-bit binary digit for 1, 5, 2, A, and 5.
(152A.25)16=(0001 0101 0010 1010.0010 0101)2
So, the binary number of hexadecimal number 152A.25 is (0011010101010.010101)2
Step 2:
3. Then, we make pairs of three bits on both sides of the binary point.
001 010 100 101 010.001 001 010
4. Then, we write the octal digit, which corresponds to each pair.
(001010100101010.001001010)2=(12452.112)8
36
Mathematical Operations (Hex)
Addition
Subtraction A8D2 A8D2
Multiplication
-3EAC +3EAC
Division
------------- -------------
Power of 2
37
2KBit
1

2 4KBit
4 1 Nibble 8KBit

8 1 Byte 16KBit
16 1 Word 1Mega Bit
32 2MBit
64 4MBit
128 8MBit
256 1Giga Bit
512 2GBit
1024 1Kilo Bit 4GBit
1 Tera Bit
Binary Number System
38
Only for positive
Numbers For both positive
and Negative
Unsigned Number Numbers
Representation
Signed Number
Representation

Sign Magnitude Form 1’s Complement Form 2’s Complement Form


Sign Magnitude Form
▹ In this approach, a number's sign is represented with a sign bit: setting that
bit (often the most significant bit) to 0 for a positive number or positive
zero, and setting it to 1 for a negative number or negative zero. The
remaining bits in the number indicate the magnitude (or absolute value).

Ex:
(+3) = 0011 (-3) = 1011
(+7) = 0111 (-7) = 1111
(+0) = 0000 (-0) = 1000
1’s Complement Form
▹ 1‘s
Binary Unsigned
complement
value interpretation
interpretation
00000000 +0 0
00000001 1 1
⋮ ⋮ ⋮
01111101 125 125
01111110 126 126
01111111 127 127
10000000 −127 128
10000001 −126 129
10000010 −125 130
⋮ ⋮ ⋮
11111101 −2 253
11111110 −1 254
11111111 −0 255
2‘s
Binary Unsigned
2’s Complement Form value
complement
interpretation
interpretation

▹ 00000000 0 0
00000001 1 1
⋮ ⋮ ⋮
01111110 126 126
01111111 127 127
10000000 −128 128
10000001 −127 129
10000010 −126 130
⋮ ⋮ ⋮
11111110 −2 254
11111111 −1 255
Negative Number
Representation
Sign Ones' Two's
Binary Unsigned
magnitude complement complement
0000 0 0 0 0
0001 1 1 1 1
0010 2 2 2 2
0011 3 3 3 3
0100 4 4 4 4
0101 5 5 5 5
0110 6 6 6 6
0111 7 7 7 7
1000 8 −0 −7 −8
1001 9 −1 −6 −7
1010 10 −2 −5 −6
1011 11 −3 −4 −5
1100 12 −4 −3 −4
1101 13 −5 −2 −3
1110 14 −6 −1 −2
1111 15 −7 −0 −1
Complements of numbers

44
45
46 Subtraction with complements
Subtraction with 9’s Complement
47

Case:01: When the subtrahend is smaller than the


minuend.
For subtracting the smaller number from the larger number
using 9's complement, we will find the 9's complement of the
subtrahend, and then we will add this complement value with
the minuend. By adding both these values, the result will come
in the formation of carry. At last, we will add this carry to the
result obtained previously.

Case:02: When the subtrahend is greater than the


minuend.
In this case, when we add the complement value and the
minuend, the result will not come in the formation of carry.
This indicates that the number is negative, and for finding the
final result, we need to find the 9's complement of the result.
Subtraction with 10’s Complement
48

When the subtrahend is smaller than the minuend.

When the subtrahend is greater than the minuend.


Case:02: When the subtrahend is greater than the
minuend.
In this case, when we add the complement value and the
minuend, the result will not come in the formation of carry.
This indicates that the number is negative and for finding the
final result, we need to find the 10's complement of the result
obtained by adding complement value of subtrahend and
minuend.
Subtraction with 1’s Complement
1.
49 Write down 1’s complement of the subtrahend.
2. Add this with the minuend.
3. If the result of addition has a carry over then it is dropped and an 1 is added in the last bit.
4. If there is no carry over, then 1’s complement of the result of addition is obtained to get the final result and
it is negative.

Evaluate:(i) 110101 – 100101 Evaluate:(ii) 1011.001 – 110.10


Subtraction with 2’s Complement
50
1. At first, 2’s complement of the subtrahend is found.
2. Then it is added to the minuend.
3. If the final carry over of the sum is 1, it is dropped and the result is positive.
4. If there is no carry over, the two’s complement of the sum will be the result and it is negative.

Evaluate:(ii) 1010.11 – 1001.01


Evaluate:(i) 10110 – 11010
Boolean Algebra
52 Boolean Theory

Boolean algebra is a branch of mathematics that includes methods for manipulating logical
variables and logical expressions.
The Greek philosopher Aristotle founded a system of logic based on only two types of
propositions: true and false.
The English mathematician George Boole (1815–1864) sought to give symbolic form to
Aristotle’s system of logic—hence the name Boolean algebra.
In the mid-twentieth century, Claude Shannon, an electrical engineer and mathematician, applied
Boole’s ideas to digital circuits.
Like algebra, Boolean algebra is based on a set of rules that are derived from a small number of
basic assumptions. Logic values involve elements that take on one of two values, 0 and 1.
Therefore, a logic variable can only be equal to 0 or 1.
A logic function is an expression, that describes the logic operations between its logic variables.
Similarly, a logic function can only be equal to 0 or 1.

ECE2002 Winter 2019-20


53 Boolean Axioms and Theorems
The basic logic operations include logic sum (+), logic product
(·), and logic complement (‘). i.e. OR, AND and NOT

If a logic variable is true, its logic complement is false.

In 1904 Huntington defined 6 postulates that must be satisfied,


called Huntington’s postulates

ECE2002 Winter 2019-20


54 Postulates

Closure :
Any logical operation yields a value in the set {0,1}.
Identity :
(a) X + 0 = X (b) X·1=X
Commutative:
(a) X+Y =Y+X (b) X·Y=Y·X
Distributive:
(a) X·(Y+Z)=(X·Y)+(X·Z) (b) X+(Y·Z)=(X+Y) ·(X+Z)
Complements:
(a) X+X’=1 (b) X·X’=0
Distinct:
0≠1

ECE2002 Winter 2019-20


55 Theorems

Theorem 1:
(a) X+X=X (b) X.X=X
Theorem 2:
(a) X+1=1 (b)X·0=0
Theorem 3: Involution :
(X’)’=X
Theorem 4: Associative :
(a) X+(Y+Z)=(X+Y)+Z (b) X· (YZ)=(XY) ·Z
Theorem 5: DeMorgan :
(a) (X+Y)’=X’Y’ (b) (XY)’=X’+Y’
Theorem 6: Absorption :
(a) X+XY=X (b) X· (X+Y)=X

ECE2002 Winter 2019-20


Duality Principle

The important property of Boolean algebra is called duality principle and it states that
every algebraic expression deducible from the postulates of Boolean algebra remains valid
if the operators and identity elements are interchanged.

Interchange elements ={0,1}


Interchange operator ={AND,OR}
Proof

Theorem 1.(a) • Theorem 1.(b)


X+X=X • X·X = X
Proof: • Proof:
X + X = (X + X).1
• X·X= XX + 0
= (X + X)(X + X’)
• = XX
= X + XX’
• = XX + XX’
=X+0
• = X(X + X’)
=X
• = X·1
• =X
Theorems

• Theorem 2.(a) • Theorem 6.(a) • Theorem 6.(b)


•X + 1 = 1 • X + XY = X • X(X+Y) = X
• Proof: • Proof: • Proof:
• X + 1= 1·(X+1) • X + XY = X·1 + XY• X(X+Y) = XX + XY
• = (X + X’)(X+1) • = X(1+Y) • =X+XY
• = X + X’ ·1 • = X ·1 • = X(1+Y)
• = X + X’ • =X • = X ·1
• =1 • =X
DeMorgan’s Theorem (a)

Proof: (X+Y)’=X’Y’
According to the complementing law, P+P’=1 and P·P’=0.

So, if we take P=(X+Y), P’=(X+Y)’=X’Y’,

So, (X+Y)+X’ ·Y’=((X+Y)+X’)((X+Y)+Y’)


=(1+Y)(1+X)
=(1).(1)
=1
DeMorgan’s Theorem (b)

Proof: (XY)’=X’+Y’
According to the complementing law, P+P’=1 and P·P’=0.

So, if we take P=(XY), P’=(XY)’=X’+Y’,

So, XY+X’+Y’= (X’+Y’+X)(Y+X’+Y’)


= (1+Y’)(1+X’)
=1.1
=1
61 Properties

ECE2002 Winter 2019-20


Logic Gates
Logic gates are electronic circuits that
operate on one or more input signals to
produce an output signal .
Electrical signals such as voltages or
currents exist as analog signals having
values over a given continuous range, say, 0
to 3 V, but in a digital system these voltages
are interpreted to be either of two
recognizable values, 0 or 1.
63 Logic Gates

ECE2002 Winter 2019-20


64
Universal Gates - NAND

ECE2002 Winter 2019-20


Universal Gates - NOR
65

ECE2002 Winter 2019-20


66 Boolean Functions with Logic Gates

Boolean algebra is an algebra that deals with binary variables and logic
operations. A Boolean function described by an algebraic expression consists of
binary variables.
Example: F1=X+Y’Z
A Boolean function can be transformed from an algebraic expression into a
circuit diagram composed of logic gates connected in a particular structure.

Variables = (X, Y, Z)
Literals = (X, Y’, Z)
Terms =(1 NOT term, 1 AND term and 1 OR term)

ECE2002 Winter 2019-20


Boolean Functions with Logic Gates
Boolean algebra is an algebra that deals with binary variables and logic operations. A Boolean
function described by an algebraic expression consists of binary variables.
Exp: F1=X+Y’Z
A Boolean function can be transformed from an algebraic expression into a circuit diagram
composed of logic gates connected in a particular structure.

The operator precedence for evaluating Boolean expressions is (1) parentheses, (2) NOT, (3) AND,
(4) OR
Literals, Variables and Terms

F2= X’Y’Z + X’YZ + XY’


Variables = (X, Y, Z)
Literals = (X’, Y’, Z, X’, Y, Z, X, Y’)
Terms =(2 NOT term, 3 AND term and 1 OR term)
Minimization
Minimization means reducing the number of literals. We can minimize the expression with
the help of postulates and theorems.

F2 = X’Y’Z + X’YZ + XY’


= X’Z(Y’+Y) + XY’
= X’Z + XY’
Complement of a Function

The complement of a function may be derived from DeMorgan's theorem

DeMorgan’s theorems for any number of variables resemble the two variable case in form
and can be derived by successive substitutions similar to the method used in the preceding
derivation.

(A+B+C+D+……..F)’ = A’B’C’D’…….F’
(ABCD..F)’ = A’+ B’+ C’+ D’ + ……. + F’
Examples:

Find the complement of the functions F1= X’YZ’ + X’Y’Z and F2= X(Y’Z’ +YZ) by
applying DeMorgan’s theorem:

F1’ = (X’YZ’ + X’Y’Z’)’ = (X’YZ’)’(X’Y’Z)’


= (X + Y’ + Z)(X + Y + Z)

F2’ = [X(Y’Z’ +YZ)]’ = X’ + (Y’Z’ + YZ)’ = X’ + (Y’Z’)’(YZ)’


= X’ + (Y + Z)(Y’ + Z’)
= X’ + YZ’ + Y’Z
72 Representation

Logical function

Min term

Max term

Tabular form

Logical Gates

ECE2002 Winter 2019-20


73 Canonical and Standard Forms

Consider two binary variables x and y combined with an AND operation.


Since each variable may appear in either form, there are four possible
combinations: X’Y’, X’Y, XY’, XY.
Each of this AND term is called a minterm or a standard sum.
In similar fashion, all combination with a OR operator is called
maxterms.
Boolean functions expressed as a sum of minterms or product of
maxterms are said to be in canonical form.
If you express the Boolean function in SOP and POS form then we call it
standard form.

ECE2002 Winter 2019-20


Three binary variable minterms and maxterms
Note*

Generally, we use SOP form to calculate the sum of minterms and POS form to calculate
product of maxterms. If your initial expression is given in POS form and you have to
represent it in sum of minterms, you can convert your POS to SOP form to proceed for the
sum of minterms representation.

Exp. You have given the following expression and asked to represent it in sum of minterms
form
F = (A’+B)(A+B’) ------ POS Form
= A’.A+A’.B’+AB+B.B’ -------(Multiply the product)
= A’B’+AB --------(A.A’=0,B.B’=0) (SOP Form)
To convert SOP to POS, we use distributive law
Exp:
Exp
Consensus Theorem or Redundancy Theorem
Shortcut Method:
1) Three variable
F1 = AB + A’C + BC
2) Each Variable comes twice
= AB + A’C + BC(A+A’)
= AB + A’C + ABC + A’BC
3) One variable is
= AB + A’C complemented

F2 = (A + B)(A’ + C)(B + C)
= (A + B)(A’ + C)(B + C + 0) If satisfy, remove the term
= (A + B)(A’ + C)(B + C + AA’)
without the complemented
= (A + B)(A + B + C)(A’ + C)(A’ + C + B)
= (A + B)(A’ + C)
variable

For F1 that is BC and for F2


that is (B+C)
Some Problems and their Solutions
Contd.

P2) Minimize the following expression F= A’B(D’+C’D)+ B(A+A’CD)

Sol: F = A’B(D’ + C’D) + B(A + A’CD)


= B(A’D’ + A’C’D) + B(A + A’CD)
= B(A’D’ + A’C’D + A + A’CD)
= B(A’D’ + A + A’C’D + A’CD)
= B(A’D’ + A + A’D) [as, C+C’=1]
= B(A’D’ + A’D +A)
= B(A’ + A)
= B.1
= B.
Contd.
Contd.

P5) Simplify F = (A+B)(A+B’)(A’+B)(A’+B’)


Sol: F = (A+B)(A+B’)(A’+B)(A’+B’)
= (A + B.B’)(A’ + B.B’)
= (A + 0)(A’ +0)
= A.A’
=0
83 Integrated Circuits
Integrated circuits are chips, pieces of semiconductor material,
that contain all of the transistors, resistors, and capacitors
necessary to create a digital circuit or system.
The first ICs were fabricated using Ge BJTs in 1958

ECE2002 Winter 2019-20


84 Characteristics of Digital ICs

Propagation Delay: The time required for the output of a digital circuit to
change states after a change at one or more of its inputs. The speed of a
digital circuit is specified in terms of the propagation delay time.
Fan-in: Fan-in (input load factor) is the number of input signals that can
be connected to a gate without causing it to operate outside its intended
operating range
Fan-out: Fan-out (output load factor) is the maximum number of inputs
that can be driven by a logic gate.
Speed Power Product: The product of the gate speed or propagation
delay of an electronic circuit and its power dissipation.

ECE2002 Winter 2019-20


85 Logic Families
Logic families are sets of chips that may implement different logical
functions, but use the same type of transistors and voltage levels for
logical levels and for the power supplies. These families vary by
speed, power consumption, cost, voltage & current levels
Eg: Input and Output Voltage level For TTL

ECE2002 Winter 2019-20


86 Resistor-Transistor Logic (RTL)
Was most popular kind of logic
before the invention of IC
fabrication technologies.
Consists of resistors and
transistors
The basic RTL device is a
NOR gate
If either transistor or both of
them are applied HIGH input,
the voltage Vcc drops across Rc
and output is LOW

ECE2002 Winter 2019-20


87 Diode-Transistor Logic (DTL)
Replaced RTL family
because of greater fan-out
capability and more noise
margin.
The basic DTL device is a
NAND gate
Due to number of diodes used
in this circuit, the speed of
the circuit is significantly
low.

ECE2002 Winter 2019-20


88 Transistor-Transistor Logic (TTL)
TTL family is a modification
to the DTL.

It has come to existence so as


to overcome the speed
limitations of DTL family.

The basic gate of this family


is TTL NAND gate.

ECE2002 Winter 2019-20


89 Emitter Coupled Logic (ECL)
Implements the gates in
differential amplifier
configuration in which
transistors are never driven in
the saturation region thereby
improving the speed of circuit
to a great extent.
The ECL family is fastest of
all logic families
The basic gate of ECL family
is NOR gate (OR and NOR
together)
ECE2002 Winter 2019-20
90 CMOS Logic family
MOS logic family implements the
logic gates using MOSFET
devices.
MOSFETs are high density
devices which can easily
fabricated on ICs.
MOS logic gates can be fabricated
using either only NMOS or only
PMOS devices.
MOS logic is vastly used in LSI
and VLSI devices, due to their
high density characteristic.

ECE2002 Winter 2019-20


Comparison Between Logic Families
91

ECE2002 Winter 2019-20

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