Advanced Layout & Routing Techniques: Presented By: Janine Flagg
Advanced Layout & Routing Techniques: Presented By: Janine Flagg
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Agenda
Constraint Manager
Constraint Resolution
Electrical Constraints
Differential Pairs
Total Etch Length
Wiring
Vias
Impedance
Min/Max Propagation Delay
Relative Propagation Delay
Flex Routing
Reuse
Technology Files
Front-to-Back Design Reuse
Placement Replication
CircuitSpace
Demos
Differential Pair Routing
Total Etch Length Delay Tune
Multi-Line Routing (Flex)
Placement Replication
Front-to-back Design Reuse
CircuitSpace
Constraint Manager
Constraint Manager includes five types of constraints:
Electrical Constraints: Performance characteristics
Physical Constraints: Line width, via selection, and layer restrictions
Spacing Constraints: Clearances between lines, pads, vias, and
copper areas (shapes)
Same Net Spacing Constraints: Clearances between lines, pads,
vias, and copper areas (shapes) on the same net
Design Constraints: Package to package checks, soldermask &
pastemask checks and negative plane island checks
Constraint Manager
Interface
Setup > Constraints > Constraint Manager or
Constraint Manager
Analysis Modes
Analyze > Analysis Modes > Electrical Modes
Constraint Resolution
Physical
Top displays element
information
Description
X/Y location
Net name
Bottom displays
constraint rules
Constraint set name
Constraint set rules
Constraint values
Constraint Resolution
Spacing
Top displays element
information
Description
X/Y location
Net name
Bottom displays
constraint rules
Constraint set
name
Constraint set
rules
Constraint values
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Electrical Constraints
OrCAD PCB Designer Professional
Total Etch Length Constraint
Differential Pair Constraints
Uncoupled Length
Wiring Constraints
Net Scheduling
Parallelism
Layer Sets Rules
Via Constraints
Max Via Count
Matched Vias
Impedance
Min/Max Propagation Delays
Differential Pair - Static Phase Tolerance
Relative Propagation Delay
Differential Pairs
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Differential Pairs
Signal Naming Convention for Auto Setup
Naming Rules for Signals within Differential Pairs
Examples:
SignalName_P
SignalName_N
SignalNameP
SignalNameN
SignalName_H
SignalName_L
SignalNamaH
SignalNameL
SignalName_+
SignalName_-
SignalName+
SignalName-
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Differential Pairs
Auto Setup in OrCAD Capture
Tools > Create Differential Pair > Auto Setup
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Differential Pairs
Auto Generate in PCB Editor
Logic > Assign Differential Pair > Auto Generate
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Differential Pairs
Defining in Constraint Manager
Create > Differential Pair
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The trace width that should be used to route the differential pair
nets the majority of the time
The width you prefer your differential pairs to be routed
Min Line Width
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Primary
PrimarySeparation
SeparationGap
Gap
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Primary
PrimarySeparation
Separationminus
minus
(-)
(-)Tolerance
Tolerance
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Ungathered
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This length is
ALWAYS
included
Include OR
Ignore this total
length
Gather points
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Length of net B
Note: Available only in Allegro PCB Designer and above.
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Differential Pairs
Physical Constraints
Differential Pair Constraints set in the Physical Domain
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Differential Pairs
Electrical Constraints
Differential Pair Constraints set in the Electrical Domain
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Differential Pairs
Routing Options
Route > Connect
Horizontal
Vertical
Diagonal Up
Diagonal Down
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Differential Pairs
Routing Options
Once seeded, it is possible to route tandem differential
pairs as well as edge coupled.
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Red and Green Meter guides the routing of Differential Pairs and
signals with Length Constraints
Static Phase Tolerance
Total Etch Length
Note: Meter available only in Allegro PCB Designer and above.
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Electrical Constraints
Total Etch Length
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Electrical Constraints
Total Etch Length - Delay Tune
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Electrical Constraints
Wiring - Topology & Stub Length
Electrical Constraints
Wiring - Layer Sets & Exposed Length
Electrical Constraints
Wiring - Parallel
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Electrical Constraints
Vias - Via Count & Match Vias
Electrical Constraints
Impedance
Electrical Constraints
Min/Max Propagation Delays
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Electrical Constraints
Relative Propagation Delay
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Flex Routing
Flex Board
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Flex Routing
Multi-Line Routing is used for Flex Routing
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Reuse
Technology Files
Stored on disk
Preserve company standards while creating new databases
Results reported in techfile.log
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Reuse
Technology File - Export
File > Export > Techfile
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Reuse
Technology File - Import
File > Import > Techfile
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Reuse
Front-to-Back Design Reuse
Circuits may be placed, routed and saved for design reuse
Requires the use of external Hierarchy in OrCAD Capture
Hierarchical block placed at top level
schematic is referencing an external design
that has already been placed and routed in
PCB Editor and saved as a Reuse Module
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Reuse
Front-to-Back Design Reuse
Reuse Modules may be placed as if they were one
component
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Reuse
Placement Replication
May include:
Component Placement
Related Routing
Local Shapes
Reference Designator Placement
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Reuse
Placement Replication
Step 1 and 2
Create original circuit
and select components
Step 3
Hover over a component
and RMB Place
replicate create, then
RMB - DONE
Step 5
Enter a name for the
Module Definition File
and Save
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Step 4
Hover over a pin
and RMB Snap
pick to - Pin
Reuse
Placement Replication
Step 1
Window - select
targeted components
Step 2
Selected components
a pin and RMB
Place replicate apply
module name
Step 4
Place
replicated
circuits
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Reuse
CircuitSpace
CircuitSpace plugs into Cadence Allegro and OrCAD PCB
Editors as a command menu
Is not accessible as a separate executable
Menu is available to the left of PCB Editors Help menu
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Reuse
CircuitSpace
CircuitSpace adds the following to the PCB Editor:
CircuitSpace pull-down menu
CircuitSpace properties
CircuitSpace documentation
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Reuse
CircuitSpace Schematic Data
Edit Board Parameters form specifies type of schematic
data to be used
Allegro HDL
Allegro CIS
Mentor DxDesigner
PDF
None = Rooms
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Reuse
CircuitSpace - Clusters
CircuitSpace Clusters components based on schematic
the information provided:
Clusters may be
Moved & Rotated
Mirrored
Automatically Placed
Replicated
Aligned
Merged
Saved as a Template
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Reuse
CircuitSpace Auto Placement of Clusters
Single-Sided Auto
Placement
Double-Sided Auto
Placement
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Reuse
CircuitSpace Propagating Placement
Propagating Placement across clusters
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Reuse
CircuitSpace Previewing Templates
Templates may be previewed before applying
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Reuse
CircuitSpace Applying Templates
Etch may be mapped to the desired layers on the target
board
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