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    Vlsi Rew 2

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    Smilling Assassine
    The document discusses various topics related to VLSI including: 1. It describes the basic ASIC design flow from needs identification to manufacturing. 2. It provides an overview of transistors including MOSFET transistors and the differences between NMOS and PMOS transistors. 3. It examines the regions of operation, fabrication process, and DC characteristics of NMOS and PMOS transistors using graphs and diagrams. 4. Examples are given of NMOS and PMOS transistors charging and discharging a capacitor to demonstrate their usage in basic logic gates like an inverter.

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    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd

    Vlsi Rew 2

    Uploaded by

    Smilling Assassine
    12 views58 pages
    The document discusses various topics related to VLSI including: 1. It describes the basic ASIC design flow from needs identification to manufacturing. 2. It provides an overview of transistors including MOSFET transistors and the differences between NMOS and PMOS transistors. 3. It examines the regions of operation, fabrication process, and DC characteristics of NMOS and PMOS transistors using graphs and diagrams. 4. Examples are given of NMOS and PMOS transistors charging and discharging a capacitor to demonstrate their usage in basic logic gates like an inverter.

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    vlsi rew 2

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    The document discusses various topics related to VLSI including: 1. It describes the basic ASIC design flow from needs identification to manufacturing. 2. It provides an overview of transistors including MOSFET transistors and the differences between NMOS and PMOS transistors. 3. It examines the regions of operation, fabrication process, and DC characteristics of NMOS and PMOS transistors using graphs and diagrams. 4. Examples are given of NMOS and PMOS transistors charging and discharging a capacitor to demonstrate their usage in basic logic gates like an inverter.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    12 views58 pages

    Vlsi Rew 2

    Uploaded by

    Smilling Assassine
    The document discusses various topics related to VLSI including: 1. It describes the basic ASIC design flow from needs identification to manufacturing. 2. It provides an overview of transistors including MOSFET transistors and the differences between NMOS and PMOS transistors. 3. It examines the regions of operation, fabrication process, and DC characteristics of NMOS and PMOS transistors using graphs and diagrams. 4. Examples are given of NMOS and PMOS transistors charging and discharging a capacitor to demonstrate their usage in basic logic gates like an inverter.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    of 58

    DON BOSCO INSTITUTE OF

    TECHNOLOGY
    Department of Electronics & Communication Engineering
    VLSI REVIEW

    PRESENTED BY

    Bharath T V 1DB20EC011
    Lasya A N 1DB20EC045
    Mahesh K 1DB20EC048
    MKRuchitha 1DB20EC047

    Guided by
    Satya
    ASIC FLOW
    . Needs Ex:Cell
    Phones

    Specifications Manufacture Consumer

    Verilog code

    Functionality

    Schematic

    Functionality

    Physical designing

    Verification

    Fabrication
    TRANSISTOR
    • A Transistor is semiconductor device that acts as a switch or amplifier
    for electronic signals .
    • Its fundamental building block in modern electronics ,allowing the
    control of electrical current and voltage flow.

    THERE ARE TWO MAIN TYPES OF TRANSISTORS:


    • bipolar junction transistors (BJTs)
    • field-effect transistors (FETs)
    What are MOSFET Transistors?
    MOSFET Transistors or Metal Oxide-Semiconductor
    (MOS) are field effect devices that use the electric field to
    create a conduction channel.

    There are two kinds of MOSFET transistors:

    N channel MOSFET Transistor or NMOS


    P channel MOSFET Transistor or PMOS
    NMOS Transistor:
    • Source Terminal: The source terminal in an NMOS transistor is connected to the region with lower voltage. In
    other words, it's where the current enters the transistor. Electrons flow from the source to the drain.
    • Drain Terminal: The drain terminal is connected to the region with higher voltage. It's where the current exits
    the transistor.

    PMOS Transistor:
    • Source Terminal: The source terminal in a PMOS transistor is connected to the region with higher voltage.
    Holes (absence of electrons) flow from the source to the drain.
    • Drain Terminal: The drain terminal is connected to the region with lower voltage. It's where the current
    exits the transistor.
    CMOS(Complementary Metal-Oxide-Semiconductor )
    NMOS AND PMOS CROSS SECTION
    MOSFET transistors (NMOS) physical structure
    The next image shows the N channel MOSFET transistor physical structure with its four
    terminals: Gate, Drain, Source and Substrate. Normally, the Source and the substrate are
    connected together.

    The Gate with W and L dimensions is separated from the substrate by a dielectric (SiO 2), creating
    a similar structure of the capacitor plates.
    If a positive voltage is applied to the gate, negative charges are induced (inversion layer) on the
    substrate surface and they create a conduction path between the Drain and Source terminals.
    The minimum voltage needed to create the inversion layer is called threshold voltage (VT).
    REGIONS OF OPERATION OF CMOS
    1. Cutoff Mode:
    •NMOS: Vgs < Vtn (threshold voltage for NMOS)
    •PMOS: Vgs > Vtp (threshold voltage for PMOS)
    •In this mode, the channel is not formed, and current doesn't flow between the drain and source, effectively
    turning the transistor off.

    2. Linear Mode (also known as Triode or Ohmic Mode):


    •NMOS: Vgs > Vtn and Vds < (Vgs - Vtn)
    •PMOS: Vgs < Vtp and Vsd < (Vtp - Vgs)
    •The channel is formed, but the drain-source voltage (Vds) is low enough that the channel is not pinched
    off. Current flows linearly with respect to Vds.

    3. Saturation Mode:
    •NMOS: Vgs > Vtn and Vds >= (Vgs - Vtn)
    •PMOS: Vgs < Vtp and Vsd >= (Vtp - Vgs)
    •The channel is formed, and Vds is high enough to pinch off the channel near the drain, restricting further current
    increase. Current becomes relatively independent of Vds and is primarily controlled by Vgs.
    REGION OF OPERATION OF MOSFET

    NMOS PMOS
    CURRENT AND VOLTAGE EQUATION
    Fabrication step
    FABRICATION STEPS OF IC:
    NMOS
    NMOS
    SCHEMATIC
    DC CHARACTERISTICS
    CONCLUSION
    • VG increases, VD increases, current increases
    • The curves show that the drain current increases with both Vds and
    Vgs.
    • The drain current is directly proportional to the gate-source voltage.
    • The MOSFET becomes more resistive at higher drain-source voltages.
    TEMPERATURE GRAPH
    CONCLUSIO
    N
    • Increasing temperature initially increases Id but eventually leads to a decrease due to increased
    scattering.
    • Increasing Vd increases Id in the linear region and saturates it in the saturation region.

    Vibration
    • At higher temperatures, the atoms in the conductor vibrate more intensely.
    • This increased vibration makes it harder for electrons to move freely through the
    conductor, increasing resistance.
    Electron Scattering:
    • As the atoms vibrate more, they collide more frequently with the free electrons.
    • These collisions scatter the electrons and impede their movement, further increasing
    resistance.
     Current vs Width
     Current vs Width
     Current vs Length
     Current vs Length
     Current vs Length
    NMOS WITH CAPACITOR CHARGING
    OUTPUT
    NMOS WITH CAPACITOR
    DISCHARGING
    OUTPUT
    CONCLUSION

    The NMOS transistor will be 'on' when its gate voltage is greater or equal to the threshold voltage vgs>vt.

    When the gate voltage is first applied the NMOS transistor will happily begin to pass Vdd to the capacitor and the
    capacitor voltage will begin to rise.

    NMOS: Vgs < Vtn (threshold voltage for NMOS)

    NMOS is generally better at passing a logic 0


    PMOS
    PMOS SCHEMATIC
    DC CHARACTERISTICS
    CONCLUSION
    • VG increases, VD increases, current increases
    • The curves show that the drain current increases with both Vds and
    Vgs.
    • The drain current is directly proportional to the gate-source voltage.
    • The MOSFET becomes more resistive at higher drain-source voltages.
    Temperature graph
    •As temperature increases, concentration of free holes increases.
    •This increase in free holes initially leads to a slight increase in Id at all Vgs values.

    •At higher temperatures, the increased vibration of atoms causes more scattering of
    holes, hindering their movement.
    •This scattering effect outweighs the initial increase in free holes, leading to an
    overall decrease in Id.

    • The graph shows an initial rise in Id followed by a gradual decrease as temperature


    increases.
     Current vs Width
     Current vs Width
     Current vs Length
     Current vs Length
    PMOS WITH CAPACITOR CHARGING
    DISCHARGING
    CHARGING
    PMOS WITH CAPACITOR
    DISCHARGING
    OUTPUT
    CONCLUSION

    • if 0 is applied to the gate of our PMOS transistor and since Vgs < Vt it will conduct. (Vt is negative for
    PMOS transistors.)

    • while the PMOS initially conducts and allows the logic 1 to pass, its imperfections (leakage and voltage
    drop) lead to a gradual voltage decrease until it reaches 0.7V and the PMOS turns off. This inability to
    perfectly maintain the logic 1 voltage level is why, in this specific context, the PMOS can be considered
    unable to fully pass a logic 1.

    • PMOS is not ideal for passing a logic

    • PMOS is generally better at passing a logic 1

    • PMOS: Vgs > Vtp (threshold voltage for PMOS)


    INVERTER
    INVERTER SCHMATIC
    BLOCK DIAGRAM
    OUTPUT
    DC RESPONSE OF INVERTER

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