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    Code: 1 3A04504 Set 1 R13 Ravindra College of Engineering For Women: Kurnool

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    ShafiullaShaik
    This document appears to be an exam for a Digital IC Applications course, containing 5 short answer questions and 5 longer questions requiring circuit diagrams, explanations or comparisons. The exam tests knowledge of topics like Schottky transistors, high threshold logic, VHDL programming structure and data types, binary decoders, CMOS inverter circuits, VHDL design flow, structural design elements in VHDL, 74*138 logic symbol and operations, using decoders to design larger decoders, and designing logic circuits and writing VHDL code for Boolean functions.

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    Code: 1 3A04504 Set 1 R13 Ravindra College of Engineering For Women: Kurnool

    Uploaded by

    ShafiullaShaik
    33 views1 page
    This document appears to be an exam for a Digital IC Applications course, containing 5 short answer questions and 5 longer questions requiring circuit diagrams, explanations or comparisons. The exam tests knowledge of topics like Schottky transistors, high threshold logic, VHDL programming structure and data types, binary decoders, CMOS inverter circuits, VHDL design flow, structural design elements in VHDL, 74*138 logic symbol and operations, using decoders to design larger decoders, and designing logic circuits and writing VHDL code for Boolean functions.

    Original Description:

    VHDL QUESTION PAPER SET 1

    Original Title

    set-1

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    This document appears to be an exam for a Digital IC Applications course, containing 5 short answer questions and 5 longer questions requiring circuit diagrams, explanations or comparisons. The exam tests knowledge of topics like Schottky transistors, high threshold logic, VHDL programming structure and data types, binary decoders, CMOS inverter circuits, VHDL design flow, structural design elements in VHDL, 74*138 logic symbol and operations, using decoders to design larger decoders, and designing logic circuits and writing VHDL code for Boolean functions.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    33 views1 page

    Code: 1 3A04504 Set 1 R13 Ravindra College of Engineering For Women: Kurnool

    Uploaded by

    ShafiullaShaik
    This document appears to be an exam for a Digital IC Applications course, containing 5 short answer questions and 5 longer questions requiring circuit diagrams, explanations or comparisons. The exam tests knowledge of topics like Schottky transistors, high threshold logic, VHDL programming structure and data types, binary decoders, CMOS inverter circuits, VHDL design flow, structural design elements in VHDL, 74*138 logic symbol and operations, using decoders to design larger decoders, and designing logic circuits and writing VHDL code for Boolean functions.

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    Code: 1 3A04504 SET 1

    R13
    RAVINDRA COLLEGE OF ENGINEERING FOR WOMEN: KURNOOL
    Department of ELECTRONICS & COMMUNICATION ENGINEERING
    B.Tech III Year I Sem (R13) First Mid-term Examinations, 03 September, 2016
    DIGITAL IC APPLICATIONS
    Time: 90 minutes Max.Marks:30
    Part – A
    (Compulsory Question)
    Answer the following: (5 x 2 = 10 Marks)
    1.) How schottky transistors are formed and state its use?
    2) What is High Threshold Logic?
    3) Briefly describe the program structure of VHDL?
    4) What are the various types of objects in VHDL and give the necessary
    examples?
    5) What is a binary decoder? Draw its basic structure and logic diagram with truth
    table?
    Part-B
    Note: Answer TWO Questions; Either 2nd Question or 3rd Question &
    Either 4th Question or 5th question

    2a) Draw the resistive model of a CMOS inverter circuit and explain circuit
    behavior with resistive loads for LOW and HIGH outputs? 5M
    2b) Discuss the steps in VHDL design flow. 5M
    OR
    3a) Explain structural design elements of VHDL with example? 4M
    3 b) Draw the circuit diagram of two input 10KECl OR/NOR gate and explain its
    operation? 6M

    4a) Give the logic symbol for 74*138 and draw its logic diagram. Explain its
    operations with truth table? 6M
    4b) Explain the difference in program of VHDL and any other procedural
    language. Give example? 4M
    OR
    5a) Using two 74*138 decoders design a 4 to 16 DECODER? And write the
    VHDL
    Code for the above design 6M
    5b) Design the logic circuit and write a structural-flow style VHDL program for
    the following function? F(Q)=∏�, , , , , , , , ,9, , , ? 4M

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