Chapter 9 Communication and Bus Interfacing with the 8085/808¢ Microprocessor 9.1 INTRODUCTION powerful IC, used to perform various ALU functions with the help of daa fe the environment, For this, the microprocessor is connected with the memory and input/output devices si forms a microcomputer. The technique of connection herween input/output devices and a miicroprocess is known as in rs. Special attention must always be given during the connection of pins of perigted Sevices und microprocessor pins, as ICs cannot be simply connected, In the development of a micropro sowbased system, all memory ICs aud inpuvoutput devices are selected as per requirement of the syst and then interfaced with the microprocessor. Actually address, cata and control lines are weed for cone peripherals. After connecting properly, programs are written in the microprocessor. Programs will be dif ent for different applications, When the program is executed, the microprocessor communicates with itt Suiput devices and performs system operations, Iu this chapter, the interfacing of Programmable Keybo™ and Display Intertace 8279, Serial Communication Interface §251. Direct Memory Accors Controller $275 CRT Controiler, A/D converter and D/A Converter, Bus interface, RS 232C, [EEE-488, paralle! pi interface, $250 UART, 16550 UART and 8089 1710 processor ane explained. The microprocessor is a v 9.2. SERIAL COMMUNICATION INTERFACE 825 serlal data transfer is a method of data transfer in which one bit is transferred at a time. This ways used when the distance is greater than five metres. This method of transmission requires data lines compared to parallel transmission, Serial da Cais di ta transinis i implex. half and fudl-duplex data transf Sanission can be classified as simp! i In the hali-duplex system, data can be transferred ine nis ay : In the simplex serial. re one it be etna Sata-iransfer systein, data is transfer only in om. IY ither directi in one direction at a time O" ‘ull-tuplex system, data can be transnitied in both dicectione simul eis heats i neous! 53 The serial data-transfer systems can also he classified based on timing s gnals such as synch if Senco on Ha Banstee The difference between synchronous veg mine SRE Such 2 Table 9.1, nd asynchronous daCommunication and Bus Interfacing with the RORSIRORG Micropracecenr AOR, nchranous Data Transfi a ‘ acter Is In synchronous data transder, te transmission begins with pnd py a start bit and is followed by a stop bit. : jet bisa ogi 0. Te stop bites) is Carey a ‘est * a block header, which is a sequence of bits ¥When no io {Spi value Foe"? Since the dara sent iy synichiunous, the en indicated by the syne character(s). After that. the line with each word or 5,6, 7 oF & bits. sa be incladed along with cach word or snaracter data can be of 5. 6, 7 oF 8 bits A parity bit Gan character, Each character d In synchronous data transfer, the transmitter sends syucinonuus characters, which is a pattern af hits 10 indicate end of transmission jue at and stop Bits are sent with cach character. + Generally. the stop bits may be either one or more bits. {The stop bits must be cent at the end of the character. +s ieused to ensure that the start bit of the next ' will cause a start bit transition on the Tine. ivoaous mode data iansier is used for low-speed + ‘Synchronous mode data transfer is used for high-speed data transfer. Data can move in simplex, half-duplex and I duplex methods VAsynel | gata transfer. Data can move in simplex. half-duplex | and full-duplex methods. } duplex n | Inthis data wansfer, the transmitter is not synchronized + Tn synchronous ‘mode data transfer, the receiver and with the receiver by the same elock. The clock isan} transmitter is perfectly synchronized on the same clock integral multiple of the baud rate (number of bits per} pulse. second), Generally, this multiplication factor is 1, 16, or 64. i jynchronization between the receiver and transmitter i required only for the duration af a single character ‘Synchronism between the transmitter and receiver is maintained over a block of characters. | Asynchronous data transfer can be implemented by ' ‘Synchronous data transfer can be implemented by { hardware and sofiware. a i The 8251 is a powerful programmable communication interface IC through which the serial data trans- ‘a can be effectively carried out. The Programmable ‘Communication Interface 8251 is a programmable 1/0. ‘ice designed for serial communication. This IC can be used either in synchronous mode or asynchronous Mode. Therefore, it is called Universal Synchronous Asynchronous Receiver and Transmitter (USART). wee 1C chip is falnivated using N-channel silicon gate technology. The 8251 can be used to transmit and ras a dats, It accepts data in parallel format fiom the microprocessor and converts them into serial pay rinsmission. This IC also receives serial data and converts them into parallel and sends the data in is available in a 28 pin dual in-line package and has the following features . Synchronous and asynchronous operation peeruprannle data word ienytin, parity and stop bits 2atiy, overrun and framing error-checking inst uuctions and counting-loop imeractions : Peerammed for three different baud rates do ‘UpPorts up to 1.750 Mbps transmission rates UR NAO Write cho mstas om 8254 USART .406 Microprocessors and Microcomtolter * Divide-hy 116,64 mode * Halve start bit deletion 4 Number of stops increase af asynchronons dat + Full duplex double-buffered tunanitter and reee 4 Automatic break detection * Internal and external syne eb Peripheral modem control functions: son th ; inl used as the asynchronous serial interface between the Processor and also be used to generate the baud-rite ¢ Jock using external clock and convey yy ‘This IC can also be used fo convert incoming, serial data into paral viranster can be EbIt) Yor 2 bits aracter detection This device is. equipment, This IC cal ing parallel dita into serial ¢ nnd it can control the modem. 9.2.1 Functional Block Diagram ‘The functional block diagram of 8251 IC is shown in Fig. 9. 1. This IC consists of four major secticg, “e section. 1 namely, tansmiuter, receiver, modem contol and ni communicated with each other on an internal data bus for si hese four section ae oprocessor inte transfer. Data Bus |__| Transmit . Butler =>) --=} Butter lh wR- 1 RD N t T en E Read/Write [1a] [etx Roy Control KN Transmit “nier Logic lA Control 7 »/A)__,} L h4—T~c o—F —_ B coe , }«—! 8 i} Receiver |, DIR*+——} Modem 4__y Butfer RxD TIS ——r| Control KS RIS «J >» RDROY a — SYNDET/ BRKDET 8251 Fig. 9.1. Functional block diagram of 8251 IC