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Punjab Technical University: Computer Architecture

This document contains a summary of a 3 hour exam on computer architecture. It has 9 multiple choice questions divided into 3 sections. Section A is compulsory and contains 8 questions worth 2.5 marks each. Section B contains 4 questions worth 5 marks each to attempt any 4. Section C contains 2 questions worth 10 marks each to attempt any 2. The questions cover topics like interrupts, cache memory, CPI calculation, I/O, DMA, parallel computing, floating point subtraction, control unit, stack memory, interrupts handling, Booth multiplication, pipelining and transaction processing benchmarks.

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249 views

Punjab Technical University: Computer Architecture

This document contains a summary of a 3 hour exam on computer architecture. It has 9 multiple choice questions divided into 3 sections. Section A is compulsory and contains 8 questions worth 2.5 marks each. Section B contains 4 questions worth 5 marks each to attempt any 4. Section C contains 2 questions worth 10 marks each to attempt any 2. The questions cover topics like interrupts, cache memory, CPI calculation, I/O, DMA, parallel computing, floating point subtraction, control unit, stack memory, interrupts handling, Booth multiplication, pipelining and transaction processing benchmarks.

Uploaded by

sandeepapr
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

Roll No. ................. Total No.

of Pages : 02

m
Total No. of Questions : 09

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B.Tech.(CSE/IT) (Sem.–3)

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COMPUTER ARCHITECTURE
Subject Code : CS-201

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ap Paper ID : [A0451]
Time : 3 Hrs. Max. Marks : 60

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INSTRUCTION TO CANDIDATES :

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1. SECTION-A is COMPULSORY.
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2. Attempt any FOUR questions from SECTION-B.
3. Attempt any TWO questions from SECTION-C.
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SECTION-A (8 × 2.5 = 20 Marks)


ca
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1. (a) What are the advantages of interrupts in computers ?


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(b) What is the need for a cache memory ? Where is it located in a


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ch

computer ?
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(c) A given program consists of 50 instruction loop that is executed


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35 times. It takes 6,000 cycles to execute the program on a given


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system. Find the computer performance in CPI (cycles per


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instruction).
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(d) What do you understand by programmed I/O ?


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(e) What do you understand by I/O channel ?


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(f) What is Superscalar machine ?


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(g) List the functions of 8251.


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(h) What do you understand by the terms “loosely coupled” and


“tightly coupled” in parallel computers ?

[A-12]1324/1330
SECTION-B (4 × 5 = 20 Marks)

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2. With the help of a flow chart discuss the process of subtraction of

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floating point numbers. Also explain the issues involved in its hardware

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implementation.

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3. What is the need of control unit in computer ? Draw the control unit

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of a basic computer. Discuss how fetch and decode phases are
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carried out.
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4. Describe the principle of operation and role of Stack memory in
program execution. State the microinstructions executed in stack
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operation.
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5. Describe in detail the Daisy- chaining priority to handle interrupts
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with suitable example.


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6. Discuss the functions of DMA controller in data transfer between


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I/O & memory. Also state different modes of DMA operation.


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ch

SECTION-C (2 × 10 = 20 Marks)
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7. Use Booth multiplication algorithm to multiply 25 with 8. Show all the


steps clearly.
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8. A task can be carried out with a six stage pipeline with clock cycle
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of 8 ns. The same task can be done in a non pipeline unit in 40 ns.
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Determine the speed up ratio of the pipeline for 120 tasks. What is
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the maximum speed up that can be achieved ? Determine the number


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of clock cycles it takes to process 220 tasks.


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9. Write short notes on the following :


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(a) Transaction processing bench marks


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(b) SPMD

[A-12]1324/1330

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