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    Computer Architecture & Organization (1)

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    Computer Architecture & Organization (1)

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    10 views1 page

    Computer Architecture & Organization (1)

    Uploaded by

    2022ece.r109

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 1

    Code: CS20AOE502 R 20

    B.Tech III Year I Semester Regular Examinations February - 2023


    COMPUTER ARCHITECTURE & ORGANIZATION
    (Electronics & Communication Engineering)
    Time: 3 hrs. Max Marks: 60
    PART-A
    (Compulsory Question)
    1. Answer the following 05 x 02 = 10 Marks
    a) What is a micro-operation? 2M
    b) Define control word? 2M
    c) What are the two attractive features of Booth’s algorithm? 2M
    d) List out various modes of data transfers? 2M
    e) List out pipeline hazards? 2M
    PART-B
    Answer All five Units 05 x 10 = 50 Marks
    UNIT-I
    2. a) Explain about instruction cycle. 6M
    b) Explain the basic computer registers. 4M
    OR
    3. a) Explain in detail about the various instruction formats. 7M
    b) With suitable example, explain assembly language notation 3M
    UNIT-II
    4. a) Explain Micro instruction format. 5M
    b) Explain direct and indirect addressing modes with examples. 5M
    OR
    5. Draw and Explain the micro programmed control unit with a neat diagram. 10 M
    UNIT-III
    6. Draw the flowchart for addition and subtraction algorithm and Explain. 10 M
    OR
    7. Draw and Explain the hardware circuit for Booth’s multiplication with an example. 10 M
    UNIT-IV
    8. What is use of DMA? Explain about DMA controller with a neat diagram. 10 M
    OR
    9. Describe virtual-memory address-translation method based on the concept of 10 M
    fixed-length Pages with a neat block diagram.
    UNIT-V
    10. Explain Inter-processor communication and synchronization in a shared 10 M
    multiprocessor environment.
    OR
    11. Describe cache coherence and why it is important in shared memory 10 M
    multiprocessor systems? How can the problem be solved with a snoopy cache
    controller?

    *****

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