Freescale Semiconductor MPXV4006G

Technical Data Rev 6, 01/2007

Integrated Silicon Pressure Sensor

MPXV4006G
On-Chip Signal Conditioned,
Temperature Compensated
and Calibrated INTEGRATED
PRESSURE SENSOR
The MPXV4006G series piezoresistive transducer is a state-of-the-art 0 to 6 kPa (0 to 0.87 psi)
monolithic silicon pressure sensor designed for a wide range of applications, but 0.2 to 4.7 V OUTPUT
particularly those employing a microcontroller or microprocessor with A/D inputs.
This sensor combines a highly sensitive implanted strain gauge with advanced
micromachining techniques, thin-film metallization, and bipolar processing to
SMALL OUTLINE PACKAGE
provide an accurate, high level analog output signal that is proportional to the THROUGH-HOLE
applied pressure.

Features
J
• Temperature Compensated over 10° to 60°C
• Ideally Suited for Microprocessor or Microcontroller-Based Systems
• Available in Gauge Surface Mount (SMT) or Through-hole (DIP)
Configurations
• Durable Thermoplastic (PPS) Package MPXV4006G7U MPXV4006GC7U
CASE 482B-03 CASE 482C-03

MPXV4006G series pressure sensors are available in the basic element

package or with pressure ports. Two packing options are offered for the 482 and SMALL OUTLINE PACKAGE
482A case configurations. SURFACE MOUNT

ORDERING INFORMATION
Device Case MPX Series Order Packing
Options Marking
Type No. No. Options

Basic Element Only 482 MPXV4006G6U Rails MPXV4006G

Element
Element Only 482 MPXV4006G6T1 Tape & Reel MPXV4006G MPXV4006G6U/6T1 MPXV4006GC6U/C6T1
CASE 482-01 CASE 482A-01
Element Only 482B MPXV4006G7U Rails MPXV4006G

Ported Axial Port 482A MPXV4006GC6U Rails MPXV4006G

Element
Axial Port 482A MPXV4006GC6T1 Tape & Reel MPXV4006G

Axial Port 482C MPXV4006GC7U Rails MPXV4006G

Side Port 1369 MPXV4006GP Trays MPXV4006G

MPXV4006DP MPXV4006GP
Dual Port 1351 MPXV4006DP Trays MPXV4006G
CASE 1351-01 CASE 1369-01

PIN NUMBERS(1)
1 N/C 5 N/C
2 VS 6 N/C
3 Gnd 7 N/C
4 Vout 8 N/C

1. Pins 1, 5, 6, 7, and 8 are internal device

connections. Do not connect to external
circuitry or ground. Pin 1 is noted by the
notch i n the lead.

© Freescale Semiconductor, Inc., 2007. All rights reserved.

 VS

Thin Film Gain Stage #2

Temperature and
Sensing Vout
Compensation Ground
Element
and Reference
Gain Stage #1 Shift Circuitry

Pins 1, 5, 6, 7, and 8 are NO CONNECTS

GND for small outline package device

Figure 1. Fully Integrated Pressure Sensor Schematic

Table 1. Maximum Ratings(1)

Parametrics Symbol Value Units
Maximum Pressure (P1 >P2) Pmax 24 kPa
Storage Temperature Tstg -30° to +100° °C
Operating Temperature TA -10° to +60° °C

1. Exposure beyond the specified limits may cause permanent damage or degradation to the device.

Table 2. Operating Characteristics

Characteristic Symbol Min Typ Max Unit

Pressure Range POP 0 — 6.0 kPa

Supply Voltage(1) VS 4.75 5.0 5.25 Vdc

Supply Current IS — — 10 mAdc

Full Scale Output(2) (RF = 51kΩ) VFSS — 4.6 — V

Offset(3)(5) (RF = 51kΩ) Voff 0.100 0.225 0.430 V

Sensitivity V/P — 766 — mV/kPa

Accuracy (4)(5) (10 to 60°C) — — — ±5.0 %VFSS

1. Device is ratiometric within this specified excitation range.

2. Full Scale Span (VFSS) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the
minimum rated pressure.
3. Offset (Voff) is defined as the output voltage at the minimum rated pressure.
4. Accuracy (error budget) consists of the following:
• Linearity: Output deviation from a straight line relationship with pressure over the specified pressure range.
• Temperature Hysteresis: Output deviation at any temperature within the operating temperature range, after the temperature is cycled to
and from the minimum or maximum operating temperature points, with zero differential pressure applied.
• Pressure Hysteresis: Output deviation at any pressure within the specified range, when this pressure is cycled to and from minimum
or maximum rated pressure, at 25°C.
• Offset Stability: Output deviation, after 1000 temperature cycles, -30 to 100°C, and 1.5 million pressure cycles, with
minimum rated pressure applied.
• TcSpan: Output deviation over the temperature range of 10° to 60°C, relative to 25°C.
• TcOffset: Output deviation with minimum pressure applied, over the temperature range of 10° to 60°C, relative to 25°C.
5. Auto Zero at Factory Installation: Due to the sensitivity of the MPXV4006G, external mechanical stresses and mounting position can affect
the zero pressure output reading. To obtain the 5% FSS accuracy, the device output must be “autozeroed'' after installation. Autozeroing is
defined as storing the zero pressure output reading and subtracting this from the device's output during normal operations.

MPXV4006G
Sensors
2 Freescale Semiconductor
 ON-CHIP TEMPERATURE COMPENSATION, CALIBRATION, AND SIGNAL CONDITIONING
The performance over temperature is achieved by from the factory. Contact the factory for information regarding
integrating the shear-stress strain gauge, temperature media tolerance in your application.
compensation, calibration and signal conditioning circuitry Figure 3 shows the recommended decoupling circuit for
onto a single monolithic chip. interfacing the output of the integrated sensor to the A/D input
Figure 2 illustrates the gauge configuration in the basic of a microprocessor or microcontroller. Proper decoupling of
chip carrier (Case 482). A fluorosilicone gel isolates the die the power supply is recommended.
surface and wire bonds from the environment, while allowing Figure 4 shows the sensor output signal relative to
the pressure signal to be transmitted to the silicon diaphragm. pressure input. Typical, minimum and maximum output
The MPXV4006G series sensor operating characteristics curves are shown for operation over a temperature range of
are based on use of dry air as pressure media. Media, other 10°C to 60°C using the decoupling circuit shown in Figure 3.
than dry air, may have adverse effects on sensor The output will saturate outside of the specified pressure
performance and long-term reliability. Internal reliability and range.
qualification test for dry air, and other media, are available

Fluorosilicone
Gel Die Coat Die Stainless
Steel Cap +5 V

P1
Wire
Thermoplastic OUTPUT
Bond Vout
Case Vs

IPS
Lead
Frame
1.0 µF 0.01 µF GND 470 pF

P2
Differential Sensing Die Bond
Element

Figure 3. Recommended Power Supply Decoupling

Figure 2. Cross Sectional Diagram SOP and Output Filtering Recommendations
(Not to Scale) (For additional output filtering, please refer to
Application Note AN1646.)

5
Transfer Function:
4.5 Vout = VS*[(0.1533*P) + 0.045] ± 5% VFSS
4 VS = 5.0 V ± 0.25 Vdc
TEMP = 10 to 60° C
3.5
3 Typical
Output (V)

2.5
2
Max
1.5 Min
1
0.5
0
0 3 6
Differential Pressure (kPa)
See Note 5 in Operating Characteristics

Figure 4. Output versus Pressure Differential

MPXV4006G
Sensors
Freescale Semiconductor 3
 PRESSURE (P1)/VACUUM (P2) SIDE IDENTIFICATION TABLE
Freescale designates the two sides of the pressure sensor designed to operate with positive differential pressure
as the Pressure (P1) side and the Vacuum (P2) side. The applied, P1 > P2.
Pressure (P1) side is the side containing silicone gel which The Pressure (P1) side may be identified by using the
isolates the die from the environment. The pressure sensor is table below:

Table 3. Pressure (P1)/Vacuum (P2) Side Identification Table

Part Number Case Type Pressure (P1) Side Identifier

MPXV4006G6U/T1 482 Stainless Steel Cap

MPXV4006GC6U/T1 482A Side with Port Attached

MPXV4006G7U 482B Stainless Steel Cap

MPXV4006GC7U 482C Side with Port Attached

MPXV4006GP 1369 Side with Port Attached

MPXV4006DP 1351 Side with Part Marking

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total footprint, the packages will self align when subjected to a
design. The footprint for the surface mount packages must be solder reflow process. It is always recommended to design
the correct size to ensure proper solder connection interface boards with a solder mask layer to avoid bridging and
between the board and the package. With the correct shorting between solder pads.

0.100 TYP
0.660 2.54
16.76

0.060 TYP 8X
1.52 0.300
7.62

0.100 TYP 8X inch

2.54 mm

Figure 5. SOP Footprint (Case 482)

MPXV4006G
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4 Freescale Semiconductor
 PACKAGE DIMENSIONS

-A-
D 8 PL
4 0.25 (0.010) M T B S A S
5 NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
-B- 3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
G 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006).
8 5. ALL VERTICAL SURFACES 5˚ TYPICAL DRAFT.
1
INCHES MILLIMETERS
S DIM MIN MAX MIN MAX
A 0.415 0.425 10.54 10.79
B 0.415 0.425 10.54 10.79
C 0.212 0.230 5.38 5.84
N D 0.038 0.042 0.96 1.07
G 0.100 BSC 2.54 BSC
H 0.002 0.010 0.05 0.25
J 0.009 0.011 0.23 0.28
C H
K 0.061 0.071 1.55 1.80
J
-T- M 0˚ 7˚ 0˚ 7˚
N 0.405 0.415 10.29 10.54
PIN 1 IDENTIFIER SEATING S 0.709 0.725 18.01 18.41
PLANE
K M

CASE 482-01
ISSUE O
SMALL OUTLINE PACKAGE
SURFACE MOUNT

-A- D 8 PL
4 0.25 (0.010) M T B S A S NOTES:
5 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
N -B- 3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006).
G 5. ALL VERTICAL SURFACES 5˚ TYPICAL DRAFT.
8
1
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
S A 0.415 0.425 10.54 10.79
W B 0.415 0.425 10.54 10.79
C 0.500 0.520 12.70 13.21
D 0.038 0.042 0.96 1.07
G 0.100 BSC 2.54 BSC
H 0.002 0.010 0.05 0.25
V J 0.009 0.011 0.23 0.28
K 0.061 0.071 1.55 1.80
C M 0˚ 7˚ 0˚ 7˚
N 0.444 0.448 11.28 11.38
S 0.709 0.725 18.01 18.41
H V 0.245 0.255 6.22 6.48
J W 0.115 0.125 2.92 3.17
-T-
PIN 1 IDENTIFIER SEATING
M PLANE
K

CASE 482A-01
ISSUE A
SMALL OUTLINE PACKAGE
SURFACE MOUNT

MPXV4006G
Sensors
Freescale Semiconductor 5
 PACKAGE DIMENSIONS

-A-
NOTES:
4 1. DIMENSIONING AND TOLERANCING PER
5 ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION A AND B DO NOT INCLUDE
-B- MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006).
G 5. ALL VERTICAL SURFACES 5˚ TYPICAL DRAFT.
8 6. DIMENSION S TO CENTER OF LEAD WHEN
1 D 8 PL
FORMED PARALLEL.
0.25 (0.010) M T B S A S
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
DETAIL X A 0.415 0.425 10.54 10.79
S
B 0.415 0.425 10.54 10.79
C 0.210 0.220 5.33 5.59
PIN 1 IDENTIFIER D 0.026 0.034 0.66 0.864
N
G 0.100 BSC 2.54 BSC
J 0.009 0.011 0.23 0.28
K 0.100 0.120 2.54 3.05
C M 0˚ 15˚ 0˚ 15˚
SEATING N 0.405 0.415 10.29 10.54
-T- PLANE S 0.540 0.560 13.72 14.22
K
M
J
DETAIL X

CASE 482B-03
ISSUE B
SMALL OUTLINE PACKAGE
THROUGH-HOLE

NOTES:
1. DIMENSIONING AND TOLERANCING PER
-A- ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4 3. DIMENSION A AND B DO NOT INCLUDE
5 MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006).
5. ALL VERTICAL SURFACES 5˚ TYPICAL DRAFT.
N -B- 6. DIMENSION S TO CENTER OF LEAD WHEN
D 8 PL FORMED PARALLEL.
G
8 0.25 (0.010) M T B S A S INCHES MILLIMETERS
1 DIM MIN MAX MIN MAX
DETAIL X A 0.415 0.425 10.54 10.79
B 0.415 0.425 10.54 10.79
S C 0.500 0.520 12.70 13.21
W D 0.026 0.034 0.66 0.864
G 0.100 BSC 2.54 BSC
J 0.009 0.011 0.23 0.28
K 0.100 0.120 2.54 3.05
V PIN 1 M 0˚ 15˚ 0˚ 15˚
IDENTIFIER N 0.444 0.448 11.28 11.38
S 0.540 0.560 13.72 14.22
C V 0.245 0.255 6.22 6.48
W 0.115 0.125 2.92 3.17

SEATING
-T- PLANE
K
M
J
DETAIL X

CASE 482C-03
ISSUE B
SMALL OUTLINE PACKAGE
THROUGH-HOLE

MPXV4006G
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6 Freescale Semiconductor
 PACKAGE DIMENSIONS

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CASE 1351-01
ISSUE A
SMALL OUTLINE PACKAGE
SURFACE MOUNT

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 PACKAGE DIMENSIONS

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CASE 1351-01
ISSUE A
SMALL OUTLINE PACKAGE
SURFACE MOUNT

MPXV4006G
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 PACKAGE DIMENSIONS

PAGE 1 OF 2
CASE 1369-01
ISSUE B
SMALL OUTLINE PACKAGE
SURFACE MOUNT

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 PACKAGE DIMENSIONS

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CASE 1369-01
ISSUE B
SMALL OUTLINE PACKAGE
SURFACE MOUNT

MPXV4006G
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MPXV4006G
Rev. 6
01/2007