AOZ1267QI-01: General Description Features
AOZ1267QI-01: General Description Features
AOZ1267QI-01: General Description Features
Typical Application
RTON
Input
TON IN 6.5V to 28V
C2
BST 20μF
VCC C5
0.1μF
R3 C4
100kΩ 1μF AOZ1267-01
Output
Power Good PGOOD LX 1.05V, 8A
L1 R1
1μH 25kΩ
Off On EN 1%
FB C3
R2 88μF
PFM 80kΩ
1%
SS AGND
CSS
PGND
RTON
Input
TON IN 2.7V to 28V
C2
AIN 20μF
BST
5V VCC C5
0.1μF
R3 C4
100kΩ 1μF AOZ1267-01
Output
Power Good PGOOD LX 1.05V, 8A
L1 R1
1μH 25kΩ
Off On EN 1%
FB C3
R2 88μF
PFM 80kΩ
1%
SS AGND
CSS
PGND
Ordering Information
Part Number Ambient Temperature Range Package Environmental
AOZ1267QI-01 -40°C to +85°C 23-Pin 4mm x 4mm QFN Green Product
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
PGND
VCC
BST
SS
LX
IN
23 22 21 20 19 18
PGOOD 1 17 LX
EN 2 16 LX
PFM 3 15 PGND
IN LX
AGND 4 14 PGND
FB 5 13 PGND
TON 6 12 PGND
7 8 9 10 11
AIN
IN
IN
LX
LX
Pin Description
Pin Number Pin Name Pin Function
Power Good Signal Output. PGOOD is an open-drain output used to indicate the status
of the output voltage. It is internally pulled low when the output voltage is 15% lower than
1 PGOOD
the nominal regulation voltage for 50µs (typical time) or 15% higher than the nominal
regulation voltage. PGOOD is pulled low during soft-start and shut down.
Enable Input. The AOZ1267-01 is enabled when EN is pulled high. The device shuts
2 EN
down when EN is pulled low.
PFM Selection Input. Connect PFM pin to VCC/VIN for forced PWM operation. Connect
3 PFM
PFM pin to ground for PFM operation to improve light load efficiency.
4 AGND Analog Ground.
Feedback Input. Adjust the output voltage with a resistive voltage-divider between the
5 FB
regulator’s output and AGND.
6 TON On-Time Setting Input. Connect a resistor between VIN and TON to set the on time.
7 AIN Supply Input for analog functions.
8, 9, 22 IN Supply Input. IN is the regulator input. All IN pins must be connected together.
12, 13, 14, 15, 19 PGND Power Ground.
10, 11, 16, 17, 18 LX Switching Node.
Bootstrap Capacitor Connection. The AOZ1267-01 includes an internal bootstrap diode.
20 BST Connect an external capacitor between BST and LX as shown in the Typical Application
diagrams.
Supply Input for analog functions. Bypass VCC to AGND with a 1µF ceramic capacitor.
21 VCC
Place the capacitor close to VCC pin.
Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the
23 SS
soft-start time.
Electrical Characteristics
TA = 25°C, VIN = 12V, VCC = 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.
LDO
VCC
EN UVLO TOFF_MIN
Reference Q PG Logic
& Bias Error Comp Timer
0.8V
SS S
Q
ISENCE R
(AC) FB ILIM Comp LX
FB Decode
ILIM_VALLEY
Current ISENSE
ISENSE Information
Processing ISENSE (AC)
OTP
Vcc
TON
Q
Timer
PFM EN
TON TON Light Load
Generator Comp
PGND AGND
VLX
20V/div
VLX
10V/div
ILX
ILX 2A/div
2A/div
Vo ripple Vo ripple
20mV/div 50mV/div
5μs/div 1ms/div
VLX
20V/div
EN ILX
2V/div 5A/div
lLX
5A/div
Vo
500mV/div
Vo
1V/div LX
10V/div
500μs/div 50μs/div
TSS(s) = 330 x CSS(nF) Once the product of VIN x TON is constant, the switching
frequency keeps constant and is independent with input
If CSS is 1nF, the soft-start time will be 330µs; if CSS is
voltage.
10nF, the soft-start time will be 3.3ms.
Application Information
The basic AOZ1267-01 application circuit is shown in For reliable operation and best performance, the input
page 2. Component selection is explained below. capacitors must have current rating higher than ICIN-RMS
at worst operating conditions. Ceramic capacitors are
Input Capacitor preferred for input capacitors because of their low ESR
The input capacitor must be connected to the IN pins and and high ripple current rating. Depending on the
PGND pin of the AOZ1267-01 to maintain steady input application circuits, other low ESR tantalum capacitor or
voltage and filter out the pulsing input current. A small aluminum electrolytic capacitor may also be used. When
decoupling capacitor, usually 1F, should be connected selecting ceramic capacitors, X5R or X7R type dielectric
to the VCC pin and AGND pin for stable operation of the ceramic capacitors are preferred for their better
AOZ1267-01. The voltage rating of input capacitor must temperature and voltage characteristics. Note that the
be greater than maximum input voltage plus ripple ripple current rating from capacitor manufactures is
voltage. based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.
The input ripple voltage can be approximated by
equation below: Inductor
The inductor is used to supply constant current to output
IO VO VO
V IN = ----------------- 1 – --------- --------- when it is driven by a switching voltage. For given input
f C IN V IN V IN and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is VO VO
I L = ----------- 1 – ---------
another concern when selecting the capacitor. For a buck fL V IN
circuit, the RMS value of input capacitor current can be
calculated by: The peak inductor current is:
VO VO I L
I CIN_RMS = I O --------- 1 – --------- I Lpeak = I O + --------
V IN V IN 2
if let m equal the conversion ratio: High inductance gives low inductor ripple current but
requires a larger size inductor to avoid saturation. Low
VO
--------
- = m ripple current reduces inductor core losses. It also
V IN reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 30% to
The relation between the input capacitor RMS current
50% of output current.
and voltage conversion ratio is calculated and shown in
Figure 3. It can be seen that when VO is half of VIN, CIN it When selecting the inductor, make sure it is able to
is under the worst current stress. The worst current handle the peak current without saturation even at the
stress on CIN is 0.5 x IO. highest operating temperature.
Output Capacitor inductor ripple current is high, the output capacitor could
The output capacitor is selected based on the DC output be overstressed.
voltage rating, output ripple voltage specification and
ripple current rating. Thermal Management and Layout
Consideration
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output In the AOZ1267-01 buck regulator circuit, high pulsing
voltage including ripple. De-rating needs to be current flows through two circuit loops. The first loop
considered for long term reliability. starts from the input capacitors, to the VIN pin, to the LX
pins, to the filter inductor, to the output capacitor and
Output ripple voltage specification is another important load, and then returns to the input capacitor through
factor for selecting the output capacitor. In a buck con- ground. Current flows in the first loop when the high side
verter circuit, output ripple voltage is determined by switch is on. The second loop starts from the inductor, to
inductor value, switching frequency, output capacitor the output capacitors and load, to the low side switch.
value and ESR. It can be calculated by the equation Current flows in the second loop when the low side
below: switch is on.
1
V O = I L ESR CO + ------------------------- In PCB layout, minimizing the two loops area reduces the
8fC noise of this circuit and improves efficiency. A ground
O
plane is strongly recommended to connect the input
where,
capacitor, output capacitor and PGND pin of the
CO is output capacitor value and AOZ1267-01.
ESRCO is the Equivalent Series Resistor of output capacitor.
In the AOZ1267-01 buck regulator circuit, the major
When a low ESR ceramic capacitor is used as output power dissipating components are the AOZ1267-01 and
capacitor, the impedance of the capacitor at the output inductor. The total power dissipation of the con-
switching frequency dominates. Output ripple is mainly verter circuit can be measured by input power minus out-
caused by capacitor value and inductor ripple current. put power.
The output ripple voltage calculation can be simplified to:
P total_loss = V IN I IN – V O I O
1
V O = I L -------------------------
8 f CO The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor and
If the impedance of ESR at switching frequency output current.
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output P inductor_loss = IO2 R inductor 1.1
ripple voltage calculation can be further simplified to:
The actual junction temperature can be calculated with
V O = I L ESR CO
power dissipation in the AOZ1267-01 and thermal
impedance from junction to ambient.
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type T junction = P total_loss – P inductor_loss JA
of ceramic, or other low ESR tantalum are recommended
to be used as output capacitors.
The maximum junction temperature of AOZ1267-01 is
In a buck converter, output capacitor current is 150ºC, which limits the maximum load current capability.
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current. The thermal performance of the AOZ1267-01 is strongly
It can be calculated by: affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
I L operate under the recommended environmental
I CO_RMS = ----------
12 conditions.
Layout Considerations
Several layout tips are listed below for the best electric
and thermal performance.
1. The LX pins and pad are connected to internal low 4. Decoupling capacitor CVCC should be connected to
side switch drain. They are low resistance thermal VCC and AGND as close as possible.
conduction path and most noisy switching node. 5. Voltage divider R1 and R2 should be placed as close
Connect a large copper plane to LX pin to help as possible to FB and AGND.
thermal dissipation.
6. RTON should be put on PCB reverse side of feedback
2. The IN pins and pad are connected to internal high network or away from FB pin and FB feedback resis-
side switch drain. They are also low resistance tors to avoid unwanted touch to short Ton pin and FB
thermal conduction path. Connect a large copper together to ground to cause improperly operation.
plane to IN pins to help thermal dissipation.
7. A ground plane is preferred; Pin 19 (PGND) must be
3. Input capacitors should be connected to the IN pin connected to the ground plane through via.
and the PGND pin as close as possible to reduce the
switching spikes. 8. Keep sensitive signal traces such as feedback trace
far away from the LX pins.
9. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
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L3
L2
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TOP VIEW
BOTTOM VIEW
A1
A
A2
SIDE VIEW
Notes:
1. Controlling dimensions are in millimeters. Converted inch dimensions are not necessarily exact.
2. Tolerance: ± 0.05 unless otherwise specified.
3. Radius on all corners is 0.152 max., unless otherwise specified.
4. Package wrapage: 0.012 max.
5. No plastic flash allowed on the top and bottom lead surface.
6. Pad planarity: ± 0.102
7. Crack between plastic body and lead is not allowed.
Carrier Tape
P1
D1 P2
T
E1
E2
E
B0
K0 D0
P0 A0
Feeding Direction
UNIT: mm
Package A0 B0 K0 D0 D1 E E1 E2 P0 P1 P2 T
QFN 4x4 4.35 4.35 1.10 1.50 1.50 12.00 1.75 5.50 8.00 4.00 2.00 0.30
(12mm) ±0.10 ±0.10 ±0.10 Min. +0.10/-0 ±0.30 ±0.10 ±0.05 ±0.10 ±0.10 ±0.05 ±0.05
Reel W1
S
G
M N
K
V
W
UNIT: mm
Tape Size Reel Size M N W W1 H K S G R V
12mm ø330 ø330.0 ø79.0 12.4 17.0 ø13.0 10.5 2.0 — — —
±2.0 ±1.0 +2.0/-0.0 +2.6/-1.2 ±0.5 ±0.2 ±0.5
Part Marking
AOZ1267QI-01
(QFN4x4)
Z1267QI1
Part Number Code
FAYWLT
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COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
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systems which, (a) are intended for surgical implant into support, device, or system whose failure to perform can
the body or (b) support or sustain life, and (c) whose be reasonably expected to cause the failure of the life
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reasonably expected to result in a significant injury of
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