AOZ1267QI-01: General Description Features

Download as pdf or txt
Download as pdf or txt
You are on page 1of 16

AOZ1267QI-01

28V/8A Synchronous EZBuckTM Regulator

General Description Features


The AOZ1267-01 is a high-efficiency, easy-to-use DC/DC  Wide input voltage range
synchronous buck regulator that operates up to 28V. – 2.7V to 28V
The device is capable of supplying 8A of continuous
 8A continuous output current
output current with an output voltage adjustable down to
0.8V (±1.0%).  Output voltage adjustable down to 0.8V (±1.0%)
 Low RDS(ON) internal NFETs
The AOZ1267-01 integrates an internal linear regulator
– 35m high-side
to generate 5.3V VCC from input. If input voltage is lower
than 5.3V, the linear regulator operates at low drop- – 12m low-side
output mode, which allows the VCC voltage is equal to  Constant On-Time with input feed-forward
input voltage minus the drop-output voltage of the  Programmable frequency up to 1MHz
internal linear regulator.
 Selectable PFM light load operation
A proprietary constant on-time PWM control with input  Ceramic capacitor stable
feed-forward results in ultra-fast transient response while  Adjustable soft start
maintaining relatively constant switching frequency over
 Power Good output
the entire input voltage range. The switching frequency
can be externally programmed up to 1MHz.  Integrated bootstrap diode
 Cycle-by-cycle current limit
The device features multiple protection functions such as  Short-circuit protection
VCC under-voltage lockout, cycle-by-cycle current limit,
output over-voltage protection, short-circuit protection, as  Thermal shutdown
well as thermal shutdown.  Thermally enhanced 4mm x 4mm QFN-23L package

The AOZ1267-01 is available in a 4mm x 4mm QFN-23L Applications


package and is rated over a -40°C to +85°C ambient
 Portable computers
temperature range.
 Compact desktop PCs
 Servers
 Graphics cards
 Set-top boxes
 LCD TVs
 Cable modems
 Point-of-load DC/DC converters
 Telecom/Networking/Datacom equipment

Rev. 3.0 March 2014 www.aosmd.com Page 1 of 16


AOZ1267QI-01

Typical Application

RTON
Input
TON IN 6.5V to 28V
C2
BST 20μF
VCC C5
0.1μF
R3 C4
100kΩ 1μF AOZ1267-01
Output
Power Good PGOOD LX 1.05V, 8A
L1 R1
1μH 25kΩ
Off On EN 1%
FB C3
R2 88μF
PFM 80kΩ
1%
SS AGND
CSS
PGND

External 5V VCC Bias

RTON
Input
TON IN 2.7V to 28V
C2
AIN 20μF
BST
5V VCC C5
0.1μF
R3 C4
100kΩ 1μF AOZ1267-01
Output
Power Good PGOOD LX 1.05V, 8A
L1 R1
1μH 25kΩ
Off On EN 1%
FB C3
R2 88μF
PFM 80kΩ
1%
SS AGND
CSS
PGND

Rev. 3.0 March 2014 www.aosmd.com Page 2 of 16


AOZ1267QI-01

Ordering Information
Part Number Ambient Temperature Range Package Environmental
AOZ1267QI-01 -40°C to +85°C 23-Pin 4mm x 4mm QFN Green Product

AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.

Pin Configuration

PGND
VCC

BST
SS

LX
IN
23 22 21 20 19 18

PGOOD 1 17 LX

EN 2 16 LX

PFM 3 15 PGND
IN LX
AGND 4 14 PGND

FB 5 13 PGND

TON 6 12 PGND
7 8 9 10 11
AIN

IN

IN

LX

LX

23-Pin 4mm x 4mm QFN


(Top View)

Rev. 3.0 March 2014 www.aosmd.com Page 3 of 16


AOZ1267QI-01

Pin Description
Pin Number Pin Name Pin Function
Power Good Signal Output. PGOOD is an open-drain output used to indicate the status
of the output voltage. It is internally pulled low when the output voltage is 15% lower than
1 PGOOD
the nominal regulation voltage for 50µs (typical time) or 15% higher than the nominal
regulation voltage. PGOOD is pulled low during soft-start and shut down.
Enable Input. The AOZ1267-01 is enabled when EN is pulled high. The device shuts
2 EN
down when EN is pulled low.
PFM Selection Input. Connect PFM pin to VCC/VIN for forced PWM operation. Connect
3 PFM
PFM pin to ground for PFM operation to improve light load efficiency.
4 AGND Analog Ground.
Feedback Input. Adjust the output voltage with a resistive voltage-divider between the
5 FB
regulator’s output and AGND.
6 TON On-Time Setting Input. Connect a resistor between VIN and TON to set the on time.
7 AIN Supply Input for analog functions.
8, 9, 22 IN Supply Input. IN is the regulator input. All IN pins must be connected together.
12, 13, 14, 15, 19 PGND Power Ground.
10, 11, 16, 17, 18 LX Switching Node.
Bootstrap Capacitor Connection. The AOZ1267-01 includes an internal bootstrap diode.
20 BST Connect an external capacitor between BST and LX as shown in the Typical Application
diagrams.
Supply Input for analog functions. Bypass VCC to AGND with a 1µF ceramic capacitor.
21 VCC
Place the capacitor close to VCC pin.
Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the
23 SS
soft-start time.

Rev. 3.0 March 2014 www.aosmd.com Page 4 of 16


AOZ1267QI-01

Absolute Maximum Ratings Maximum Operating Ratings


Exceeding the Absolute Maximum Ratings may damage the
The device is not guaranteed to operate beyond the
device.
Maximum Operating ratings.
Parameter Rating
Parameter Rating
IN, TON to AGND -0.3V to 30V
Supply Voltage (VIN) 2.7V(3) to 28V
LX to AGND -2V to 30V
Output Voltage Range 0.8V to 0.85*VIN
BST to AGND -0.3V to 40V
Ambient Temperature (TA) -40°C to +85°C
SS, PGOOD, FB, EN, VCC, PFM to AGND -0.3V to 6V
Package Thermal Resistance
PGND to AGND -0.3V to +0.3V
(θJA) 40°C/W
Junction Temperature (TJ) +150°C
(θJC) 4.5°C/W
Storage Temperature (TS) -65°C to +150°C
Note:
(1)
ESD Rating 2kV 3. Connect VCC to external 5V for VIN = 2.7V ~ 6.5V application.
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5k in series with 100pF.
2. LX to PGND Transient (t<20ns) ------ -7V to VIN + 7V.

Electrical Characteristics
TA = 25°C, VIN = 12V, VCC = 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.

Symbol Parameter Conditions Min. Typ. Max Units


VIN IN Supply Voltage 2.7 28 V
AIN rising 4.0 4.4
VUVLO Under-Voltage Lockout Threshold V
AIN falling 3.2 3.7
Iq Quiescent Supply Current IOUT = 0, VFB = 1V, VEN > 2V 2 3 mA
IOFF Shutdown Supply Current VEN = 0V 1 20 A
TA = 25°C 0.792 0.800 0.808
VFB Feedback Voltage V
TA = 0°C to 85°C 0.788 0.800 0.812
Load Regulation 0.5 %
Line Regulation 1 %
IFB FB Input Bias Current 200 nA
Enable
Off threshold 0.5
VEN EN Input Threshold V
On threshold 2.5
VEN_HYS EN Input Hysteresis 200 mV
PFM Control
PFM Mode threshold 0.5
VPFM PFM Input Threshold V
Force PWM threshold 2.5
VPFMHYS PFM Input Hysteresis 100 mV
Modulator
RTON = 100k, VIN = 12V 200 250 300
TON On Time ns
RTON = 100k, VIN = 28V 150
TON_MIN Minimum On Time 100 ns
TOFF_MIN Minimum Off Time 250 ns

Rev. 3.0 March 2014 www.aosmd.com Page 5 of 16


AOZ1267QI-01

Electrical Characteristics (Continued)


TA = 25°C, VIN = 12V, VCC = 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.

Symbol Parameter Conditions Min. Typ. Max Units


Soft-Start
ISS_OUT SS Source Current VSS = 0
7 10 15 A
CSS = 0.001F to 0.1F
Power Good Signal
VPG_LOW PGOOD Low Voltage IOL = 1mA 0.5 V
PGOOD Leakage Current ±1 A
VPGH PGOOD Threshold FB rising 87 90 93
%
(Low Level to High Level) FB falling 109 112 115
VPGL PGOOD Threshold FB rising 112 115 118
%
(High Level to Low Level) FB falling 82 85 88
PGOOD Threshold Hysteresis 3 %
TPG_L PGOOD Fault Delay Time (FB falling) 50 s
Under Voltage and Over Voltage Protection
VPL Under Voltage Threshold FB falling 82 85 88 %
TPL Under Voltage Delay Time 128 s
VPH Over Voltage Threshold FB rising 112 115 118 %
TUV_LX Under Voltage Shutdown Blanking Time VIN = 12V, VEN = 0V, VCC = 5V 20 ms
Power Stage Output
RDS(ON) High-Side NFET On-Resistance VIN = 12V, VCC = 5V 35 45 m
High-Side NFET Leakage VEN = 0V, VLX = 0V 10 A
RDS(ON) Low-Side NFET On-Resistance VLX = 12V, VCC = 5V 12 15 m
Low-Side NFET Leakage VEN = 0V 10 A
Over-current and Thermal Protection
ILIM Valley Current Limit VCC = 5V 8 A
TJ rising 145
Thermal Shutdown Threshold °C
TJ falling 100

Rev. 3.0 March 2014 www.aosmd.com Page 6 of 16


AOZ1267QI-01

Functional Block Diagram


BST AIN IN PGood

LDO

VCC

EN UVLO TOFF_MIN
Reference Q PG Logic
& Bias Error Comp Timer
0.8V
SS S
Q
ISENCE R
(AC) FB ILIM Comp LX
FB Decode
ILIM_VALLEY
Current ISENSE
ISENSE Information
Processing ISENSE (AC)
OTP
Vcc
TON
Q
Timer
PFM EN
TON TON Light Load
Generator Comp

Light Load ISENSE


Threshold

PGND AGND

Rev. 3.0 March 2014 www.aosmd.com Page 7 of 16


AOZ1267QI-01

Typical Performance Characteristics


Circuit of Typical Application. TA = 25°C, VIN = 19V, VOUT = 1.05V, fs = 450kHz unless otherwise specified.

Normal Operation Load Transient 0.8A to 7.2A

VLX
20V/div
VLX
10V/div
ILX
ILX 2A/div
2A/div

Vo ripple Vo ripple
20mV/div 50mV/div

5μs/div 1ms/div

Full Load Start-up Full Load Short

VLX
20V/div

EN ILX
2V/div 5A/div

lLX
5A/div
Vo
500mV/div
Vo
1V/div LX
10V/div

500μs/div 50μs/div

Rev. 3.0 March 2014 www.aosmd.com Page 8 of 16


AOZ1267QI-01

Detailed Description Constant-On-Time PWM Control with Input


Feed-Forward
The AOZ1267-01 is a high-efficiency, easy-to-use,
synchronous buck regulator optimized for notebook The control algorithm of AOZ1267-01 is constant-on-time
computers. The regulator is capable of supplying 8A of PWM Control with input feed-forward.
continuous output current with an output voltage
The simplified control schematic is shown in Figure 1.
adjustable down to 0.8V. The programmable operating
frequency range of 200kHz to 1MHz enables optimizing FB Voltage/
the configuration for PCB area and efficiency. IN AC Current
Information
The input voltage of AOZ1267-01 can be as low as 2.7V. –
PWM Programmable
The highest input voltage of AOZ1267-01 can be 28V. Comp
Constant on-time PWM with input feed-forward control One-Shot
+ 0.8V
scheme results in ultra-fast transient response while
maintaining relatively constant switching frequency over
the entire input range. True AC current mode control
Figure 1. Simplified Control Schematic of AOZ1267-01
scheme guarantees the regulator can be stable with a
ceramic output capacitor. The switching frequency can The high-side switch on-time is determined solely by a
be externally programmed up to 1MHz. Protection one-shot whose pulse width can be programmed by one
features include VCC under-voltage lockout, valley external resistor and is inversely proportional to input
current limit, output over voltage and under voltage voltage (IN). The one-shot is triggered when the internal
protection, short-circuit protection, and thermal 0.8V is lower than the combined information of FB
shutdown. voltage and the AC current information of inductor, which
is processed and obtained through the sensed lower-side
The AOZ1267-01 is available in 23-pin 4mm x 4mm QFN MOSFET current once it turns on. The added AC current
package. information can help the stability of constant-on time
control even with pure ceramic output capacitors, which
Input Power Architecture
have very low ESR. The AC current information has no
The AOZ1267-01 integrates an internal linear regulator DC offset, which does not cause offset with output load
to generate 5.3V (±5%) VCC from input. If input voltage is change, which is fundamentally different from other V2
lower than 5.3V, the linear regulator operates at low constant-on time control schemes.
drop-output mode; the VCC voltage is equal to input
voltage minus the drop-output voltage of internal linear The constant-on-time PWM control architecture is a
regulator. pseudo-fixed frequency with input voltage feed-forward.
The internal circuit of AOZ1267-01 sets the on-time of
Enable and Soft Start high-side switch inversely proportional to the IN.
The AOZ1267-01 has external soft start feature to limit – 12
in-rush current and ensure the output voltage ramps up 26.3  10  R TON    (1)
T ON = ----------------------------------------------------------------
smoothly to regulation voltage. A soft start process V IN  V 
begins when VCC rises to 4.1V and voltage on EN pin is
HIGH. An internal current source charges the external
soft-start capacitor; the FB voltage follows the voltage of To achieve the flux balance of inductor, the buck
soft-start pin (VSS) when it is lower than 0.8V. When VSS converter has the equation:
is higher than 0.8V, the FB voltage is regulated by V OUT
internal precise band-gap voltage (0.8V). The soft-start F SW = --------------------------- (2)
time can be calculated by the following formula:
V IN  T ON

TSS(s) = 330 x CSS(nF) Once the product of VIN x TON is constant, the switching
frequency keeps constant and is independent with input
If CSS is 1nF, the soft-start time will be 330µs; if CSS is
voltage.
10nF, the soft-start time will be 3.3ms.

Rev. 3.0 March 2014 www.aosmd.com Page 9 of 16


AOZ1267QI-01

An external resistor between the IN and TON pin sets the


switching frequency according to the following equation:
12
V OUT  10 Inductor
F SW = --------------------------------- (3)
Current Ilim
26.3  R TON

A further simplified equation will be: Time

38000  V OUT  V  Figure 2. Inductor Current


F SW  kHz  = ----------------------------------------------- (4)
R TON  k  After 128s (typical), the AOZ1267-01 considers this is a
true failed condition and therefore, turns-off both high-
If VOUT is 1.8V, RTON is 137k, the switching frequency side and low-side MOSFETs and latches off. When
will be 500kHz. triggered, only the enable can restart the AOZ1267-01
again.
This algorithm results in a nearly constant switching
frequency despite the lack of a fixed-frequency clock Output Voltage Under-Voltage Protection
generator. If the output voltage is lower than 15% by over-current or
short circuit, the AOZ1267-01 will wait for 128s (typical)
True Current Mode Control and turns-off both high-side and low-side MOSFETs and
The constant-on-time control scheme is intrinsically latches off. When triggered, only the enable can restart
unstable if output capacitor’s ESR is not large enough as the AOZ1267-01 again.
an effective current-sense resistor. Ceramic capacitors
usually cannot be used as output capacitor. Output Voltage Over-Voltage Protection
The threshold of OVP is set 15% higher than 800mV.
The AOZ1267-01 senses the low-side MOSFET current When the VFB voltage exceeds the OVP threshold, high-
and processes it into DC and AC current information side MOSFET is turned-off and low-side MOSFETs is
using AOS proprietary technique. The AC current turned-on until VFB voltage is lower than 800mV.
information is decoded and added on the FB pin on
phase. With AC current information, the stability of Power Good Output
constant-on-time control is significantly improved even The power good (PGOOD) output, which is an open
without the help of output capacitor’s ESR, and thus the drain output, requires the pull-up resistor. When the
pure ceramic capacitor solution can be applicable. The output voltage is 15% below than the nominal regulation
pure ceramic capacitor solution can significantly reduce voltage for 50s (typical), the PGOOD is pulled low.
the output ripple (no ESR caused overshoot and When the output voltage is 15% higher than the nominal
undershoot) and less board area design. regulation voltage, the PGOOD is also pulled low.

Valley Current-Limit Protection When combined with the under-voltage-protection circuit,


The AOZ1267-01 uses the valley current-limit protection this current limit method is effective in almost every
by using RDSON of the lower MOSFET current sensing. circumstance.
To detect real current information, a minimum constant-
off (150ns typical) is implemented after a constant-on
time. If the current exceeds the valley current-limit
threshold, the PWM controller is not allowed to initiate a
new cycle. The actual peak current is greater than the
valley current-limit threshold by an amount equal to the
inductor ripple current. Therefore, the exact current-limit
characteristic and maximum load capability are a
function of the inductor value as well as input and output
voltages. The current limit will keep the low-side
MOSFET ON and will not allow another high-side on-
time, until the current in the low-side MOSFET reduces
below the current limit. Figure 2 shows the inductor
current during the current limit.

Rev. 3.0 March 2014 www.aosmd.com Page 10 of 16


AOZ1267QI-01

Application Information
The basic AOZ1267-01 application circuit is shown in For reliable operation and best performance, the input
page 2. Component selection is explained below. capacitors must have current rating higher than ICIN-RMS
at worst operating conditions. Ceramic capacitors are
Input Capacitor preferred for input capacitors because of their low ESR
The input capacitor must be connected to the IN pins and and high ripple current rating. Depending on the
PGND pin of the AOZ1267-01 to maintain steady input application circuits, other low ESR tantalum capacitor or
voltage and filter out the pulsing input current. A small aluminum electrolytic capacitor may also be used. When
decoupling capacitor, usually 1F, should be connected selecting ceramic capacitors, X5R or X7R type dielectric
to the VCC pin and AGND pin for stable operation of the ceramic capacitors are preferred for their better
AOZ1267-01. The voltage rating of input capacitor must temperature and voltage characteristics. Note that the
be greater than maximum input voltage plus ripple ripple current rating from capacitor manufactures is
voltage. based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.
The input ripple voltage can be approximated by
equation below: Inductor
The inductor is used to supply constant current to output
IO  VO  VO
V IN = -----------------   1 – ---------  --------- when it is driven by a switching voltage. For given input
f  C IN  V IN V IN and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is VO  VO 
I L = -----------   1 – ---------
another concern when selecting the capacitor. For a buck fL  V IN
circuit, the RMS value of input capacitor current can be
calculated by: The peak inductor current is:
VO  VO  I L
I CIN_RMS = I O  ---------  1 – --------- I Lpeak = I O + --------
V IN  V IN 2

if let m equal the conversion ratio: High inductance gives low inductor ripple current but
requires a larger size inductor to avoid saturation. Low
VO
--------
- = m ripple current reduces inductor core losses. It also
V IN reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 30% to
The relation between the input capacitor RMS current
50% of output current.
and voltage conversion ratio is calculated and shown in
Figure 3. It can be seen that when VO is half of VIN, CIN it When selecting the inductor, make sure it is able to
is under the worst current stress. The worst current handle the peak current without saturation even at the
stress on CIN is 0.5 x IO. highest operating temperature.

0.5 The inductor takes the highest current in a buck circuit.


The conduction loss on the inductor needs to be checked
0.4 for thermal and efficiency requirements.

ICIN_RMS(m) 0.3 Surface mount inductors in different shapes and styles


IO are available from Coilcraft, Elytone and Murata.
0.2 Shielded inductors are small and radiate less EMI noise,
but they do cost more than unshielded inductors. The
0.1
choice depends on EMI requirement, price and size.
0
0 0.5 1
m

Figure 3. ICIN vs. Voltage Conversion Ratio

Rev. 3.0 March 2014 www.aosmd.com Page 11 of 16


AOZ1267QI-01

Output Capacitor inductor ripple current is high, the output capacitor could
The output capacitor is selected based on the DC output be overstressed.
voltage rating, output ripple voltage specification and
ripple current rating. Thermal Management and Layout
Consideration
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output In the AOZ1267-01 buck regulator circuit, high pulsing
voltage including ripple. De-rating needs to be current flows through two circuit loops. The first loop
considered for long term reliability. starts from the input capacitors, to the VIN pin, to the LX
pins, to the filter inductor, to the output capacitor and
Output ripple voltage specification is another important load, and then returns to the input capacitor through
factor for selecting the output capacitor. In a buck con- ground. Current flows in the first loop when the high side
verter circuit, output ripple voltage is determined by switch is on. The second loop starts from the inductor, to
inductor value, switching frequency, output capacitor the output capacitors and load, to the low side switch.
value and ESR. It can be calculated by the equation Current flows in the second loop when the low side
below: switch is on.
1
V O = I L   ESR CO + ------------------------- In PCB layout, minimizing the two loops area reduces the
 8fC  noise of this circuit and improves efficiency. A ground
O
plane is strongly recommended to connect the input
where,
capacitor, output capacitor and PGND pin of the
CO is output capacitor value and AOZ1267-01.
ESRCO is the Equivalent Series Resistor of output capacitor.
In the AOZ1267-01 buck regulator circuit, the major
When a low ESR ceramic capacitor is used as output power dissipating components are the AOZ1267-01 and
capacitor, the impedance of the capacitor at the output inductor. The total power dissipation of the con-
switching frequency dominates. Output ripple is mainly verter circuit can be measured by input power minus out-
caused by capacitor value and inductor ripple current. put power.
The output ripple voltage calculation can be simplified to:
P total_loss = V IN  I IN – V O  I O
1
V O = I L  -------------------------
8  f  CO The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor and
If the impedance of ESR at switching frequency output current.
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output P inductor_loss = IO2  R inductor  1.1
ripple voltage calculation can be further simplified to:
The actual junction temperature can be calculated with
V O = I L  ESR CO
power dissipation in the AOZ1267-01 and thermal
impedance from junction to ambient.
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type T junction =  P total_loss – P inductor_loss    JA
of ceramic, or other low ESR tantalum are recommended
to be used as output capacitors.
The maximum junction temperature of AOZ1267-01 is
In a buck converter, output capacitor current is 150ºC, which limits the maximum load current capability.
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current. The thermal performance of the AOZ1267-01 is strongly
It can be calculated by: affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
I L operate under the recommended environmental
I CO_RMS = ----------
12 conditions.

Usually, the ripple current rating of the output capacitor is


a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and

Rev. 3.0 March 2014 www.aosmd.com Page 12 of 16


AOZ1267QI-01

Layout Considerations
Several layout tips are listed below for the best electric
and thermal performance.
1. The LX pins and pad are connected to internal low 4. Decoupling capacitor CVCC should be connected to
side switch drain. They are low resistance thermal VCC and AGND as close as possible.
conduction path and most noisy switching node. 5. Voltage divider R1 and R2 should be placed as close
Connect a large copper plane to LX pin to help as possible to FB and AGND.
thermal dissipation.
6. RTON should be put on PCB reverse side of feedback
2. The IN pins and pad are connected to internal high network or away from FB pin and FB feedback resis-
side switch drain. They are also low resistance tors to avoid unwanted touch to short Ton pin and FB
thermal conduction path. Connect a large copper together to ground to cause improperly operation.
plane to IN pins to help thermal dissipation.
7. A ground plane is preferred; Pin 19 (PGND) must be
3. Input capacitors should be connected to the IN pin connected to the ground plane through via.
and the PGND pin as close as possible to reduce the
switching spikes. 8. Keep sensitive signal traces such as feedback trace
far away from the LX pins.
9. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.

9RXW

3*22'
$*1'
721

3)0

(1
)%


 66
$,1 
 ,1
,1 
,1

 9&&
,1 
9LQ  %67

 3*1'
/; 
/;

  /;
/;











/;

/;
3*1'

3*1'

3*1'

3*1'

3*1'

9RXW

Rev. 3.0 March 2014 www.aosmd.com Page 13 of 16


AOZ1267QI-01

Package Dimensions, QFN 4x4, 23 Lead EP2_S


D D2 D3
Pin #1 Dot L1
By Marking
L

E E1 E2 E3
b

L3
L2
D1 D1
TOP VIEW

BOTTOM VIEW
A1
A

A2

SIDE VIEW

RECOMMENDED LAND PATTERN Dimensions in millimeters Dimensions in inches


0.37 Symbols Min. Typ. Max. Symbols Min. Typ. Max.
0.25 0.50 A 0.80 0.90 1.00 A 0.031 0.035 0.039
0.25
0.22 A1 0.00 — 0.05 A1 0.000 — 0.002
0.45
A2 0.2 REF A2 0.008 REF
E 3.90 4.00 4.10 E 0.154 0.157 0.141
E1 2.95 3.05 3.15 E1 0.116 0.120 0.124
E2 2.56 2.66 2.76 E2 0.101 0.105 0.109
2.71 E3 2.95 3.05 3.15 E3 0.116 0.120 0.124
3.10 3.10
3.43 D 3.90 4.00 4.10 D 0.154 0.157 0.141
D1 0.65 0.75 0.85 D1 0.026 0.030 0.033
D2 0.85 0.95 1.05 D2 0.033 0.037 0.041
D3 1.24 1.34 1.44 D3 0.049 0.053 0.057
L 0.35 0.40 0.45 L 0.014 0.016 0.018
0.37
0.26 L1 0.57 0.62 0.67 L1 0.022 0.024 0.026
0.75 L2 0.23 0.28 0.33 L2 0.009 0.011 0.013
0.75 UNIT: MM
0.95 L3 0.57 0.62 0.67 L3 0.022 0.024 0.026
1.34
b 0.20 0.25 0.30 b 0.008 0.010 0.012
e 0.50 BSC e 0.020 BSC

Notes:
1. Controlling dimensions are in millimeters. Converted inch dimensions are not necessarily exact.
2. Tolerance: ± 0.05 unless otherwise specified.
3. Radius on all corners is 0.152 max., unless otherwise specified.
4. Package wrapage: 0.012 max.
5. No plastic flash allowed on the top and bottom lead surface.
6. Pad planarity: ± 0.102
7. Crack between plastic body and lead is not allowed.

Rev. 3.0 March 2014 www.aosmd.com Page 14 of 16


AOZ1267QI-01

Tape and Reel Dimensions, QFN 4x4, 23 Lead EP2_S

Carrier Tape
P1
D1 P2
T
E1

E2
E
B0

K0 D0
P0 A0
Feeding Direction
UNIT: mm

Package A0 B0 K0 D0 D1 E E1 E2 P0 P1 P2 T

QFN 4x4 4.35 4.35 1.10 1.50 1.50 12.00 1.75 5.50 8.00 4.00 2.00 0.30
(12mm) ±0.10 ±0.10 ±0.10 Min. +0.10/-0 ±0.30 ±0.10 ±0.05 ±0.10 ±0.10 ±0.05 ±0.05

Reel W1

S
G

M N
K
V

W
UNIT: mm
Tape Size Reel Size M N W W1 H K S G R V
12mm ø330 ø330.0 ø79.0 12.4 17.0 ø13.0 10.5 2.0 — — —
±2.0 ±1.0 +2.0/-0.0 +2.6/-1.2 ±0.5 ±0.2 ±0.5

Leader/Trailer and Orientation

Trailer Tape Components Tape Leader Tape


300mm min. Orientation in Pocket 500mm min.

Rev. 3.0 March 2014 www.aosmd.com Page 15 of 16


AOZ1267QI-01

Part Marking

AOZ1267QI-01
(QFN4x4)

Z1267QI1
Part Number Code
FAYWLT

Fab & Assembly Location Assembly Lot Code

Year & Week Code

LEGAL DISCLAIMER

Applications or uses as critical components in life support devices or systems are not authorized. AOS does
not assume any liability arising out of such applications or uses of its products. AOS reserves the right to
make changes to product specifications without notice. It is the responsibility of the customer to evaluate suitability
of the product for their intended application. Customer shall comply with applicable legal requirements,
including all applicable export control rules, regulations and limitations.

AOS' products are provided subject to AOS' terms and conditions of sale which are set forth at:
http://www.aosmd.com/terms_and_conditions_of_sale

LIFE SUPPORT POLICY

ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.

As used herein:

1. Life support devices or systems are devices or 2. A critical component in any component of a life
systems which, (a) are intended for surgical implant into support, device, or system whose failure to perform can
the body or (b) support or sustain life, and (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in a significant injury of
the user.

Rev. 3.0 March 2014 www.aosmd.com Page 16 of 16

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy