AOZ2261NQI-11

28V/8A Synchronous EZBuckTM Regulator

General Description Features

The AOZ2261NQI-11 is a high-efficiency, easy-to-use  Wide input voltage range
DC/DC synchronous buck regulator that operates up to – 2.7V to 28V
28V. The device is capable of supplying 8A of continuous
 8A continuous output current
output current with an output voltage adjustable down to
0.6V ±1%.  Output voltage adjustable down to 0.6V (±1.0%)
 Low RDS(ON) internal NFETs
A proprietary constant on-time PWM control with input
– 28m high-side
feed-forward results in ultra-fast transient response while
maintaining relatively constant switching frequency over – 11m low-side
the entire input voltage range. The on time can be  Constant On-Time with input feed-forward
externally programmed up to 2.6µs.  Programmable on-time up to 2.6µs

The device features multiple protection functions such as  Selectable PFM light-load operation
VCC under-voltage lockout, cycle-by-cycle current limit,  Ceramic capacitor stable
output over-voltage protection, short-circuit protection,  Adjustable soft start
and thermal shutdown.
 Ripple reduction
The AOZ2261NQI-11 is available in a 4mm×4mm QFN-  Discharge Function
23L package and is rated over a -40°C to +85°C ambient  Power Good output
temperature range.  Integrated bootstrap diode
 Adjustable cycle-by-cycle current limit
 Short-circuit protection
 Over-voltage protection
 Thermal shutdown
 Thermally enhanced 4mm x 4mm QFN-23L package

Applications
 Portable computers
 Compact desktop PCs
 Servers
 Graphics cards
 Set-top boxes
 LCD TVs
 Cable modems
 Point-of-load DC/DC converters
 Telecom/Networking/Datacom equipment

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 AOZ2261NQI-11

Typical Application

RTON
INPUT
TON IN 2.7V to 28V

OCS C2
22µF
5V VCC ROCS
C5
R3 C4
100k 4.7µF AOZ2261NQI-11 0.1µF
BST

POWER GOOD PGOOD

OUTPUT
LX
L1 1.05V, 8A
OFF ON EN/DISCHG 1µH
R2

FB
MODE C3
88µF
R1
SS
AGND
CSS

PGND

POWER GROUND

ANALOG GROUND

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Ordering Information
Part Number Ambient Temperature Range Package Environmental
AOZ2261NQI-11 -40°C to +85°C 23-Pin 4mm x 4mm QFN Green Product

AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.

Pin Configuration

OCS
VCC

BST
SS

LX
IN
22

21

20

19

18
23
PGOOD 1 17 LX

EN/DISCHG 2 16 LX

MODE 3 15 PGND
IN LX
AGND 4 14 PGND

FB 5 13 PGND

TON 6 12 PGND

11
10
7

9
8
IN

IN

LX

LX
IN

23-Pin 4mm x 4mm QFN

Top View

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Pin Description
Pin Number Pin Name Pin Function
Power Good Signal Output. PGOOD is an open-drain output used to indicate the status
of the output voltage. It is internally pulled low when the output voltage is 15% lower than
1 PGOOD
the nominal regulation voltage or 50% higher than the nominal regulation voltage.
PGOOD is pulled low during soft-start and shut down.
Enable Input. The AOZ2261NQI-11 is enabled when EN is pulled high. The device shuts
down when EN is pulled low.
2 EN/DISCHG
Set voltage level higher/lower than discharge threshold when PGOOD pull high to
enable/disable output discharge function.
PFM Selection Input. Connect MODE pin to VCC for forced PWM operation. Connect
3 MODE
MODE pin to ground for PFM operation to improve light load efficiency.
4 AGND Analog Ground.
Feedback Input. Adjust the output voltage with a resistive voltage-divider between the
5 FB
regulator’s output and AGND.
6 TON On-Time Setting Input. Connect a resistor between VIN and TON to set the on time.
7, 8, 9, 22 IN Supply Input. IN is the regulator input. All IN pins must be connected together.
12, 13, 14, 15 PGND Power Ground.
10, 11, 16, 17, 18 LX Switching Node.
19 Current limitation level setting pin. Connect a resistor between OCS and GND to set over
OCS
current protection level. No capacitor is allowed between OCS and AGND.
Bootstrap Capacitor Connection. The AOZ2261NQI-11 includes an internal bootstrap
20 BST diode. Connect an external capacitor between BST and LX as shown in the Typical
Application diagram.
Supply Input for analog functions. Bypass VCC to AGND with a 4.7µF~10µF ceramic
21 VCC
capacitor. Place the capacitor close to VCC pin.
Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the
23 SS
soft-start time.

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Absolute Maximum Ratings Maximum Operating Ratings

Exceeding the Absolute Maximum Ratings may damage the The device is not guaranteed to operate beyond the
device. Maximum Operating Ratings.

Parameter Rating Parameter Rating

IN, TON to AGND -0.3V to 30V Supply Voltage (VIN) 2.7V to 28V
(2)
LX to AGND -0.3V to 30V Output Voltage Range 0.6V to 0.85*VIN
BST to AGND -0.3V to 36V Ambient Temperature (TA) -40°C to +85°C
SS, OCS, PGOOD, FB to AGND -0.3V to 6V Package Thermal Resistance
32°C/W
EN/DISCH, VCC, MODE to AGND -0.3V to 6V (θJA)

PGND to AGND -0.3V to +0.3V

Junction Temperature (TJ) +150°C
Storage Temperature (TS) -65°C to +150°C
ESD Rating(2) 2kV
Notes:
1. LX to PGND Transient (t<20ns) ------ -7V to VIN + 7V.
2. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5k in series with 100pF.

Electrical Characteristics
TA = 25°C, VIN = 12V, VCC = 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.

Symbol Parameter Conditions Min. Typ. Max Units

VIN IN Supply Voltage 2.7 28 V
VCC rising 4.2 4.5 V
VUVLO Under-Voltage Lockout Threshold of VCC
VCC falling 3.2 3.9 V
Iq Quiescent Supply Current of VCC IOUT = 0A, VEN > 2V, PFM mode 350 µA
IOFF Shutdown Supply Current VEN = 0V 1 20 µA
VFB Feedback Voltage TA = 25°C 0.594 0.600 0.606 V
Load Regulation 0.5 %
Line Regulation 1 %
IFB FB Input Bias Current 200 nA
Enable/Discharge
Off threshold 0.5 V
VEN EN Input Threshold
On threshold 1.2 V
VEN_HYS EN Input Hysteresis 100 250 mV
VDIS Discharge Threshold When PGOOD from 0 to 1 1.5 V
MODE Control
PFM Mode threshold 0.5 V
VMODE MODE Input Threshold
Force PWM threshold 1.2 V
VMODEHYS MODE Input Hysteresis 100 mV
Modulator
TON On Time RTON = 100k, VIN = 12V 200 ns
TON_MIN Minimum On Time 100 ns
TON_MAX Maximum On Time 2.6 µs
TOFF_MIN Minimum Off Time 300 ns

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Electrical Characteristics
TA = 25°C, VIN = 12V, VCC = 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.

Symbol Parameter Conditions Min. Typ. Max Units

Soft-Start
ISS_OUT SS Source Current VSS = 0V
7 11 15 µA
CSS = 0.001µF to 0.1µF
Power Good Signal
VPG_LOW PGOOD Low Voltage IOL = 1mA 0.5 V
PGOOD Leakage Current ±1 µA
VPGH PGOOD Threshold
FB rising 90 %
(Low Level to High Level)
VPGL PGOOD Threshold FB rising 150 %
(High Level to Low Level) FB falling 85 %
PGOOD Threshold Hysteresis 5 %
Under Voltage and Over Voltage Protection
VPL Under Voltage Threshold FB falling 50 %
TPL Under Voltage Delay Time 32 µs
VPH Over Voltage Threshold FB rising 150 %
Power Stage Output
RDS(ON) High-Side NFET On-Resistance VIN = 12V, VCC = 5V 28 m
High-Side NFET Leakage VEN = 0V, VLX = 0V 10 µA
RDS(ON) Low-Side NFET On-Resistance VLX = 12V, VCC = 5V 11 m
Low-Side NFET Leakage VEN = 0V 10 µA
Thermal Protection
TJ rising 150 °C
Thermal Shutdown Threshold
TJ falling 100 °C

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Functional Block Diagram

BST IN PGood

VCC

DISCHARGE

EN/DIS UVLO
TOFF_MIN
Reference Q PG Logic
& Bias Error Comp Timer
0.6V
SS S
Q
ISENSE R
(AC) FB LX
FB Decode
ILIM Comp
Current ISENSE
OCS + Information
Processing ISENSE (AC)
LX

Vcc
TON
OTP Q
Timer
MODE

TON TON Light Load

Generator Comp Discharge
Pulse

Light Load ISENSE

Threshold
DIS_On
EN

PGND AGND

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Typical Performance Characteristics

TA = 25°C, VIN = 19V, VOUT = 1V, fS = 450kHz, unless otherwise specified.

Normal Operation Load Transient 0A to 8A

ILX
(5A/div) ILX
(5A/div)

VO ripple
(50mV/div)
VO ripple
(50mV/div)
VLX
(10V/div)

5µs/div 2ms/div

Full Load Start-up Short Circuit Protection

VLX
(20V/div) VLX
(20V/div)
EN
(5V/div)
ILX
ILX (10A/div)
(5A/div)

VO
(500mV/div) VO
(500mV/div)

1ms/div 50µs/div

Efficiency vs. Load Current

100
VOUT = 1V
90

80

70
Efficiency (%)

60

50

40
Vin = 6.5V
30
Vin = 12V
20
Vin = 19V
10 Vin = 24V
0
0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0
Output Current (A)

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Detailed Description If CSS is 1nF, the soft-start time will be 120µs; if CSS is
3.6nF, the soft-start time will be 432µs.
The AOZ2261NQI-11 is a high-efficiency, easy-to-use,
synchronous buck regulator optimized for notebook
computers. The regulator is capable of supplying 8A of
VOUT
continuous output current with an output voltage
adjustable down to 0.6V. The programmable on-time
from 100ns to 2.6µs enables optimizing the configuration
VCC Level
for PCB area and efficiency.
VSS

The input voltage of AOZ2261NQI-11 can be as low as 1.2V

2.7V. The highest input voltage of AOZ2261NQI-11 can
be 28V. Constant on-time PWM with input feed-forward 0.6VREF

control scheme results in ultra-fast transient response

VEN
while maintaining relatively constant switching frequency
over the entire input range. True AC current mode control
scheme guarantees the regulator can be stable with PGOOD

ceramics output capacitor. The switching frequency can TSS

be externally programmed. Protection features include
VCC under-voltage lockout, current limit, output over
Figure 1. Soft-Start Sequence of AOZ2261NQI-11
voltage and under voltage protection, short-circuit
protection, and thermal shutdown. Enable and Discharge Function
The AOZ2261NQI-11 is available in 23-pin 4mm×4mm AOZ2261NQI-11 pin 2 is a multi-function pin, which
QFN package. combines enable and discharge function together.
Discharge function on/off is determined by the voltage
Enable and Soft Start level on this pin at PGOOD rising edge. Figure 2
illustrates how to activate discharge function. Once
The AOZ2261NQI-11 has external soft start feature to
PGOOD signal rises up, AOZ2261NQI-11 detects the
limit in-rush current and ensure the output voltage ramps
voltage on EN/DIS pin. Discharge function will be
up smoothly to regulate voltage. A soft start process
activated (Dis_on set to 1) only if EN/DIS pin voltage is
begins when VCC rises to 4.5V and voltage on EN pin is
under discharge threshold at that moment. Dis_on keeps
HIGH. An internal current source charges the external
high until next PGOOD rising edge and will be
soft-start capacitor; the FB voltage follows the voltage of
overwritten. Discharge function won’t be activated
soft-start pin (VSS) when it is lower than 0.6V. When VSS
(Dis_on set to 0) if EN/DIS pin voltage is over discharge
is higher than 0.6V, the FB voltage is regulated by
threshold at PGOOD rising edge. Dis_on keeps low until
internal precise band-gap voltage (0.6V). When VSS is
next PGOOD rising edge and will be overwritten.
higher than 1.2V, the PGOOD signal is high. The soft-
start time for PGOOD can be calculated by the following AOZ2261NQI-11 enters discharge mode if Dis_on signal
formula: is high when EN/DIS pin voltage is lower than EN off
threshold. Discharge MOSFET is always turn-on during
TSS(µs) = 120 x CSS(nF)
discharge mode. At the mean while, low-side MOSFET
turns on and off to quickly discharge output voltage. All
protection and COT are disabled during discharge mode.
Discharge mode operation ended when FB voltage is
under 40mV.

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Discharge threshold
= 1.5V
EN/DIS EN on threshold = 1.2V
EN off threshold = 0.9V

PGOOD

Dis_on

No PGOOD No PGOOD
Discharge One shot, Discharge One shot,
mode Discharge mode not Discharge
activated Mode keep activated Mode keep
activated disabled

Figure 2. AOZ2261NQI-11 Discharge Function On/Off Setting

Constant-On-Time PWM Control with Input Feed The constant-on-time PWM control architecture is a
Forward pseudo-fixed frequency with input voltage feed-forward.
The control algorithm of AOZ2261NQI-11 is constant-on- The internal circuit of AOZ2261NQI-11 sets the on-time
time PWM Control with input feed-forward. of high-side switch inversely proportional to the IN.

The simplified control schematic is shown in Figure. 3. R TON   

T ON  ------------------------- (1)
The high-side switch on-time is determined solely by a V IN  V 
one-shot whose pulse width can be programmed by one
external resistor and is inversely proportional to input
voltage (IN). The one-shot is triggered when the internal To achieve the flux balance of inductor, the buck
0.6V is higher than the combined information of FB converter has the equation:
voltage and the AC current information of inductor, which V OUT
is processed and obtained through the sensed lower-side F SW = --------------------------- (2)
V IN  T ON
MOSFET current once it turns-on. The added AC current
information can help the stability of constant-on time
control even with pure ceramic output capacitors, which Once the product of VIN x TON is constant, the switching
have very low ESR. The AC current information has no frequency keeps constant and is independent with input
DC offset, which does not cause offset with output load voltage.
change, which is fundamentally different from other V2
constant-on time control schemes.

IN
FB Voltage/
AC Current Information
–
PWM Programmable
One-Shot Comp
+ 0.6V

Figure 3. Simplified Control Schematic of AOZ2261NQI-11

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An external resistor between the IN and TON pin sets the True Current Mode Control
switching on-time according to the following curves: The constant-on-time control scheme is intrinsically
unstable if output capacitor’s ESR is not large enough as
an effective current-sense resistor. Ceramic capacitors
usually can not be used as output capacitor.

The AOZ2261NQI-11 senses the low-side MOSFET

current and processes it into DC current and AC current
information using AOS proprietary technique. The AC
current information is decoded and added on the FB pin
on phase. With AC current information, the stability of
constant-on-time control is significantly improved even
without the help of output capacitor’s ESR; and thus the
pure ceramic capacitor solution can be applied. The pure
ceramic capacitor solution can significantly reduce the
output ripple (no ESR caused overshoot and undershoot)
and less board area design.

Current-Limit Protection
The AOZ2261NQI-11 has the current-limit protection by
using RDS(ON) of the low-side MOSFET to be as current
sensing. To detect real current information, a minimum
constant off (300ns typical) is implemented after a
constant on time. If the current exceeds the current-limit
threshold, the PWM controller is not allowed to initiate a
new cycle. The actual peak current is greater than the
current-limit threshold by an amount equal to the inductor
ripple current. Therefore, the exact current-limit
characteristic and maximum load capability are a
function of the inductor value and input and output
voltages. The current limit will keep the low-side
MOSFET on and will not allow another high-side on-time,
until the current in the low-side MOSFET reduces below
the current limit.
Figure 4. TON vs. RTON Curves
Current-Limit Setting
A further simplified equation will be:
The current-limit threshold mentioned in last paragraph
V OUT  V  6 can be set by connecting a resistor between OCS pin
F SW  kHz  = ------------------------------------------------  10 (3) and ground. The value of the current limit resistor (ROCS)
V IN  V   T ON  ns 
can be calculated according to the equation below. A
capacitor from OCS pin to ground would impact the
If VOUT is 1.05V, VIN is 19V, and set FS = 500kHz. current limit accuracy and is not allowed.
According to equation 3, TON = 110ns is needed. Finally,
use the TON to RTON curve, we can find out RTON is I L_LIMIT  A  = 0.909  R OCS  k  (4)
82k.
As shown in Figure 5, once the magnitude of switch node
This algorithm results in a nearly constant switching
voltage VLX is larger than VOCS, over current signal is
frequency despite the lack of a fixed-frequency clock
triggered. The larger ROCS is, the higher over current
generator.
threshold will be. Section Current-Limit Protection
describes the action when over current condition
happens.

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Application Information
The basic AOZ2261NQI-11 application circuit is shown in
page 2. Component selection is explained below.
IREF
Input Capacitor
OCS
The input capacitor must be connected to the IN pins and
OCL signal PGND pin of the AOZ2261NQI-11 to maintain steady
ROCS
input voltage and filter out the pulsing input current. A
small decoupling capacitor, usually 4.7µF, should be
LX = -IL x RDS(ON) connected to the VCC pin and AGND pin for stable
operation of the AOZ2261NQI-11. The voltage rating of
GND
OCL level 
ROCS input capacitor must be greater than maximum input
voltage plus ripple voltage.

Figure 5. Illustration of Current Limit Setting The input ripple voltage can be approximated by
equation below:
Output Voltage Under-Voltage Protection
IO  VO  VO
If the output voltage is lower than 50% by over-current or V IN = -----------------   1 – ---------  --------- (5)
short circuit, AOZ2261NQI-11 will wait for 32µs (typical) f  C IN  V IN V IN
and turns-off both high-side and low-side MOSFETs and
latches off. Only when triggered, the enable can restart Since the input current is discontinuous in a buck
the AOZ2261NQI-11 again. converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
Output Voltage Over-Voltage Protection circuit, the RMS value of input capacitor current can be
The threshold of OVP is set 50% higher than 0.6V. When calculated by:
the VFB voltage exceeds the OVP threshold, high-side
MOSFET is turn-off and low-side MOSFETs is turn-on VO  VO 
I CIN_RMS = I O  ---------  1 – --------- (6)
1µs, then latch-off. V IN  V IN
Power Good Output
if let m equal the conversion ratio:
The power good (PGOOD) output, which is an open
drain output, requires the pull-up resistor. When the VO
output voltage is 15% below the nominal regulation --------
- = m (7)
V IN
voltage, the PGOOD is pulled low. When the output
voltage is 50% higher than the nominal regulation
voltage, the PGOOD is also pull low. The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
When combined with the under-voltage-protection circuit, Figure 6. It can be seen that when VO is half of VIN, CIN is
this current limit method is effective in almost every under the worst current stress. The worst current stress
circumstance. on CIN is 0.5 x IO.

Ripple Reduction 0.5

When switching frequency is down to half of setting
during PFM, AOZ2261NQI-11 actively reduces on-time 0.4
pulse width to reduce inductor current ripple and output
voltage ripple. Ripple reduction not only reduces half of ICIN_RMS(m) 0.3
voltage ripple but also decreases the chance of acoustic IO
0.2
noise under light load.
0.1

0
0 0.5 1
m

Figure 6. ICIN vs. Voltage Conversion Ratio

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 AOZ2261NQI-11

For reliable operation and best performance, the input Output Capacitor
capacitors must have current rating higher than ICIN-RMS The output capacitor is selected based on the DC output
at worst operating conditions. Ceramic capacitors are voltage rating, output ripple voltage specification and
preferred for input capacitors because of their low ESR ripple current rating.
and high ripple current rating. Depending on the
application circuits, other low ESR tantalum capacitor or The selected output capacitor must have a higher rated
aluminum electrolytic capacitor may also be used. When voltage specification than the maximum desired output
selecting ceramic capacitors, X5R or X7R type dielectric voltage including ripple. De-rating needs to be
ceramic capacitors are preferred for their better considered for long term reliability.
temperature and voltage characteristics. Note that the
Output ripple voltage specification is another important
ripple current rating from capacitor manufactures is
factor for selecting the output capacitor. In a buck con-
based on certain amount of life time. Further de-rating
verter circuit, output ripple voltage is determined by
may be necessary for practical design requirement.
inductor value, switching frequency, output capacitor
Inductor value, and ESR. It can be calculated by the equation
below;
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input 1
V O = I L   ESR CO + ------------------------- (10)
and output voltage, inductance and switching frequency  8fC  O
together decide the inductor ripple current, which is:
where CO is output capacitor value and ESRCO is the
VO  VO  Equivalent Series Resistor of output capacitor.
I L = -----------   1 – --------- (8)
fL  V IN When a low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
The peak inductor current is: switching frequency dominates. Output ripple is mainly
caused by capacitor value and inductor ripple current.
I L The output ripple voltage calculation can be simplified to:
I Lpeak = I O + -------- (9)
2 1
V O = I L  ------------------------- (11)
8fC O
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
If the impedance of ESR at switching frequency
ripple current reduces inductor core losses. It also
dominates, the output ripple voltage is mainly decided by
reduces RMS current through inductor and switches,
capacitor ESR and inductor ripple current. The output
which results in less conduction loss. Usually, peak to
ripple voltage calculation can be further simplified to:
peak ripple current on inductor is designed to be 30% to
50% of output current.
V O = I L  ESR CO
When selecting the inductor, make sure it is able to (12)
handle the peak current without saturation even at the For lower output ripple voltage across the entire
highest operating temperature. operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum are recommended
The inductor takes the highest current in a buck circuit. to be used as output capacitors.
The conduction loss on inductor needs to be checked for
thermal and efficiency requirements. In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
Surface mount inductors in different shape and styles are decided by the peak to peak inductor ripple current.
available from Coilcraft, Elytone and Murata. Shielded It can be calculated by:
inductors are small and radiate less EMI noise. But they I L
cost more than unshielded inductors. The choice I CO_RMS = ---------- (13)
depends on EMI requirement, price and size. 12

Usually, the ripple current rating of the output capacitor is

a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, the output capacitor could
be overstressed.

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Thermal Management and Layout The power dissipation of inductor can be approximately
Consideration calculated by DCR of inductor and output current.
In the AOZ2261NQI-11 buck regulator circuit, high P inductor_loss = IO2  R inductor  1.1 (15)
pulsing current flows through two circuit loops. The first
loop starts from the input capacitors, to the VIN pin, to
The actual junction temperature can be calculated with
the LX pins, to the filter inductor, to the output capacitor
power dissipation in the AOZ2261NQI-11 and thermal
and load, and then return to the input capacitor through
impedance from junction to ambient.
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the T junction =  P total_loss – P inductor_loss    JA +TA
output capacitors and load, to the low side switch.
Current flows in the second loop when the low side (16)
switch is on.
The maximum junction temperature of AOZ2261NQI-11
In PCB layout, minimizing the two loops area reduces the is 150ºC, which limits the maximum load current
noise of this circuit and improves efficiency. A ground capability.
plane is strongly recommended to connect input
The thermal performance of the AOZ2261NQI-11 is
capacitor, output capacitor, and PGND pin of the
strongly affected by the PCB layout. Extra care should be
AOZ2261NQI-11.
taken by users during design process to ensure that the
In the AOZ2261NQI-11 buck regulator circuit, the major IC will operate under the recommended environmental
power dissipating components are the AOZ2261NQI-11 conditions.
and the output inductor. The total power dissipation of
converter circuit can be measured by input power minus
output power.
P total_loss = V IN  I IN – V O  I O (14)

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 AOZ2261NQI-11

Layout Considerations
Several layout tips are listed below for the best electric
and thermal performance.
1. The LX pins and pad are connected to internal low 5. Voltage divider R1 and R2 should be placed as close
side switch drain. They are low resistance thermal as possible to FB and AGND.
conduction path and most noisy switching node. 6. RTON should be connected as close as possible to
Connect a large copper plane to LX pin to help Pin 6 (TON pin).
thermal dissipation.
7. A ground plane is preferred.
2. The IN pins and pad are connected to internal high
side switch drain. They are also low resistance 8. Keep sensitive signal traces such as feedback trace
thermal conduction path. Connect a large copper far away from the LX pins.
plane to IN pins to help thermal dissipation. 9. Pour copper plane on all unused board area and
3. Input capacitors should be connected to the IN pin connect it to stable DC nodes, like VIN, GND or
and the PGND pin as close as possible to reduce the VOUT.
switching spikes. 10. The current limit resistor (ROCS) should be connected
4. Decoupling capacitor CVCC should be connected to as close as possible to Pin 19 (OCS). Place three GND
VCC and AGND as close as possible. vias to connect to inner ground layer. Keep distance
between Rocs and Lx plane.

AGND

VOUT

PGOOD
MODE
AGND
TON

EN
FB

GND
6

IN 7 23 SS

IN 8 22 IN
IN

IN 9 21 VCC
VIN
20 BST GND

LX 10 19 OCS
LX

LX 11 18 LX
12 PGND

13 PGND

14 PGND

15 PGND

16 LX

17 LX

PGND

VOUT

Rev. 2.0 June 2019 www.aosmd.com Page 15 of 18

 AOZ2261NQI-11

Package Dimensions, QFN 4x4B, 23 Lead EP2_S

RECOMMENDED LAND PATTERN

Option 1

DIMENSIONS IN MILLIMETERS DIMENSIONS IN INCHES

SYMBOLS
MIN NOM MAX MIN NOM MAX
A      
A1    
A2 5() 5()
E      
E1      
E2      
E3      
D      
D1      
Option 2 D2      
D3      
L      
L1      
L2      
L3      
L4      
b      
e %6& %6&

UNIT: mm
NOTE
1. CONTROLLING DIMENSION IS MILLIMETER.
CONVERTED INCH DIMENSIONS ARE NOT NECESSARILY EXACT.
2. TOLERANCE :±0.05 UNLESS OTHERWISE SPECIFIED.
3. RADIUS ON ALL CORNER ARE 0.152 MAX., UNLESS OTHERWISE SPECIFIED.
4. PACKAGE WARPAGE: 0.012 MAX.
5. NO ANY PLASTIC FLASH ALLOWED ON THE TOP AND BOTTOM LEAD SURFACE.
6. PAD PLANARITY: ±0.102
7. CRACK BETWEEN PLASTIC BODY AND LEAD IS NOT ALLOWED.

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 AOZ2261NQI-11

Tape and Reel Dimensions, QFN 4x4B, 23 Lead EP2_S

Rev. 2.0 June 2019 www.aosmd.com Page 17 of 18

 AOZ2261NQI-11

Part Marking

AOZ2261NQI-11
(QFN 4x4)

ALNB
Part Number Code
YWLT

Year & Week Code Assembly Lot Code

LEGAL DISCLAIMER

Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or
completeness of the information provided herein and takes no liabilities for the consequences of use of such
information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes
to such information at any time without further notice. This document does not constitute the grant of any intellectual
property rights or representation of non-infringement of any third party’s intellectual property rights.

LIFE SUPPORT POLICY

ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.

As used herein:

1. Life support devices or systems are devices or 2. A critical component in any component of a life
systems which, (a) are intended for surgical implant into support, device, or system whose failure to perform can
the body or (b) support or sustain life, and (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in a significant injury of
the user.

Rev. 2.0 June 2019 www.aosmd.com Page 18 of 18