M54HC390

M74HC390

DUAL DECADE COUNTER

. HIGH SPEED

. fMAX = 84 MHz (TYP.) AT VCC = 5 V

LOW POWER DISSIPATION

. ICC = 4 µA (MAX.) AT TA = 25 °C
HIGH NOISE IMMUNITY

. VNIH = VNIL = 28 % VCC (MIN.)

OUTPUT DRIVE CAPABILITY B1R F1R

. 10 LSTTL LOADS
SYMMETRICAL OUTPUT IMPEDANCE
(Plastic Package) (Ceramic Package)

. |IOH| = IOL = 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

. tPLH = tPHL
WIDE OPERATING VOLTAGE RANGE M1R C1R

. VCC (OPR) = 2 V TO 6 V
PIN AND FUNCTION COMPATIBLE WITH
54/74LS390
(Micro Package)
ORDER CODES :
M54HC390F1R
(Chip Carrier)

M74HC390M1R
M74HC390B1R M74HC390C1R

PIN CONNECTIONS (top view)

DESCRIPTION
The M54/74HC390 is a high speed CMOS DUAL
DECADE COUNTER fabricated in silicon gate
C2MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
power consumption.
This dual decade counter contains two independent
ripple carry counters. Each counter is composed of
a divide-by-two and divide-by-five counter. The
divide-by-two and divide-by-five counters can be
cascaded to form dual decade, dual biquinary, or
various combinations up to a single divide-by-100
counter.
Each 4-bit counter is incremented on the high to low
transition (negative edge) of the clock input, and
each has an independent clear input. When clear is
set low all four bits of each counter are set to low.
This enables count truncation and allows the im-
plementation of divide-by-N counter configurations.
NC =
All inputs are equipped with protection circuits No Inter-
against static discharge and transient excess volt- nal Con-
age.

February 1993 1/13

M54/M74HC390

INPUT AND OUTPUT EQUIVALENT CIRCUIT

TRUTH TABLE
OUTPUTS
COUNT BCD COUNT * BI-QUINARY **
QD QC QB QA QA QD QC QB
0 L L L L L L L L
1 L L L H L L L H
2 L L H L L L H L
3 L L H H L L H H
4 L H L L L H L L
5 L H L H H L L L
6 L H H L H L L H
7 L H H H H L H L
8 H L L L H L H H
9 H L L H H H L L

INPUTS OUTPUTS
CLOCK A CLOCK B CLEAR QA QB QC QD
X X H L L L L
X L BINARY COUNT UP
X L QUINARY COUNT UP
Note: * Output QA is connected to input CLOCK B for BCD count.
** Output QD is connected to input CLOCK A for bi-quinary count.

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 M54/M74HC390

BLOCK DIAGRAM

LOGIC DIAGRAM

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M54/M74HC390

TIMING CHART

(1) BCD COUNT SEQUENCE *

(2) BI-QUINARY COUNT SEQUENCE **

*OUTPUT QA IS CONNECTED TO INPUT CLOCK B

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 M54/M74HC390

PIN DESCRIPTION IEC LOGIC SYMBOL

PIN No SYMBOL NAME AND FUNCTION
1, 15 1 CLOCK A Clock Input Divide by 2
2 CLOCK B Section (HIGH to LOW
Edge-triggered)
2, 14 1 CLEAR Asynchronous Master
2 CLEAR Reset Inputs
3, 5, 6, 7 1QA to 1QD Flip Flop Outputs
4, 12 1 CLOCK B Clock Input Divide by 5
2 CLOCK B Section (HIGH to LOW
Edge-triggered)
13, 11, 10, 9 2QA to 2QD Flip Flop Outputs
8 GND Ground (0V)
16 VCC Positive Supply Voltage

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
VCC Supply Voltage -0.5 to +7 V
VI DC Input Voltage -0.5 to VCC + 0.5 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Source Sink Current Per Output Pin ± 25 mA
ICC or IGND DC VCC or Ground Current ± 50 mA
PD Power Dissipation 500 (*) mW
o
Tstg Storage Temperature -65 to +150 C
o
TL Lead Temperature (10 sec) 300 C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit
VCC Supply Voltage 2 to 6 V
VI Input Voltage 0 to VCC V
VO Output Voltage 0 to VCC V
o
Top Operating Temperature: M54HC Series -55 to +125 C
o
M74HC Series -40 to +85 C
tr, tf Input Rise and Fall Time VCC = 2 V 0 to 1000 ns
VCC = 4.5 V 0 to 500
VCC = 6 V 0 to 400

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M54/M74HC390

DC SPECIFICATIONS
Test Conditions Value
Symbol Parameter TA = 25 oC -40 to 85 oC -55 to 125 oC Unit
VCC
54HC and 74HC 74HC 54HC
(V)
Min. Typ. Max. Min. Max. Min. Max.
VIH High Level Input 2.0 1.5 1.5 1.5
Voltage 4.5 3.15 3.15 3.15 V
6.0 4.2 4.2 4.2
V IL Low Level Input 2.0 0.5 0.5 0.5
Voltage 4.5 1.35 1.35 1.35 V
6.0 1.8 1.8 1.8
V OH High Level 2.0 1.9 2.0 1.9 1.9
VI =
Output Voltage 4.5 IO=-20 µA 4.4 4.5 4.4 4.4
VIH
V
6.0 or 5.9 6.0 5.9 5.9
4.5 V IL IO=-4.0 mA 4.18 4.31 4.13 4.10
6.0 IO=-5.2 mA 5.68 5.8 5.63 5.60
VOL Low Level Output 2.0 0.0 0.1 0.1 0.1
VI =
Voltage 4.5 IO= 20 µA 0.0 0.1 0.1 0.1
VIH
V
6.0 or 0.0 0.1 0.1 0.1
4.5 V IL IO= 4.0 mA 0.17 0.26 0.33 0.40
6.0 IO= 5.2 mA 0.18 0.26 0.33 0.40
II Input Leakage VI = VCC or GND ±0.1 ±1 ±1 µA
6.0
Current
ICC Quiescent Supply 6.0 VI = VCC or GND 4 40 80 µA
Current

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 M54/M74HC390

AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns)

Test Conditions Value
Symbol Parameter TA = 25 oC -40 to 85 oC -55 to 125 oC Unit
VCC
54HC and 74HC 74HC 54HC
(V)
Min. Typ. Max. Min. Max. Min. Max.
tTLH Output Transition 2.0 30 75 95 110
tTHL Time 4.5 8 15 19 22 ns
6.0 7 13 16 19
tPLH Propagation 2.0 42 120 150 180
tPHL Delay Time 4.5 14 24 30 36 ns
(CLOCK A - QA)
6.0 12 20 26 31
tPLH Propagation 2.0 45 120 150 180
tPHL Delay Time 4.5 15 24 30 36 ns
(CLOCK A - QB, QD)
6.0 13 20 26 31
tPLH Propagation 2.0 QA Connected 108 280 350 420
tPHL Delay Time 4.5 to CKB 36 56 70 84 ns
(CLOCK A - QC)
6.0 31 48 60 71
tPLH Propagation 2.0 72 185 230 280
tPHL Delay Time 4.5 24 37 46 56 ns
(CLOCK B - QC)
6.0 20 31 39 48
tPHL Propagation 2.0 45 125 155 190
Delay Time 4.5 15 25 31 38 ns
(CLEAR - Qn
6.0 13 21 26 32
fMAX Maximum Clock 2.0 8.4 17 6.8 5.6
Frequency 4.5 42 65 34 28 ns
(CLOCK A - QA)
6.0 50 79 40 33
fMAX Maximum Clock 2.0 8.4 17 6.8 5.6
Frequency 4.5 42 67 34 28 ns
(CLOCK B - QB)
6.0 50 79 40 33
tW(H) Minimum Pulse 2.0 24 75 95 110
tW(L) Wisth 4.5 6 15 19 22 ns
(CLOCK)
6.0 5 13 16 19
t(W)H Minimum Pulse 2.0 24 75 95 110
Wisth 4.5 6 15 19 22 ns
(CLEAR)
6.0 5 13 16 19
tREM Propagation 2.0 25 30 35
Delay Time 4.5 5 6 7 ns
6.0 5 5 6
CIN Input Capacitance 5 10 10 10 pF
CPD (*) Power Dissipation 84
pF
Capacitance
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC

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M54/M74HC390

TEST CIRCUIT ICC (Opr.)

WHEN THE OUTPUTS DRIVE CAPACITIVE LOAD, TOTAL CURRENT CONSUMPTION IS TO BE A SUM OF THE VALUE CALCULATED
FROM CPD AND ∆ICC OBTAINED FROM THE FOLLOWING FORMULA.
Ca fCK  2Cb Cc Cd 
∆ICC = fCK . VCC . 2 + 2 . VCC .  5 + 5 + 5 
 
Ca – Cd ARE THE CAPACITANCE AT QA ∼ QD OUTPUT.

SWITCHING CHARACTERISTICS TEST WAVEFORM

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 M54/M74HC390

Plastic DIP16 (0.25) MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 0.77 1.65 0.030 0.065

b 0.5 0.020

b1 0.25 0.010

D 20 0.787

E 8.5 0.335

e 2.54 0.100

e3 17.78 0.700

F 7.1 0.280

I 5.1 0.201

L 3.3 0.130

Z 1.27 0.050

P001C

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M54/M74HC390

Ceramic DIP16/1 MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.

A 20 0.787

B 7 0.276

D 3.3 0.130

E 0.38 0.015

e3 17.78 0.700

F 2.29 2.79 0.090 0.110

G 0.4 0.55 0.016 0.022

H 1.17 1.52 0.046 0.060

L 0.22 0.31 0.009 0.012

M 0.51 1.27 0.020 0.050

N 10.3 0.406

P 7.8 8.05 0.307 0.317

Q 5.08 0.200

P053D

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 M54/M74HC390

SO16 (Narrow) MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.004 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45° (typ.)
D 9.8 10 0.385 0.393
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 8.89 0.350
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.62 0.024
S 8° (max.)

P013H

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M54/M74HC390

PLCC20 MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.

A 9.78 10.03 0.385 0.395

B 8.89 9.04 0.350 0.356

D 4.2 4.57 0.165 0.180

d1 2.54 0.100

d2 0.56 0.022

E 7.37 8.38 0.290 0.330

e 1.27 0.050

e3 5.08 0.200

F 0.38 0.015

G 0.101 0.004

M 1.27 0.050

M1 1.14 0.045

P027A

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 M54/M74HC390

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.

 1994 SGS-THOMSON Microelectronics - All Rights Reserved

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