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Binary Hex CA SOP

This document describes a combinational logic circuit that accepts a 4-bit binary input and displays the hexadecimal equivalent using a 7-segment display. It includes a truth table, Karnaugh maps to obtain the simplified boolean expressions for each segment in sum of products form, a logic circuit diagram showing the components used, and screenshots of the circuit simulated in Multisim. The components used are 7404 hex inverters, 7408 AND gates, 7432 OR gates, a 7-segment display, switches, and resistors.

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45 views

Binary Hex CA SOP

This document describes a combinational logic circuit that accepts a 4-bit binary input and displays the hexadecimal equivalent using a 7-segment display. It includes a truth table, Karnaugh maps to obtain the simplified boolean expressions for each segment in sum of products form, a logic circuit diagram showing the components used, and screenshots of the circuit simulated in Multisim. The components used are 7404 hex inverters, 7408 AND gates, 7432 OR gates, a 7-segment display, switches, and resistors.

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Gates
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Binary-Hex-CA-SOP

Alaan, Angelica B.
Atienza, Raymond Angelo M.
Monteiro, Franchesca

University of Batangas

Engr. Liza R. Maderazo


I. Design a combinational logic circuit that will accept 4-bit binary input that will display
hexadecimal values using common anode seven segment display. Use SOP.

II. TRUTH TABLE

W X Y Z Display A b C D E F G
0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 1 1 1 0 0 1 1 1 1
0 0 1 0 2 0 0 1 0 0 1 0
0 0 1 1 3 0 0 0 0 1 1 0
0 1 0 0 4 1 0 0 1 1 0 0
0 1 0 1 5 0 1 0 0 1 0 0
0 1 1 0 6 0 1 0 0 0 0 0
0 1 1 1 7 0 0 0 1 1 1 1
1 0 0 0 8 0 0 0 0 0 0 0
1 0 0 1 9 0 0 0 0 1 0 0
1 0 1 0 A 0 0 0 1 0 0 0
1 0 1 1 B 1 1 0 0 0 0 0
1 1 0 0 C 0 1 1 0 0 0 1
1 1 0 1 D 1 0 0 0 0 1 0
1 1 1 0 E 0 1 1 0 0 0 0
1 1 1 1 F 0 1 1 1 0 0 0
III. K-MAP/BOOLEAN EXPRESSION (SOP)

YZ 00 01 11 10
WX
00 0 1 0 0 A= W'X'Y'Z + W'XY'Z' + WX'YZ + WXY'Z

01 1 0 0 0

11 0 1 0 0

10 0 0 1 0

YZ 00 01 11 10
WX
00 B= XYZ' + WYZ + WXZ' + W'XY'Z

01 1 1

11 1 1 1

10 1

YZ 00 01 11 10
WX
00 0 0 0 1 C = WXZ' + WXY + W'X'YZ'

01 0 0 0 0

11 1 0 1 1

10 0 0 0 0

YZ 00 01 11 10
WX
00 0 1 0 0 D = XYZ + W'X'Y'Z + W'XY'Z' + WX'YZ'

01 1 0 1 0

11 0 0 1 0

10 0 0 0 1
YZ 00 01 11 10
WX
00 0 1 1 0 E= W'Z + W'XY' + X'Y'Z

01 1 1 1 0

11 0 0 0 0

10 0 1 0 0

YZ 00 01 11 10
WX
00 0 1 1 1 F= W'X'Z + W'X'Y + W'YZ + WXY'Z

01 0 0 1 0

11 0 1 0 0

10 0 0 0 0

YZ 00 01 11 10
WX
00 1 1 0 0 G= W'X'Y' + W'XYZ + WXY'Z'

01 0 0 1 0

11 1 0 0 0

10 0 0 0 0
IV. LOGIC CIRCUIT DIAGRAM
V. COMPONENTS USED
- IC Type 7404 Hex Inverter
− IC Type 7408 Quadruple 2-input AND gate
− IC Type 7432 Quadruple 2-input OR gate
-Seven Segment Common Anode (Yellow)
-Switch DSWPK
-200 Ohm Resistor
-Ground

VI. MULTISIM CIRCUIT


VI. SCREENSHOTS/CONVOS

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