ACSE Volume12 Issue2 P1111434342
ACSE Volume12 Issue2 P1111434342
ACSE Volume12 Issue2 P1111434342
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Papers Pages
P1111209135,
Tarun Varshney and Satya Sheel,
"PID Control of MIMO Turbo – Generator Plant Based on Genetic 1--6
Algorithm"
P1111217176,
Mohamed F. Hassan and Hala A. Mourad,
"Closed Loop Controller for Stochastic Systems with Uncertain 7--14
Parameters"
P1111210136,
O. Chandra Sekhar, Dr.K.Chandra sekhar Member, IEEE,
"A Novel Nine-Level MPC Inverter for Direct Torque Control Induction 15--22
Motor Drive "
P1111219191,
Akram Abu-aisheh and Sameer Khader,
23--30
"Hybrid MPPT-Controlled LED Illumination Systems"
P1111212142,
G. Sambasiva Rao and K. Chandra Sekhar,
"A sophisticated Space Vector Pulse Width Modulation Signal Generation 31--34
for Nine-Level Inverter system for Dual-Fed Induction Motor Drive"
P1111223205,
H. Bellahsene and I. F. E. Fatani,
"Amélioration du temps de convergence de l’algorithme de calcul du filtre 47--51
optimal par HOS en DMT"
P1111217174,
C. Harikrihsna and T. Bramhananda Reddy and J. Amarnath and S.
Kamakshaiah, 39--46
"Simple and Novel Generalized Scalar PWM Algorithm for Multilevel
Inverter Fed Direct Torque Controlled Induction Motor"
ICGST International Journal on Automatic Control &
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
1
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
The rest of paper is organized as follows. In the next reproduction operator. Selection means extract a subset
section basic steps of GA are described. In Section 3 of genes from an existing population. Every gene has a
Genetic operator such as Selection, Crossover and meaning so one may extract a kind of quality
mutation are illustrated. Section 4 describes the measurement called as fitness value and by following this
evaluation procedure based on fitness function and quality selection can be done. Fitness function quantifies
fitness value. In section 5 the basic ideas of the tuning the optimality of a solution so that a particular solution
method are presented. Section 6 describes the Turbo- may be ranked against all the other solutions. The
Generator plant considered and simulation studies are function shows the degree of the closeness of the given
presented in Section 7. Concluding remarks are in last solution to the desired solution. Roulette wheel selection,
Section. Rank selection, Boltzmann selection, Steady state
selection and tournament selection are examples of
2. Genetic Algorithm selection operators [18].
GA is a stochastic search method that emulates the B. Crossover
process of natural evolution. It starts with the minimal After the selection, crossover operator takes place and it
knowledge of the correct solution and depends entirely combines two chromosomes (parents) to produce anew
on responses from its environment and genetic operators chromosome (offspring).The centre idea of crossover is
e.g. selection or reproduction, crossover and mutation to that the new generated chromosome may be better than
get the optimal solution [1]. By starting at several
independent points and searching in parallel, the GA
avoids local minima and converges to sub optimal
solutions. The GA is typically initialized with a random
population consisting of between 20-100 individuals.
This population is usually represented by a real valued
number or a binary string called a chromosome.
Individual performance is measured by the fitness
function. The fitness function assigns each individual a
corresponding number called its fitness value. The fitness
value of each chromosome is assessed and a survival of
the fittest strategy is applied. There are three main
genetic operators of the GA, these are known as Selection
or reproduction, crossover and mutation.
The steps involved in implementing the GA are as
follows:
1. Generate an initial, random population of
individuals for a fixed size.
2. Applying it to the process
3. Evaluate the process using fitness function chosen
i.e. IAE plus weighted control efforts (squared)
4. Select the fittest members of the population.
5. Reproduce using a probabilistic method.
6. Implement crossover operation on the reproduced
chromosomes
7. Execute mutation operation with low probability.
8. Repeat step 2 until a predefined convergence
criterion is met. The convergence criterion of a
genetic algorithm is a user-specified condition e.g.
the maximum number of generations or when the
string fitness value exceeds a certain threshold.
Figure 1 Flowchart of Genetic Algorithm
An illustrative flowchart of the GA implementation is
shown in Figure 1
both the parents if it takes the better characteristics from
3. Genetic Operator each of them. It depends on user specified crossover
To maintain the genetic diversity GA uses the operators. probability. It indicates how often crossover is performed.
Genetic diversity is a necessarily procedure for process of A probability of 0% means that the ‘offspring’ will be
evolution. Commonly three main Genetic operators of exact replicas of their ‘parents’ and a probability of 100%
selection or reproduction, crossover and mutation are means that each generation will be composed of entirely
used in implementation of GA. new offspring. One point crossover, two points, uniform,
arithmetic and heuristic are few types of crossover.
A. Selection or Reproduction C. Mutation
Selection is usually the first operator applied on Mutation is the last operation in GA. It is used to
population. The Selection operator is also known as maintain genetic diversity from one generation of a
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
population of chromosome to the next generation. It u(k) = k p (k)x1 + ki (k)x2 + kd (k)x3 (4)
depends upon the user defined mutation probability.
Mutation probability values of around 0.1% or 0.01% are
common, these values represent the probability that a n
certain string will be selected for mutation i.e. for a where x1 ( k ) = e(k) , x2 = e(k)T ,
k=1
probability of 0.1%; one string in one thousand will be
selected for mutation. Mutation alters one or more gene e(k) - e(k - 1)
x3 = , and kp, ki, kd are proportional, integral,
values in a chromosome from its initial state. This can T
result a fairly new gene value being added to the and derivative gains respectively and T is sampling time.
population and with new gene value the GA is able to get The convergence criterion of a GA is a user-specified
better solution in contrast to previous solution. Mutation condition and termination of tuning of PID parameters
helps to prevent the population from stagnating at any can be done by reaching the maximum number of
local minima. The mutation operators are of many types generations or when the fitness value exceeds a certain
such as flit bit, Boundary, Non uniform, Uniform and threshold. To get the satisfactory dynamic characteristics
Gaussian. IAE has been considered as the fitness function in the
present work. To limit the controlled input from being
4. Process Evaluation Based on Fitness too large, it also accumulates the quadratic term of
controlled input to the fitness function. The expression
Function for modified fitness function can be represented as
A. Fitness function / Performance index
follows
The most crucial action to choose the fitness function to
J = w1 e(k) + w2 u 2 (k)
n
evaluate the fitness of each chromosome. Performance (5)
indices such as mean square error (MSE), integral time k=1
multiplied by absolute error (ITAE), integral absolute
error (IAE) and integral square error are commonly used
as the fitness function in applying GA [7].
B. Fitness Value
The PID controller is designed to minimize the fitness
function which is function of system error. The smaller
value of fitness function indicates the higher fitness value
of the corresponding chromosome and vice versa, and it
is represented by
1
fitness value = (1)
fitness function
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
u2 (k-1)
y2 (k) = 0.2y2 (k-1)+ 0.4u23 (k 1) 0.2u1(k 1) (7)
1+u22 (k-1)
The GA is used to tune for the optimal PID parameters
that minimize the fitness function (Eq. 5). Therefore the
parameter tuning task of the PID controller using GA can
be considered by selecting the three parameters kp, ki and
kd such that the response of plant will be as closest to
desire response. The GA parameters chosen for
simulation are shown in Table 1.
Table 1 Parameters of GA
GA property Value/ Method
Population Size 30
Maximum Number of 100 Figure 4 System response to sum of delayed step function
generations
Fitness Function Quadratic form as in Eq (5)
Selection Method Roulette wheel selection
Crossover Probability 0.90
Crossover Method Arithmetic Crossover
Mutation Probability 0.01
x = a+ (b-a)*rand (8)
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
9. Acknowledgements
Tarun Varshney is with the Department of Electronic
Instrumentation Engineering of Moradabad Institute of
Technology, Moradabad, India and currently pursuing
Figure 6 Optimization Process of fitness function
research at Motilal Nehru National Institute of
Technology, Allahabad, India. He wishes to acknowledge
the all support and facility of Moradabad Institute of
Technology for his work.
10. References:
[1] D.E. Goldberg, ‘Genetic algorithm in Search,
Optimization and Machine learning’, Addison-
Welsey Pulbilcation Co. Inc, 1989.
[2] Dr A.H Jones and P.B. de Moura Oliveira, ‘Genetic
Auto-Tuning of PID controller’, International
Conference on Genetic Algorithms in Engineering
Systems: Innovations and Applications, Sheffield,
UK, pp 141-145, 1995
[3] Takhiro Ota, Sigeru Omatu, ‘Tuning of the PID
Figure 7 Controller’s Parameter for first input
Control Gains by GA’, IEEE Conference on
Emerging Technologies and Factory Automation,
Kauai, Hawaii, pp 272-274, 1996
[4] Y. Mitsukura, T. Yamamoto and M. Kaneda, ‘A
Genetic Tuning Algorithm of PID parameters’,
IEEE International Conference On Systems, Man,
And Cybernetics , Orlando, Florida, USA, vol. 1, pp
923-928,1997.
[5] Yasue Mitsukura, Toru Yamamoto and Masahiro
Kaneda, ‘A design of self tuning PID controllers
using genetic algorithm’, Proceeding of American
control conference, San Diego, California, pp 1361-
1365, 1999.
[6] Thomas F. Junge, Heinz Unbehauen, ‘Recursive
Figure 8 Controller’s Parameter for Second input identification of a Turbo- Generator plant using
structurally adaptive neural network’, Proceedings
of IEEE International Conference on Industrial
8. Conclusions Technology, Goa, India, pp 572-577, 2000.
This paper demonstrates that how GA can be used to [7] T O. Mahony, C J Downing and K Fatla, ‘Genetic
optimize the parameters of PID controller for turbo- Algorithm for PID Parameter Optimization:
generator plant. The features of the proposed scheme are Minimizing Error Criteria’, Process Control and
summarized as follows: Instrumentation, University of Stracthclyde, pp 148-
Optimized parameter can be obtained by optimizing 153, 2000.
the PID parameters controller with GA. [8] Maja Atanasijevi C-Kunc, Rihard Karba,
It is important to select permissible upper and lower ‘Multivariable controller tuning by genetic
limits of parameters otherwise an optimal solution algorithms’, International Conference on Information
5
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Technology Interfaces, Pula, Croatia, pp 337-342, [20] Daniel Carmona morles, Jorge E. Jimenez-
2000. Hornero, Francisco Vazquez and Fernando Morilla,
[9] J.M. Herrero, X. Blasco, M. Martínez, J.V. Salcedo, “ Education toolfor optimal controller tuning using
‘Optimal PID tuning with genetic algorithms for non evolutionary strageties”, IEEE transaction on
linear process models’, 15th Triennial World Education, vol. 55, No. 1. 2012.
Congress, Barcelona, Spain,2002
[10] Ian Griffin, ‘On line PID controller tuning using
genetic algorithm’, Dublin City University, 2003. Biographies
[11] Farag and H. Werner, “Structure selection and Tarun Varshney was born in India
tuning of multivariable PID controller for an in 1978. He received the B.E. degree
industrial benchmark problem”, IEE proceeding of in Electronics & Instrumentation
control theory and applications, vol.153, no 3, pp Engineering from Rajasthan
262 – 267, 2006. University, Jaipur, India, in 2001,
[12] Jih-Gau Juang, Ming-Te Huang, and Wen-Kai Liu, M.Tech. in Control &
“ PID control using presearch genetic algorithms for Instrumentation from Motilal Nehru
MIMO systems”, IEEE Transactions on systems, National Institute of Technology,
man, and cybernetics —Part C: applications and Allahabad, India, in 2007. Currently he is pursuing Ph.D.
reviews, vol. 38, No. 5, pp 716-727, 2008. at NIT, Allahabad. His research interests include
[13] Jin-Sung Kim, Jin- Hwan Kim, Ji-Mo Park, Sung- intelligent control systems, multi-variable systems
Man park and Won-Yong Choe, ‘Auto Tuning PID modeling and neural networks.
controller based on improved Genetic algorithm for
reverse osmosis plant’, World Academy of Science, Satya Sheel received his Bachelors
Engineering and Technology, pp 384-389, 2008. (’68) in Electrical, Masters (’76) in
[14] Zhu Supeng, Fu Wenxing , Yang Jun and Luo Control systems and Ph.D. in
Systems and Control Engineering
Jianjun, ‘Applying Genetic algorithm to (’82). Currently he is a Professor at
optimization parameters of missile control system’, the National Institute of Technology
International conference on Hybrid Intelligent at Allahabad, India. He is a senior
system, Shenyang, China, pp 416-419, 2009. member of IEEE, fellow of
[15] Neenu Thomas, Dr. P. Poongodi, ‘Position Control Institution of Engineers (I) and has been India
of DC Motor using genetic algorithm based PID representative of AMSE (France). He is a reviewer for
journals, conferences and books in control,
controller’, Proceeding of world congress on
instrumentation. His current interests are intelligent
Engineering,Vol. II, London, UK, 2009. control of multivariable systems, PID controller tuning,
[16] P. Poongodi, S. Victor, ‘Genetic Algorithm based embedded systems, process control, machinery health
PID controller design for LTI system via reduced diagnostics and control engineering education.
order model’ International conference on
Instrumentation, Control and Automation,
Bandung, Indonesia, pp 115-118. 2009.
[17] Mohammed Obaid Ali, S. P Koh, K. H. Chong,
S.K. Tiong and Zeyad Assi Obaid, ‘Genetic
Algorithm Tuning based PID controller for liquid
level tank system’, International Conference on
Man-Machine System, Batu Ferringhi, Penang,
Malaysia, pp 4A5-1- 4A5-5, 2009.
[18] Monica Patrascu, Adrian Bogdan Hanchevici, Ioan
Dumitrache , ‘Tuning of PID Controllers for Non-
Linear MIMO Systems Using Genetic Algorithms’,
18th IFAC World Congress Milano (Italy), pp
12644-12649, 2011.
[19] Tarun Varshney, Satya Sheel, “A New Online
Tuning Approach for PID Control of Multivariable
Systems using Diagonal Recurrent Neural
Network”, IEEE International Conference on
Control System, Computing and Engineering,
Penang, Malaysia,2011.
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
with parameter estimation. MATLAB is used as a bk [a11k , a12k ,..., a21k , a22k ,...]T ,
programming tool and Monte Carlo simulation is applied (2)
to compare the behavior of the different filters. An ck 1 [c11k 1 , c12k 1 ,..., c21k 1 , c22k 1 ,...]T
observer-based controller, using the developed estimator,
In the above model it is assumed that
is designed to regulate a DC motor. The obtained results
x , bk , ck 1 , wk , vk 1 are all independent. Moreover, it is
show the applicability and efficiency of the proposed
procedure in handling this problem. assumed that the model has the following properties:
The rest of the paper is organized as follows. In section 2, E{ xk wTj } 0, k j ; E{ xk v Tj } 0, k , j ;
the control problem for stochastic linear discrete-time
dynamical systems with uncertain parameters is E{ yk vTj } 0, k j ; E{ xk bTj } 0, k j ;
formulated. Section 3 is devoted to the presentation of the (3)
E{ xk cTj } 0, k , j ; E{ yk cTj } 0, k j ;
mathematical structure of the developed estimator. The
dynamics of the observer-based controller is presented in E{bk cTj } 0, k , j
section 4. The algorithm used to implement the closed
Since the parameters of the system are uncertain, then
loop stochastic controller is given in section 5. In section
we have a bilinear estimation problem rather than linear,
6, illustrative examples are solved to show the
which intern leads to a non-Gaussian estimation problem.
effectiveness of the proposed design approach. The paper
Our objective is to get a good estimator for the state
is concluded in section 7.
vector, and hence use the estimated states to generate the
desired control signal.
2. Problem Formulation
Let us define the following stochastic control problem:
1 k f 1
3. The Developed Estimator
2
2 Let us for the moment consider the following problem:
min J E xk x d uk N (1-a)
2 k k M x k 1 Ak x k w k (1'-a)
Subject to: yk 1 C k 1 xk 1 vk 1 (1'-b)
x k 1 Ak x k B k u k d w k (1-b) The system model (1') has the same definitions and
properties of the system model (1) in section 2.
yk 1 C k 1 xk 1 vk 1 (1-c)
State estimation problems with uncertain parameters is
where: xk R n is the state vector, yk R m is the usually solved by treating the parameters as static states,
output vector, u k R r
is the control vector, d R n is i.e. k 1 k with the prior at k=0 being N ( , ) ,
a constant vector, x d R n is the desired state vector, where is the vector of the mean or nominal values of
the parameters and is its covariance matrix. This
Ak aijk R nxn is the system matrix with uncertain
approach increases the dimensionality of the problem,
parameters, aijk ; i , j {1, 2,...., n} assumed to be and hence the computational burden. To avoid this
difficulty, the nominal values of the parameters will be
uncorrelated white Gaussian random variables with the
used in the estimator. However, the impact of this
following statistics aijk (aij , a2 ) , Bk R nxr is the approximation on the dynamics of the estimator will be
ij
investigated.
control transition matrix, wk R n is a zero mean Assume that the filtered estimate xˆ k|k and its associated
white Gaussian input noise vector with covariance matrix
covariance matrix Pk|k are given at the k th sampling
Qk E{wk wkT } R nxn , C k 1 cijk 1 R mxn is the
instant, and used to approximate the conditional
output measurement matrix with uncertain
parameters, cijk 1 ; i {1, 2,...., m}, j {1, 2,...., n} assumed probability density function p( xk | Y k ) by Gaussian
distribution with conditional mean and covariance matrix
to be uncorrelated white Gaussian random variables with
as given above.
the following statistics cijk 1 (cij , c2ij ) , vk 1 R m is The filtered estimate of system (1') and its associated
a zero mean white Gaussian output noise vector with covariance matrix are given by:
a) The predicted estimate of the state vector xˆ k 1|k , its
covariance matrix Rk 1 E{vk 1vkT1} R mxm
associated covariance matrix Pk 1|k , and the predicted
M R nxn is positive semi-definite weighting matrix for
the states, N Rrxr is positive definite weighting matrix estimate of the output vector yˆ k 1|k , are given by:
for the control, x R n is the initial conditions of the xˆ k 1|k Axˆ k |k (4)
states assumed zero mean random Gaussian vector with Pk 1|k APk |k AT ˆ k |k kˆ kT|k k Qk (5)
covariance matrix P P | E{ x xT } R nxn , and
yˆ k 1|k Cxˆ k 1|k (6)
finally k {0,1, 2,...} is the discrete time instant.
2
b) The filtered estimate of the state vector xˆ k 1|k 1 , its
Let bk R n , ck 1 R nm be the parameter vectors
associated covariance matrix Pk 1|k 1 , and the filtered
defined as:
estimate of the output vector yˆ k 1|k 1 , are such that:
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
xˆ k 1|k 1 xˆ k 1|k K k 1 y k 1|k (7) Equation ( 1' -b) can also be written in the form:
Kk1 Pk1|kCT [CPk1|kCT ˆk1|kUk1ˆkT1|k Lk1 Rk1 ]1 yk 1 (C C k 1 )( xˆ k 1|k x k 1|k ) vk 1
Equation ( 1' -a) can be rewritten as: contains the deviation of the parameters of the matrix
xk 1 ( A A k )( xˆ k |k x k |k ) wk C k 1 around their nominal values C . Then, by
(11)
xk 1 Axˆ k |k Ax k |k A k xˆ k |k A k x k |k wk rearranging (20), one gets:
where A is the matrix contains the nominal (mean) yk 1 Cxˆ k 1|k Cx k 1|k ˆ k 1|k ck 1 k 1|k ck 1 vk 1
values of the parameters, while A k contains the (21)
where:
perturbations around these nominal values.
xˆ kT1|k O O...........
Let b [a , a ,..., a , a ,...]T R n be a vector
2
Using the model properties (3), the predicted estimator is Lk 1 diag[l11k 1 l22k 1 .....................lmmk 1 ] (26)
such that:
n
xˆ k 1|k Axˆ k |k (15)
lk 1ii Pk 1|k jj c2ij
k 1
From (13), (15), the prediction error is given by: j 1
x k 1|k Ax k |k ˆ k |k bk k |k bk wk (16) b) Derivation of the Filtered Estimator and the
Corresponding Covariance Matrix:
The covariance matrix of the estimation error is such that:
The filtered estimate of xk 1 is given by:
Pk 1|k E{ x k 1|k x kT1|k } (17)
xˆ k 1|k 1 E{ xk 1 | Y k , yk 1}
Using the model properties (3), Pk 1|k is given by: (27)
xˆ k 1|k Pxk 1 y k 1|k Pyk11|k y k 1|k y k 1|k
Pk 1|k APk |k AT ˆ k |k kˆ kT|k k Qk (18)
where: Pxk 1 y k 1|k E{ xk 1 y kT1|k }
(28)
k diag[ a2 11k
a2 12k
................... a2nn ] (19-a) E{( xˆ k 1|k x k 1|k ) y kT1|k }
k
k diag[e11 k
e22k .....................ennk ] (19-b) Using (24) in (28), and due to the independency
n between x k 1|k , ck 1 , vk 1 , one gets:
eiik Pk |k jj a2ij (19-c)
j 1
k Pxk 1 y k 1|k Pk 1|k C T (29)
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Let K k 1 Pxk 1 y k 1|k Pyk11|k y k 1|k (30) d) The covariance matrix Pk 1|k , and the predicted
estimate of the output yˆ k 1|k are as given by (5), (6).
Using (25), (29) in (30) one can get K k 1 as given by
(8). Hence: e) The filtered estimate of the state vector xˆ k 1|k 1 , its
xˆ k 1|k 1 xˆ k 1|k K k 1 y k 1|k (31) associated covariance matrix Pk 1|k 1 , and the
The filter estimation error is such that: filtered estimate of the output vector yˆ k 1|k 1 are as
x k 1|k 1 x k 1|k K k 1 y k 1|k (32) given by (7)-(10).
Using (32), the covariance matrix of the filter estimation The flowchart of the observer-based controller is
error is such that: given in the following section.
Pk 1|k 1 ( I K k 1C ) Pk 1|k (33)
5. The Flowchart of the Algorithm
4. Control Design
In the system model (1), since parameters of the system
as well as the states are random, the system is bilinear START
rather than linear. Therefore, the separation principle
does not hold. However, the problem will be treated as
deterministic and the resulted control strategy will be INPUT
applied to the stochastic problem. It is obvious in this
case that the resulting closed loop control system is
suboptimal rather than optimal.
Let us consider the following servo-mechanism discrete-
time linear deterministic system:
k 1
1 f
2
min J xk x d uk
2
(34) CALCULATE
2 k k M N
Subject to:
x k 1 Ax k B k u k d (35)
n
where x k R is the state vector assumed to be
deterministic, A R nxn is the matrix contains the
nominal values of the parameters, while other variables
are as defined in section 2. No
By writing the Hamiltonian of this problem, and from the If
necessary conditions of optimality, the expression for the
control is such that [13]:
uk N 1 BkT AT Prk M xk k Mx d Yes
1
(36)
T 1 END
where Prk M A Prk 1 A with Prk [0] (37)
f
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
MI 2
(k ) xˆ j (k | k ))
RMSE State 2
i 1
(x j 3
RMSE (x j (k ), xˆ j (k | k )) 2
MI 1
0 100 200 300 400 500 600 700 800 900 1000
Kalman Filter
RMSE State 2
3
formula:
RMSE State 2
1.5
kf MI 2
1
k 0
(x
i 1 j
(k ) xˆ j (k | k )) 0.5
(k f )(MI )
0 100 200 300 400 500 600 700 800 900 1000
time (sec)
Table (1) shows the RMSE indices calculated over 100 Figure 2: RMSE of x 2 (Case-a).
Monte Carlo iterations for each case study while using
the three filters. Modified Kalman Filter
30
RMSE State 3
Table 1: RMSE index (MI = 100) 20
10
MKF KF EKF
Kalman Filter
30
RMSE State 3
10
0
0 100 200 300 400 500 600 700 800 900 1000
b 0.5 1.0 20 19.687 25.099 time (sec)
2 Div.
c 0.5 1.0 30 61.726 66.207 Figure 3: RMSE of x3 (Case-a).
d 1.0 1.0 30 576.66 686.21
a 0.1 0.1 10 10.054 10.09 1
Modified Kalman Filter
0.9
3 Div. 0.8
0 100 200 300 400 500 600 700 800 900 1000
d 1.0 1.0 30 2.23e+3 2.87e+3 Kalman Filter
15
RMSE State 1
10
1.2
0 100 200 300 400 500 600 700 800 900 1000
Case-b are shown in Figures (4-6). time (sec)
1
Modified Kalman Filter
Figure 4: RMSE of x1 (Case-b).
RMSE State 1
0.5
Modified Kalman Filter
200
RMSE State 2
0 150
0 100 200 300 400 500 600 700 800 900 1000
100
50
Kalman Filter
1 0
0 100 200 300 400 500 600 700 800 900 1000
RMSE State 1
Kalman Filter
300
0.5
RMSE State 2
200
0 100
0 100 200 300 400 500 600 700 800 900 1000
0
0 100 200 300 400 500 600 700 800 900 1000
Extended Kalman Filter 149
x 10 Extended Kalman Filter
1 8
RMSE State 1
RMSE State 2
0.5 4
0
0 0 100 200 300 400 500 600 700 800 900 1000
0 100 200 300 400 500 600 700 800 900 1000 time (sec)
time (sec)
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
400
k 1 k
iak 1 0 0.9632 0.9238 iak 0.5023
200
k 1
0 100 200 300 400 500 600 700 800 900 1000
Kalman Filter
yk 1 [0 1 0] k 1
1000
(47)
RMSE State 3
500 i
ak 1
0
0 100 200 300 400 500 600 700 800 900 1000
where, the system model is corrupted by an input noise
x 10
149 Extended Kalman Filter w (k ) N (0, 0.1) and measurement disturbance
10
v (k ) N (0, 0.01) .
RMSE State 3
0
0 100 200 300 400 500 600 700 800 900 1000
assumed to be uncertain with a standard deviation equals
time (sec)
to certain percentage Pn of their nominal values.
Figure 6: RMSE of x3 (case-b) x [10 80 0.5]T , xˆ | [5 79 1]T , P | I R3 x 3
The RMSE indices of the states calculated over 100
6.2 Case Study: Monte Carlo iterations using the three filters are shown in
The transfer function of a DC motor is given by [14]: Table 2. RMSE plots for Case-b are shown in Figures (7-
(s) KT 9).
(43)
E ( s ) s[( sLa R ' )( sJ B ) KT K b ]
Table 2: RMSE index, Q=0.1, R=0.01 (MI = 100).
where, Case State Pn% RMSE index
is the motor angle displacement.
d MKF KF EKF
is the motor rotating speed, where .
dt a 5 8.6057 8.6057
ia is the armature winding current.
b 10 9.3070 9.3070
E is the applied voltage.
KT is the motor torque constant. a 5 0.1034 0.1231
b Div.
Kb is the back emf constant. 10 0.1044 0.2213
La is the armature winding inductance. a 5 6.6085 12.4121
ia
'
R is the armature winding resistance. b 10 15.5597 34.4408
J is the moment of inertia of rotor and load.
B is the damping coefficient.
The state vector x is defined by x T [ i a ]T . 12
Modified Kalman Filter
10
0 1 0 0 Kalman Filter
d
KT / J 0 E (44)
12
0 B/J
RM SE State 1
10
dt
ia 0 K b / La R / La ia 1/ La
8
4
0 100 200 300 400 500 600 700 800 900 1000
ia
RM SE State 1
7
where E=150 is the reference input. 6
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
0.5
0
0 100 200 300 400 500 600 700 800 900 1000
Kalman Filter
1
RMSE State 2
0.5
0
0 100 200 300 400 500 600 700 800 900 1000
0.5
0
0 100 200 300 400 500 600 700 800 900 1000
40
20
0
0 100 200 300 400 500 600 700 800 900 1000
Kalman Filter
150
RMSE State 3
100
50
0
0 100 200 300 400 500 600 700 800 900 1000
150
x 10 Extended Kalman Filter
3
RMSE State 3
0
0 100 200 300 400 500 600 700 800 900 1000
time (sec)
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
14
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
A Novel Nine-Level MPC Inverter for Direct Torque Control Induction Motor
Drive
15
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
The paper is organized as follows: the concept of nine - are cut in 1/8th with reduced harmonics of output
level MPC VSI is discussed in section 2 and waveforms for the same switching frequency, and power
representation of proposed DTC scheme is discussed in rating is increases.
section 3. The simulation results and discussion of the Relatively to the 7-level inverter which is only capable to
proposed method are exposed at the next section. Finally produce 343 space vector voltages, a 9-level inverter has
conclusions are given in the last section 93=729 switching states are possible as shown in figure.
If voltages of eight capacitors are equivalent, some
2. Nine-Level MPC VSI and Related Output switching vectors are overlapped and there are 106
Voltage Vectors effective vectors.
The architecture of MPC is several points clamped to According to the magnitude of the voltage vectors, we
specific voltages using some components. Even diode- divided them into thirteen different groups:
clamped converters belong to this family because the bus
between two switches is clamped by a clamping diode.
Furthermore, when the number of voltage level is odd,
the converters are called Neutral Point Clamped (NPC)
because the neutral point is clamped. As Figure.1 shows,
the 9-level leg is completely different: in MPCs the
voltages are clamped using couples switch-diode instead
of using a simple diode. Anyway, given a number of
levels, the number of switches needed by MPC is the
same needed by diode-clamped. The control of MPC leg
is more complicated in the respect of other topologies.
Even this kind of converter allows finding
complementary couples of switches. The constrain so
introduced is not physiologically necessary, but it is a
simple way to simplify the control scheme and the
switching table (Table I).
TABLE I
SWITCHING STATES OF A NINE-LEVEL
INVERTER
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
The space vector modulation diagram of 9-level inverter As shown on figure, DTC scheme needs only the output
is divided into six sextants, and each sextant is divided voltages and currents of the inverter which feeds the
into sixty-four triangles regions in order to show the induction motor, the instantaneous values of flux and
vectors nearest to the reference voltage as shown in torque in the machine are then calculated and the error
figure 2 and 3. can be gotten after compared with the referring torque
The voltage vectors of 9-level inverter are divided into and flux (Teref and sref )
thirteen groups as shown in table II. The procedure of
selection of voltage vectors is similar to that of 3-level
inverter is discussed in [8].
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
TABLE VI
Proposed Switching Table
S
CΦ CЃ 1 2 3 4 5 6 7 8 9 10 11 12
-8 684 694 685 696 680 686 681 688 682 690 683 692
-7 594 604 595 606 590 596 591 598 592 600 593 602
-6 494 504 495 506 490 496 491 498 492 500 493 502
-5 254 264 255 266 250 256 251 258 252 260 253 262
-4 184 194 185 196 180 186 181 188 182 190 183 192
-3 127 143 128 145 123 135 124 137 125 139 126 141
-2 307 399 308 400 303 395 304 396 315 397 306 398
-1 5 48 6 49 1 44 2 45 3 46 4 47
0 Zero Vector
+1 3 46 4 47 5 48 6 49 1 44 2 45
+2 305 397 306 398 307 399 308 400 303 395 304 396
+1 +3 125 139 126 141 127 143 128 145 123 135 124 137
+4 182 190 183 192 184 194 185 196 180 186 181 188
+5 252 260 253 262 254 264 255 266 250 256 251 258
+6 490 498 491 500 492 502 493 504 488 494 489 496
7 590 598 591 600 592 602 593 604 588 594 589 596
8 678 686 679 688 680 690 681 692 676 682 677 684
-8 696 680 686 681 688 682 690 683 692 684 694 685
-7 590 596 591 598 592 600 593 602 594 604 595 606
-6 496 491 498 492 500 493 502 494 504 495 506 490
-5 251 258 252 260 253 262 254 264 255 266 250 256
-4 188 182 190 183 192 184 194 185 196 180 186 181
-3 125 139 126 141 127 143 128 145 123 135 124 137
-2 397 306 398 307 399 308 400 303 395 304 396 315
-1 4 47 5 48 6 49 1 44 2 45 3 46
0 Zero Vector
+1 45 3 46 4 47 5 48 6 49 1 44 2
-1 +2 397 306 398 307 399 308 400 303 395 304 396 305
+3 139 126 141 127 143 128 145 123 135 124 137 125
+4 183 192 184 194 185 196 180 186 181 188 182 190
+5 262 254 264 255 266 250 256 251 258 252 260 253
+6 492 502 493 504 488 494 489 496 490 498 491 500
+7 602 593 604 588 594 589 596 590 598 591 600 592
+8 681 692 676 682 677 684 678 686 679 688 680 690
-8 692 684 694 685 696 680 686 681 688 682 690 683
-7 604 595 606 590 596 591 598 592 600 593 602 594
-6 506 490 496 491 498 492 500 493 502 494 504 495
-5 256 251 258 252 260 253 262 254 264 255 266 250
-4 188 182 190 183 192 184 194 185 196 180 186 181
-3 139 126 141 127 143 128 145 123 135 124 137 125
-2 398 307 399 308 400 303 395 304 396 315 397 306
-1 48 6 49 1 44 2 45 3 46 4 47 5
0 Zero Vector
+1 47 5 48 6 49 1 44 2 45 3 46 4
+2 308 400 303 395 304 396 305 397 306 398 307 399
0 +3 145 123 135 124 137 125 139 126 141 127 143 128
+4 186 181 188 182 190 183 192 184 194 185 196 180
+5 258 252 260 253 262 254 264 255 266 250 256 251
+6 498 491 500 492 502 493 504 488 494 489 496 490
+7 600 592 602 593 604 588 594 589 596 590 598 591
+8 690 681 692 676 682 677 684 678 686 679 688 680
18
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
applied voltage vector. Thus, the voltage vectors will be Figure.7: D-Q axis flux response of 9-level Inverter fed
chosen according to the rotor speed [11]. Voltage vectors DTC IM drive.
with low amplitude will be chosen for lower speeds.
4. Simulation Results and Discussion
The proposed scheme is simulated in DTC with
15
multilevel control. The induction motor parameters are as
follows: Rs=4.85Ω, Rr=3.805Ω, Ls=274mH, Lr=274mH, 10
Lm=258mH, p=2, J=31g.m2, V=220V, power=1.5kW
and speed=1420rpm. All simulations have a sample time 5
Phase current(A)
1.5
15
1
10
0.5
S ta to r D -Q flu x (A )
5
P has e Current(A )
0 0
-5
-0.5
-10
-1
-15
Figure.6: D-Q axis flux response of 7-level Inverter fed Figure.9: Phase current response of 9-level Inverter fed
DTC IM drive DTC IM drive
19
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
0.6
0.4
Electromagnetic Torque(N-M)
0.2
-0.2
-0.4
-0.6
0.4 0.405 0.41 0.415 0.42 0.425 0.43 0.435 0.44 0.445 0.45
Time(sec)
Figure.14:Stator line voltage harmonic spectrum of 9-
Figure.10: Torque error for 7-level inverter fed DTC IM level inverter
drive
0.1
0.05
Electromagnetic Torque (N-M)
-0.05
-0.1
-0.15
0.4 0.405 0.41 0.415 0.42 0.425 0.43 0.435 0.44 0.445 0.45
Time(sec) Figure.15: Stator line voltage harmonic spectrum of 9-
Figure.11: Torque error for 9-level inverter fed DTC IM level inverter
drive 1.04
600 1.03
1.02
400
Stator flux responce (wb)
1.01
200
Stator line voltage(v)
0
0.99
-200 0.98
0.97
-400 0.2 0.21 0.22 0.23 0.24 0.25 0.26 0.27 0.28 0.29 0.3
Time(sec)
-600
Figure.16:Stator flux error of 7-level Inverter fed
0.2 0.205 0.21 0.215 0.22 0.225
Time(sec)
0.23 0.235 0.24 0.245 0.25
DTC IM drive
Figure.12: Stator line voltage of 7-level inverter 1.01
1.008
600
1.006
400
Stator flux responce (wb)
1.004
200 1.002
Stator line voltage(v)
1
0
0.998
-200 0.996
0.994
-400
0.992
0.2 0.21 0.22 0.23 0.24 0.25 0.26 0.27 0.28 0.29 0.3
Time(sec)
-600
0.2 0.205 0.21 0.215 0.22 0.225 0.23 0.235 0.24 0.245 0.25
Time(sec) Figure.17: Stator flux error of 9-level Inverter fed
Figure.13: Stator line voltage of 9-level inverter DTC IM drive
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Biographies
Mr.O.Chandrasekhar received his
B.Tech degree in Electrical &
Electronics Engineering from
JNTUH,India in 2005 and
M.Tech with power Electronics
and Electrical Drives from
Vignan’s Engineering
College,Vadlamudi, India in
2008.He has been with Vignan’s
Lara Institute of Technology and Science ,Vadlamudi as
Associate Professor. Presently he is a part-time research
student at J.N.T.U College of Engineering, Hyderabad-
500072, India, working towards his doctoral degree. His
Research interests are Power Electronics, Industrial
Drives.
Dr.K.ChandraSekhar received
his B.Tech degree in Electrical
& Electronics Engineering from
V.R.Siddartha Engineering
College, Vijayawada, India in
1991 and M.Tech with
Electrical Machines &
Industrial Drives from Regional
Engineering College, Warangal,
India in 1994. He Received the
PhD degree from the J.N.T.U College of Engineering,
Hyderabad, India in 2008. He is having 17 years of
teaching experience. He is currently Professor and Head
of Department, EEE, R.V.R & J.C.College of
engineering, Guntur, India. His Research interests are
Power Electronics, Industrial Drives & FACTS Devices.
22
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
23
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Figure 2: Simplified Hybrid Illumination The FPGA is programmed using Hardware Description
Language (HDL). In this case VHDL is used. [VHDL is
This simplified system is sustainable for many a hardware description language used in electronic design
applications emerging due to the continued growth of DC automation to describe digital and mixed systems and
power distribution in buildings, and the principal force integrated circuits.] The pattern of the LEDs defined by
behind this trend is LED-based lighting which we have the user can be modified using this hardware language.
cited as one major driver. The main challenges in Basys Spartan 2 FPGA is used for this application due to
building such a system include analysis of a switching its flexibility, low cost, and ease of use.
circuit that controls alternating of power between the AC The application software used in our case is Adept which
and DC distribution systems, being fed from Solar panel is a powerful program that allows configuration and data
and switching between the two sources. Figure 3 transfer with Xilinx logic devices, and is used as an
presents one solution for this problem where an AC interface between Xilinx and the Spartan 2 FPGA. For
contactor and a DC contactor with mechanical interlock maximum intensity from the LEDs, the typical forward
are used, and figure 4 presents the relay control for the voltage of 3.9V, with forward current 700mA, is supplied
mechanically interlocked contactors. to the FPGA. A personal computer provided with Xilinx
The illumination system is designed to be used to software environment is used for programming the
individually control an array of HB LEDs. Each HB LED sequence of the LEDs defined by the user. The
operates in a different mode that is independently defined programming is done again using VHDL. The developed
by the user. The defined sequence of LED illumination software was tested using Digilent FPGA.
24
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
High brightness LEDs [9&10] can be driven at currents input voltage that varies from above to below the output
from hundreds of mA to more than an ampere, compared voltage. This type of topology is needed when the
with the tens of mA for other LEDs; however few of the voltage from an unregulated input power source such as
HB LEDs can produce over a thousand lumens. Since solar where the sun irradiation, temperature and weather
overheating is destructive, the HP LEDs may need to be changes directly affect the generated output voltage. The
mounted on a heat sink to allow for heat dissipation. If standard SEPIC topology [11&12] requires two inductors
the heat from an HB LED is not removed using a heat in additional to step-up transformer, making the power-
sink, the device will burn out in seconds. supply footprint quite large.
A single HB LED can often replace an incandescent bulb Photovoltaic (PV) cells are used to convert the sunlight
in a torch, or be set in an array to form a powerful HB into electrical energy. On the other hand, it is also an
LED system. LEDs can operate on AC power without the important issue to save the energy demand and increase
need for a DC converter. Each half-cycle part of the LED the energy efficiency [13-15]. High brightness light
emits light with the other half cycle being dark, and this emitting diodes (LEDs) [16&17] are becoming more
is reversed during the next half cycle. The efficacy of this widespread for the lighting applications such as
type of HB LED is typically around 40 LM/W. A large automobile safety and signal lights, traffic signals, street
number of LED elements in series may be able to operate lighting and so on. LED power circuitry is discussed
directly from line voltage. In 2009 Seoul Semiconductor thoroughly in the literature [18].
released a high DC voltage capable of being driven from In lighting applications with solar energy, the charger is
AC power with a simple controlling circuit. The low adapted to convert the solar irradiations for storing in the
power dissipation of these LEDs gives them more battery during the daytime. In the nighttime, a discharger
flexibility than the original AC LED design. In this is used to release energy in the battery and drive the LED
project the HB LEDs are powered from a DC source. lighting system. Low-power DC-DC converters can be
To control the LED from the FPGA, a driver circuit is used for the charger and discharger mode. Since the PV
needed to boost the power of the FPGA output. An LED voltage from the solar panel is unstable, the buck-boost
driver circuit is an electric circuit used to power a light- converter is more suitable for the charger circuit. This
emitting diode or LED. The circuit consists of a voltage converter can also be used in the discharger circuit.
source powering a current limiting resistor and an LED
connected in series. The HB LEDs used in our design 4. DC-DC Converter MPPT Control Design
have a constant current of 700mA and a supply voltage of and Analysis Using Computer Simulation
+3V. As the current has to be amplified to 700mA for Computer simulation is an important tool for future
each LED, two transistors are connected together so that illumination systems design. The HB LED-based
the current amplified by the first is amplified further by illumination system was simulated using a
the second transistor. The overall current gain is equal to matlab/Simulink environment [19]. In this section, we
the two individual gains multiplied together, i.e hFE = present the complete simulation model including the
hFE1 × hFE2, where hFE1 and hFE2 are the gains of the solar PV module, Maximum Power Tracking module
individual transistors. (MPPT), DC-DC boost converter and storage unit
(Battery ). These modules are going to be described as
3. Sustainable PV-Powered Illumination follows:
Since photovoltaic panels are used to power the HB LED
illumination systems, there is a need for the development
of the DC converter system to power the LEDs. To 4.1 Characteristics of PV Array
satisfy this requirement, a forward converter with PV- Basically, PV cell is a P-N semiconductor junction that
based LED applied in lighting systems was used. In the directly converts light energy into electricity. It has the
proposed DC supply system, the SEPIC is used to deliver equivalent circuit shown in Figure1 as represented in [20-
solar energy via PV cell modules to a battery bank in 22].
charging mode during the daytime. During the nighttime,
the converter drives an LED lighting system.
Figure 7 illustrates the principle PV-SEPIC- LED circuit
applied in street illumination, where the produced PV
voltage is stored in a battery bank throughout the
charging unit during the daytime, at night the discharger Figure 6: Equivalent circuit for PV cell
activates and the LEDs are energized with appropriate
voltage throughout the step-up transformer and full Where Iph represents the cell photocurrent; Rp and Rs are
bridge rectifier. the intrinsic shunt and series resistance of the cell
SEPIC circuits find widespread application when the respectively; Id is the diode saturation current; Vo and Io
input voltage fluctuates above and below average value,
are the cell output voltage and current respectively.
while the output voltage must be kept at a constant value
with minimum tolerances. One of most important The following are the simplified equations describing the
applications of SEPIC circuit is the integration with the cell output voltage and current:
photovoltaic system (PV system) and illumination load of A.K.T c Iph Id Io
series and parallel connected LEDs. Vo ln Rs.Io (1)
The SEPIC converter is a DC/DC converter topology that q Io
provides a positive regulated output voltage from an
25
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
q . Vo / Ns 5
I-V performance
4
1000W/m2
3.5
3 q . Eg 1 1
Tc
3
800W/m2
I d I or .e
B . K Tr Tc
(3)
Ipv,A
2.5
Tr 2
600W/m2
1.5
I ph N p .I sc . n I t ( T c T r )
400W/m2
(4) 1
0.5
Ppv, W
40
boost chopper according to specifications given in table 1 c) Power performance of proposed module
at reference irradiation 1000W/m2. Figure 7: PV Array module & main charaterestics.
The PV Array voltage can be obtained by multiplying the
module voltage and current by Nsm and Npm that Figure 7 illustrates the proposed PV array with R load
represents number of series and parallel connected presenting the equivalent resistance of complete LED set,
modules respectively. where the obtained results for different variation levels
are presented. From these performances it is shown that
Table 1: Data specification for PV Array. the total output PV voltage and current varies according
to irradiation level with approximated 65W maximum
q K Iph Id RS RP TC
power at G=1000W/m2.
1.602e- 1.38e-
4 A 0.2mA 23m 0.65k 25C
19 C 23J/K
NS NP VO VOC ISC VMPP IMPP 4.2 Maximum power point derivation
38 4 0.6V 21.5 V 4.7A 17.5V 3.7A In order to operate the module at maximum extracted
NSm NPm Rload power, it is necessary to calculate the coordinates of the
1 1 4.5( Set of Series connected LED maximum power point (VMPP, IMPP). For this, and to
Diodes) simplify the model in Simulink, the coordinates of the
maximum power point are given by the following
equations:
C ontinuous
powergui
G_T
IMPP Iph Id. e Vmpp / VT 1 (5)
Iph Im pp VOC / VT
1
T
5
T_var
T +
- v
VMPP VT. ln1
Iph
e
1 (6)
1 1200 G
V2
G G_var
i
Lf Output Where VT and Voc are the thermal voltage
6 Ns +Vpv + - and the cell open circuit voltage respectively
Ns I
1 Np
and given by:
Np + K .T c
Cf R-LED -
v
VT
GND
V1 q (7)
PV Array
I sc
V OC V T . ln 1
I d
The maximum power that can be obtained can be
a) Matlab/Simulink module for PV Array
expressed as follows:
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
1
Vo Vpv .
1 D
Po Vo / RI
2
dPo Po ( k 1) Po ( k );
dVo Vo ( k 1) Vo ( k ); (10)
(dPo/dVo) ?..... D ?
0 D D D
0 dVo
0 D D D
dPo
0 dVo 0 D D D
0 D D D
While figure8 illustrates the Power performance and the
flowchart procedure for obtaining the appropriate duty b) Flowchart for tracking procedure
cycle needed to operate the chopper at maximum obtained
Figure 8: P&O MPPT tracking method.
power.
a) Boost DC Chopper
27
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Irradiation, W/m2
PV_Current
1600
MPPT_Duty _Cy cle
PV_Voltage
PV_Specifications.m 1400
MPPT
PV_perf
Discrete, Dbl_clk_for_init
Ts = Te s. 1200
pow ergui
MPPT Duty Cycle
Pv _Voltage 1000
Duty
Ppv
800
Pv _Current
PV_Current
600
Rate1 Ipv
V+PV
298 RT Ipv
T RCable 400
D1 0 2 4 6 8 10 12
Vpv +Ve_Load
T,[K]
+ R-LED Vout
V+pv Simulation interval x 10
4
+
+
Rate2 G m Ir v
-
V-pv _
Pout
s
-
+
RT V-PV I2
-
Battery
i
Radiation
Vpvin-out
buck-Boost_Converter I_load 10
Duty cCycle vs simulation time
a) Load voltage & current at two operation modes 1
D1
0.9
L 0.8
3
V+PV 1 0.7
D2 +Ve_Load
1 PWM_IN PWM_OUT
[Vpv]
0.6
Duty Cycle
[Vpv] Duty
PG From
D
g
Goto
Q_ch
0.5
R1
C_Output1
+ v
S
+
- v C_Output
- 0.4
VM Vout
V M1 +
Pv_Voltage
v 2 1
- 0.3
Vpv1 Gain_Divider
R2
0.2
-Ve_load
4 2 0.1
V-PV
RSh
0
Power2 Pv_Current 0 2 4 6 8 10 12
+
Vpv
v
-K- 2
Simulation interval x 10
4
Gain_Voltage_to_current
sat_Current MPPT_Duty_Cycle 6
ZOH 1/z
MATLAB
1
Function 5
PV_Voltage
Rate1 MPPT_M_Code Rate
2 4
Ipv, A
sat_voltage 3
1
Scope
0
c) MPPT module -1
follows: 100
power is achieved.
-40
PV array current: Figure 11(c) illustrates the time 0 1 2 3 4 5 6 7
Simulation interval 4
profile of PV current, where its shown that high x 10
irradiation produces large current and power . d) PV voltage, current and power
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Array & output voltage [7] Mohan, Undeland, and Robbins, "Power Electronics
70
Converters Applications and Design", John Wiley
60 and Sons, Inc. 2003.
Vout
[8] Shaffer, “Fundamentals of Power Electronics with
50
Matlab”, ISBN# 9781584508526
40
[9] Kingbright
Vpv & Vout, V
http://www.kingbrightusa.com/default.asp
30
Vpv
[10] Lumex http://www.lumex.com/marketingdownloads
[11] Jeff Fallin, "Designing DC/DC converters based on
20
SEPIC topology", Analogue Applications Journal,
10 Power Management, Texas Instruments Incorporated,
4Q, 2008, pp. 18-23
0
[12] Lin B.R. & Huang C.L., "Analysis and
-10
implementation of an integrated SEPIC -forward
0 2 4 6
Simulation interval
8 10 12
4
converter for photovoltaic-based light emitting diode
x 10
lighting", IET Power Electronics, 2009, Vol.2, Iss.6,
e) PV and chopper voltage pp.635-645.
Fig.11: Circuit performances at various irradiations [13] Hodge B. K., "Alternative Energy Systems &
applications", John Willey & Sons, Inc., 2010,
pp.114-148.
PV voltage, current and power: Figure 11(d) [14] Chuang Y.C. & Ke Y.L.," High efficiency battery
illustrates the time profile of PV voltage , current and charger with a Buck zero-current switching pulse
power , where its shown how the power being width modulated converter", 2008, Vol.1, Iss.4,
affected by increasing the irradiation level. pp433-444.
[15] Jovcic D., "Step-up DC-DC converter for megawatt
Input-output voltage: Figure 11(e) illustrates the size applications", IET Power Electronics, 2009,
time profile of PV input voltage and output chopper Vol.2, Iss.6, pp.675-685.
voltage, where its shown how the input voltage varies,
[16] Redley R., " Analyzying the Sepic converters",
while the output voltage is boosted up and fixed at
Power System Design Europe, November, 2006,
appropriate for the elimination system value.
pp.14-18.
5. Conclusion [17] Bisogno F.E., Nittayarumphong S., Radecker M.,
A Sustainable hybrid MPPT-Controlled HB LED-Based Doprado R.N., " A line power-supply for LED
Illumination System was developed. This illumination lighting using piezoelectric transformers in class-E
system can be used for many lighting applications since it topology", proc. IEEE IPEMC'06, 2006, Vol.2, pp1-
is more efficient and reliable than existing traditional 5.
lighting systems based on incandescent or fluorescent [18] Joseph T. Verdeyen. “Laser Electronics” 3rd edition
lamps. While the use of HB LEDs adds to the initial cost Pearson Prentice Hall, 1995.
of the system, it will be paid off in the long term due to [19] Matlab and Simulink, The Mathworks, Inc., version
their higher reliability, flexible control, and long life time. R2010, http://www.mathworks.com
A simulink model for this illumination system was built [20] Atlas H., Sharaf A.M.," A Photovoltaic array
in order to study the system behaviors at various simulation model for Matlab-simulink GUI
irradiation level, the effect of MPPT system and environment, IEEE, Trans., 2007, pp.341-345.
generated duty cycle on chopper operation, which in turn [21] Chouder A., Silvester S., Malek A., " Simulation of
causes better utilization, effecienecy enehancement and photovoltaic grid connected inverter in case of grid-
loss reduction. failure", Revue des energes Renouveables Vol. 9,
No4, 2006, pp.285-296.
6. References [22] Buresch M.," Photovoltaic energy systems design
[1] Donald L. Steeby, “Alternative Energy Sources and and Installation", McGraw-Hill, New York, 1983.
Systems,” Delmar Cengage Learning, 2012.
[2] Thomas Kessell, “Introduction to Solar Principles,”
Pearson Education, Inc. 2011.
[3] Peter Gevorkian, "Large-Scale Solar Power System
Design", Mc Graw Hill Higher Education, 2011.
[4] Issa Batarseh, "Power Electronic Circuits", John
Wiley and Sons, Inc. 2004.
[5] Mohammad H. Rashid, "Power Electronics Circuits
Devices and Applications", Pearson Education, Inc.
2004.
[6] Daniel W. Hart, "Power Electronics", Mc Graw Hill
Higher Education, 2010.
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Biographies
AKRAM ABU-AISHEH is an
Associate Professor of Electrical
and Computer Engineering at the
University of Hartford where he
has served as the assistant chair of
the Electrical and Computer
Engineering Department and
director of the electronic and
computer engineering technology
program for two years. Dr. Abu-aisheh has a doctorate in
Optical Communications from the Florida Institute of
Technology and Master of Science and Bachelor of
Science degrees in Electrical Engineering from the
University of Florida. His research interests include
Fiber Optic Communications, Solar Energy, Power
Electronics, and Engineering Education. He has
published a book, a book chapter, and several
international journals and conference papers. Dr. Abu-
aisheh may be contacted at abuaisheh@hartford.edu
SAMEER KHADER is an
Associate Professor of Electrical
and Computer Engineering at
Palestine Polytechnic University
(PPU) – Palestine. During the
2010-2011 year he was a visiting
professor at the University of
Hartford, CT, USA spending his
sabbatical year. He is a director
of Power Electronics & Signal Processing Research Unit
at PPU. Before that he served for ten years as university
academic provost, dean of college and Chair of the
Electrical & Computer Engineering Department at PPU.
His research interests include Electrical machines,
Electrical drives, Power Electronics Converters,
Renewable Energy Sources and Smart Grids, in addition
to engineering education. He has several publications in
international journals and conferences. Dr. Khader may
be contacted at sameer@ppu.edu
30
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
31
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
A modulation scheme is presented in [12], where a fixed and INV-3 in cascade. The Inverter-B is composed of
common mode voltage is added to the reference signal two conventional two-level inverters INV-4 and INV-5 in
throughout the modulation range. It has been shown [13] cascade. The DC link voltages of INV-1, INV-2, INV-3,
that this common mode voltage addition will not result in INV-4 and INV-5 are (2/8)Edc, (2/8)Edc, (2/8)Edc,
a SVPWM-like performance, as it will not centre the (1/8)Edc and (1/8)Edc respectively, where Edc is the DC
middle space vectors in a sampling interval. The common link voltage of an equivalent conventional single two-
mode voltage to be added in the reference phase voltages, level inverter drive.
to achieve SVPWM-like performance, is a function of the The leg voltage EA3n of phase-A attains a voltage of
modulation index for multilevel inverters [13]. A (2/8)Edc if (i)The top switch S31 of INV-3 is turned on
SVPWM scheme based on the above principle has been (Figure 1) and (ii) The bottom switch S24 of INV-2 is
presented [14], where the switching time for the inverter turned on. The leg voltage EA3n of phase-A attains a
legs is directly determined from sampled sinusoidal voltage of (4/8)Edc if (i) the top switch S31 of INV-3 is
reference signal amplitudes. But it involves region turned on (ii) The top switch S21 of INV-2 is turned on
identifications based on modulation indices. While this and (iii)The bottom switch S14 of INV-1 is turned on. The
SVPWM scheme works well for a three-level PWM leg voltage EA3n of phase-A attains a voltage of (6/8)Edc
generation, it cannot be extended to multilevel inverters of if (i) the top switch S31 of INV-3 is turned on (ii) The top
levels higher than three, as the region identification switch S21 of INV-2 is turned on and (iii)The top switch
becomes more complicated. A carrier-based PWM S11 of INV-1 is turned on. The leg voltage EA3n of phase-
scheme has been presented [15], where sinusoidal A attains a voltage of zero volts if the bottom switch S34
references are added with a proper offset voltage before of the INV-3 is turned on. Thus the leg voltage EA3n
being compared with carriers, to achieve the performance attains four voltages of 0, (2/8)Edc, (4/8)Edc and
of a SVPWM. The offset voltage computation is based on (6/8)Edc, which is basic characteristic of a 4-level
a modulus function depending on the DC link voltage, inverter. Similarly the leg voltages EB3n and EC3n of
number of levels and the sinusoidal reference signal phase-B and phase-C attain the four voltages of 0,
amplitudes. A SVPWM scheme is presented [18], where (2/8)Edc, (4/8)Edc and (6/8) Edc.
the switching time for the inverter legs is directly The leg voltage EA5n’ of phase-A attains a voltage of
determined from sampled sinusoidal reference signal (1/8)Edc if (i)The top switch S51 of INV-5 is turned on
amplitudes for five-level inverter where two three-level and (ii) The bottom switch S44 of INV-4 is turned on. The
inverters feed the dual-fed induction motor. A carrier leg voltage EA5n’ of phase-A attains a voltage of (2/8)Edc
based SPWM scheme is presented [19, 20] for five-level if (i) The top switch S51 of INV-5 is turned on and (ii)
and nine-level inverters. Qualitative SVPWM schemes are The top switch S41 of INV-4 is turned on. The leg voltage
presented for five-level inverters in [21, 22]. EA5n’ of phase-A attains a voltage of zero volts if the
The objective of this paper is to present an bottom switch S54 of the INV-5 is turned on. Thus the leg
implementation scheme for PWM signal generation for voltage EA5n’ attains three voltages of 0, (1/8)Edc and
nine-level inverter system for dual-fed induction motor, (2/8)Edc, which is basic characteristic of a 3-level
similar to the SVPWM scheme. In the proposed scheme, inverter. Similarly the leg voltages EB5n’ and EC5n’ of
the dual-fed induction motor is fed with symmetrical phase-B and phase-C attain the three voltages of 0,
four-level inverter from one end and symmetrical three- (1/8)Edc and (2/8)Edc.
level inverter from other end. The PWM switching times Thus, one end of dual-fed induction motor may be
for the inverter legs are directly derived from the sampled connected to a DC link voltage of either zero or (2/8)Edc
amplitudes of the sinusoidal reference signals. A simple or (4/8)Edc or (6/8)Edc and other end may be connected
way of adding an offset voltage to the sinusoidal to a DC link voltage of either zero or (1/8)Edc or
reference signals, to generate the SVPWM pattern, from (2/8)Edc. When both the inverters, Inverter-A and
only the sampled amplitudes of sinusoidal reference Inverter-B drive the induction motor from both ends, nine
signals, is explained. The proposed SVPWM signal different levels are attained by each phase of the
generation does not involve checks for region induction motor. The nine levels generated for phase-A
identification, as in the SVPWM scheme presented in are shown in Table 1.
[14]. Also, the algorithm does not require either sector
identification or look-up tables for switching vector TABLE 1
THE NINE LEVELS REALIZED IN THE PHASE-A WINDING
determination as are required in the conventional
multilevel SVPWM schemes [10, 11]. Thus the scheme is Leg- Leg- Motor phase voltage Level
voltage voltage EA3A5 = EA3n - EA5n'
computationally efficient when compared to conventional
of phase A, of phase A,
multilevel SVPWM schemes, making it superior for real- EA3n EA5n'
time implementation. 0 (2/8) Edc -(2/8) Edc Level 1
0 (1/8)Edc -(1/8)Edc Level 2
2. Nine-level inverter scheme for the dual- 0 0 0 Level 3
fed induction motor (2/8) Edc (1/8) Edc (1/8)Edc Level 4
(2/8) Edc 0 (2/8)Edc Level 5
The power circuit of the proposed drive is shown in
(4/8) Edc (1/8) Edc (3/8)Edc Level 6
Figure 1. A symmetrical four-level inverter, Inverter-A (4/8) Edc 0 (4/8) Edc Level 7
and a symmetrical three-level inverter, Inverter-B feed (6/8) Edc (1/8) Edc (5/8) Edc Level 8
the dual-fed induction motor. The inverter-A is composed (6/8) Edc 0 (6/8) Edc Level 9
of three conventional two-level inverters INV-1, INV-2
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Figure 1. Schematic circuit diagram of the proposed 9-level inverter drive scheme.
3. Proposed SVPWM in linear modulation voltage Eoffset1, are shown in figure 2 along with eight
range triangular carrier signals T1 to T8. Each time a sinusoidal
For two-level inverters, in the SPWM scheme, each reference signal crosses the triangular carrier signal, it
sinusoidal reference signal is compared with the triangular causes a change in the inverter switching state. The
carrier signal and the individual phase voltages are changes in phase voltage and their time intervals are
generated [1]. To attain the maximum possible peak shown in Figure 3 in a sampling time interval Ts. The
amplitude of the fundamental phase voltage, a common sampling time interval Ts can be split into four time
offset voltage, Eoffset1 is added to the sinusoidal intervals t01, t1, t2 and t02. The time intervals t01 and t02 are
reference signals [5, 12], where the magnitude of Eoffset1 the time durations for the start and end inverter space
is given by vectors respectively and the time intervals t1 and t2 are the
time durations for the middle inverter space vectors
(active space vectors), in a sampling time interval Ts. It
Eoffset1 ( E max E min) / 2 (1)
should be observed from Figure 3 that the middle space
vectors are not centered in a sampling time interval Ts.
Where Emax and Emin are the maximum and minimum Because of the level-shifted eight triangular carrier signals
magnitudes of the three sampled sinusoidal reference (Figure 2), the first crossing and the last crossing of the
signals respectively, in a sampling time interval. The sinusoidal reference signal cannot always be the minimum
addition of Eoffset1, results in the active space vectors and the maximum magnitude of the three sampled
being centered, making the SPWM scheme equivalent to sinusoidal reference signals, in a sampling time interval.
the SVPWM scheme [3]. In a sampling time interval, the Thus the offset voltage, Eoffset1 is not sufficient to center
sinusoidal reference signal which has lowest magnitude the middle inverter space vectors, in a multilevel PWM
crosses the triangular carrier signal first, and causes the system (Figure 3). Hence an additional offset (offset2) has
first transition in the inverter switching state and the to be added to the sinusoidal reference signals of Figure 2,
sinusoidal reference signal, which has the maximum so that the middle inverter space vectors can be centered
magnitude, crosses the triangular carrier signal last and in a sampling time interval, same as a two-level SVPWM
causes the last switching transition in the inverter system [3].
switching states in a two-level SVPWM scheme [5, 13].
For nine-level inverter, the modified sinusoidal reference
signals (E*AN, E*BN and E*CN) after addition of offset
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
6. Conclusion
A modulation scheme of SVPWM for nine-level inverter
system for dual-fed induction motor drive is presented.
The centering of the middle inverter space vectors of the
SVPWM is accomplished by the addition of an offset
voltage signal to the sinusoidal reference signals, derived
from the sampled amplitudes of the sinusoidal reference
signals. The SVPWM technique, presented in this paper
does not require any sector identification, as is required in
conventional SVPWM schemes. The proposed scheme
Figure 3. Inverter switching vectors and their switching time durations eliminates the use of look-up table approach to switch the
during sampling time interval Ts appropriate space vector combination as in conventional
SVPWM schemes. This reduces the computation time
required to determine the switching times for inverter
legs, making the algorithm suitable for real-time
implementation.
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Figure 7. (a)The total offset voltage to be added to sinusoidal reference Figure 9. (a)The total offset voltage to be added to sinusoidal reference
signals (b)The A-phase sinusoidal reference signal after offset voltage signals (b)The A-phase sinusoidal reference signal after offset voltage
is added (c) Motor phase voltage when M=0.3 (4-level operation) is added (c) Motor phase voltage when M=0.53 (6-level operation)
36
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Figure 10. (a)The total offset voltage to be added to sinusoidal reference Figure 12. (a)The total offset voltage to be added to sinusoidal reference
signals (b)The A-phase sinusoidal reference signal after offset voltage signals (b)The A-phase sinusoidal reference signal after offset voltage
is added (c) Motor phase voltage when M=0.62 (7-level operation) is added (c) Motor phase voltage when M=0.85 (9-level operation)
7. References
[1] Holtz, J., “Pulsewidth modulation–A survey,” IEEE
Trans. Ind. Electron., 30 (5), pp. 410–420,
1992.
[2] Zhou, K., and Wang, D., “Relationship between
space-vector modulation and three-phase
carrier-based PWM: A comprehensive
analysis,” IEEE Trans. Ind. Electron., 49 (1), pp.
186–196, 2002.
[3] Van der Broeck, Skudelny, H.C., and Stanke, G.V.,
“Analysis and realisation of a pulsewidth
modulator based on voltage space vectors,”
IEEE Trans. Ind. Appl., 24 (1), pp. 142–150, 1988.
[4] Boys, J.T., and Handley, P.G., “Harmonic analysis
of space vector modulated PWM waveforms,”
IEE Proc. Electr. Power Appl.,137 (4), pp. 197–204,
1990.
[5] Holmes, D.G., “The general relationship between
regular sampled pulse width modulation and
space vector modulation for hard switched
converters,” Conf. Rec. IEEE Industry Applications
Society(IAS) Annual Meeting, pp. 1002–1009, 1992.
[6] Kim, J., and Sul, S. “A novel voltage modulation
technique of the Space Vector PWM,” Proc.
Int. Power Electronics Conf., Yokohama,
Japan, pp. 742–747, 1995.
Figure 11. (a)The total offset voltage to be added to sinusoidal reference [7] Carrara, G.,Gardella, S.G., Archesoni,M., Salutari,
signals (b)The A-phase sinusoidal reference signal after offset voltage R., and Sciutto, G., “A new multi-level PWM
is added (c) Motor phase voltage when M=0.74 (8-level operation) method: A theoretical analysis,” IEEE Trans.
Power Electron., 7 (3), pp. 497–505, 1992
[8] K.Chandra Sekhar, G.Tulasi Ram Das, “An Eight-
level Inverter System for an Induction Motor with
Open-end Windings” IEEE PEDS 2005, pp:219-223,
2005.
[9] K.Chandra Sekhar, G.Tulasi Ram Das, “A Nine-
Level Inverter System for an Open-End Winding
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Induction Motor Drive” in preceedings of IEEE [20]G.Sambasiva Rao, K.Chandra Sekhar “A novel nine-
ICIEA 2006. level inverter system for Dual- fed induction motor
[10]Shivakumar, E.G., Gopakumar, K., Sinha, S.K., drive” International Journal of Engineering Research
Andre, Pittet, and Ranganathan, V.T., “Space & Industrial Applications, 4 (III), pp: 159-176,
vector PWM control of dual inverter fed open- August 2011.
end winding induction motor drive,” Proc. Applied [21] P.Satish Kumar, J.Amarnath, S.V.L. Narasimham,
Power Electronics Conf. (APEC), pp. 339–405, “A Qualitative Space Vector PWM Algorithm for a
2001. Five-level Neutral Point Clamped Inverter” ICGST
[11]Suh, J., Choi, C., and Hyun, D., “A new simplified International Journal on Automatic Control and
space vector PWM method for three-level Systems Engineering, ACSE, 9 (I), pp:43-50, 2009.
inverter,” Proc. IEEE Applied Power Electronics [22]V. Naga Bhaskar Reddy and V. Narasimhulu and Dr.
Conf. (APEC), pp. 515–520, 1999. Ch. Sai Babu, “control of cascaded multilevel
[12]Baiju, M.R., Mohapatra, K.K., Somasekhar, V.T., inverter by using carrier based pwm technique and
Gopakumar, K., and Umanand, L. “A five-level implemented to induction motor drive” ICGST
inverter voltage space phasor generation for an International Journal on Automatic Control and
open-end winding induction motor drive,” IEE Systems Engineering, ACSE, 10 (II), pp:11-18,
Proc. Electr. Power Appl., 150 (5), pp. 531–538, December 2010.
2003.
[13]Wang, FEI, “Sine-triangle versus space vector Biographies
modulation for threelevel PWM voltage source G.Sambasiva Rao received B.E.
inverters,” Proc. IEEE-IAS Annual Meeting, Rome, degree in Electrical & Electronics
pp. 2482–2488, 2000. Engineering from Andhra
[14]Baiju, M.R., Gopakumar, K., Somasekhar, V.T., University Engineering College,
Mohapatra, K.K., and Umanand, L., “A space vector Visakha Patnam, India in 2000
based PWMmethod using only the instantaneous and M.E. with Power Electronics
amplitudes of reference phase voltages for three- & Industrial Drives from
level inverters,” EPE J., 13 (2), pp. 35–45, 2003. Sathyabama Institute of Science
[15]McGrath, B.P., Holmes, D.G., and Lipo, T.A., and Technology, Chennai, India in 2006. Since 2006, he
“Optimized space vector switching sequences for has been with R.V.R & J.C.College of engineering as
multilevel inverters,” Proc. IEEE Applied Power Lecturer. Presently he is a part-time research student at
Electronics Conf. (APEC), pp. 1123–1129, 2001. J.N.T.U College of Engineering, Hyderabad- 500072,
[16]Krah, J., and Holtz, J., “High performance current India, working towards his doctoral degree.
regulation and efficient PWM Implementation for
low inductance servo motors,” IEEE Trans. Ind. Dr.K.Chandra Sekhar received
Appl., 36 (5), pp. 1039–1049, 1999. his B.Tech degree in Electrical &
[17]Somasekhar, V.T., and Gopakumar, K., “Three-level
Electronics Engineering from
inverter configuration cascading two 2-level V.R.Siddartha Engineering
inverters,” IEE Proc. Electr. Power Appl., 150 (3), College, Vijayawada, India in
pp. 245–254, 2003. 1991 and M.Tech with Electrical
[18]R.S.Kanchan, M.R.Baiju, K.K.Mohapatra, Machines & Industrial Drives
P.P.Ouseph and K.Gopakumar, “Space vector PWM from Regional Engineering
signal generation for multilevel inverters using only College, Warangal, India in 1994. He Received the PhD
the sampled amplitudes of reference phase voltages,” degree from the J.N.T.U College of Engineering,
IEE Proc.-Electr. Power Appl., 152 (2), pp.297-309, Hyderabad- 500072, India in 2008. He is having 16 years
March 2005. of teaching experience. Currently he is professor and
[19]M.R.Baiju,K.Gopakumar,K.K.Mohapatra, V.T Head in the Department of EEE, R.V.R & J.C. College
Somasekhar and L.Umanand, “Five-Level inverter of Engineering, Guntur, India. His Research interests are
voltage-space vector phasor generation for an Open- Power Electronics, Industrial Drives & FACTS Devices.
End Winding Induction Motor Drive”. In: IEE
proc.-power Appl., 150 (5), pp.531-538, Sep2003.
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Simple and Novel Generalized Scalar PWM Algorithm for Multilevel Inverter
Fed Direct Torque Controlled Induction Motor
39
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
This paper presents a simple generalized scalar PWM
algorithm for 2-, 3-, 5- and 7-level inverter. The proposed T2
3
Vd * Ts Ts 3 * Vd
Vdc Vdc
algorithm has been developed by using the concept of
imaginary switching times, which are proportional to the Ts 1 3 1 3
instantaneous sampled phase voltages only. Moreover, Vq Vd
Vq Vd
(5)
the proposed algorithm does not require the calculation of 2
Vdc 2 2 2
angle and sector information and hence reduces the Ts Ts
complexity involved in the PWM algorithm. Vbn Vcn Tbn Tcn
Vdc Vdc
40
ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
The effective time Teff can be defined as the time capacitors. Although each active switching device is only
difference between Tmax and Tmin and can be given as Vdc
required to block a voltage level of , the clamping
in (10). (n 1)
Teff Tmax Tmin (10) diodes must have different voltage ratings for reverse
voltage blocking. Assuming that each blocking diode
voltage rating is the same as the active device voltage
The effective time means the duration in which the rating, the number of diodes required for each phase will
effective voltage is supplied to the machine terminals. In be (n 1) (n 2) . This number represents a quadratic
the actual switching instants, there is one degree of
freedom that the effective time can be located anywhere increase in n. when n is sufficiently high, the number of
within one sampling interval. To generate actual diodes required will make the system impractical to
switching pattern which preserves the effective time, the implement. If the inverter runs under PWM, the diode
zero sequence time is subjoined to the phase voltage time. reverse recovery of these clamping diodes becomes the
In order to locate the effective time in centre of the major design challenge in high-voltage high-power
sampling interval, the zero sequence voltage has to be applications.
symmetrically distributed at the beginning and end of one
sampling period. Therefore, the actual switching times 4. Proposed Generalized PWM Algorithm
for each inverter leg can be simply obtained by the time for an n-Level Inverter
shifting operation as below. For a 2-level inverter only one offset time is sufficient to
Tga Tas Toffset evaluate the switching instants. Because, in a two-level
SVPWM algorithm, in a sampling time interval, the
Tgb Tbs Toffset (11)
imaginary switching time which has lowest magnitude
Tgc Tcs Toffset ( Tmin ) crosses the triangular carrier first, and causes the
first transition in the inverter switching state. While the
To distribute zero voltage symmetrically during one imaginary switching time, which has the maximum
sampling period, the offset time Toffset is achieved using magnitude ( Tmax ), crosses the carrier last and causes the
a simple sorting algorithm. the zero voltage vector time last switching transition in the inverter switching states.
duration can be calculated as given in (12). Thus the switching periods of the active vectors can be
Tzero Ts Teff (12) determined from the Tmax and Tmin in a two-level
inverter scheme.
And, Tmin Toffset Tzero / 2 (13)
But, the SVPWM algorithm for multilevel inverters,
Therefore, Toffset Tzero / 2 Tmin (14) involves comparing the modulating signals with a
number of symmetrical level-shifted triangular carrier
In order to generate symmetrical switching pulse pattern waves for PWM generation. It has been shown that for an
within two sampling intervals, when the switching n-level inverter, n-1 level-shifted triangular carrier waves
sequence is ‘ON’ sequence, the actual switching time are required for comparison with the modulating
will be replaced by the subtraction value with the waveforms. Because of the level-shifted multicarriers, the
sampling time as follows: first crossing (termed the first-cross) of the modulating
wave cannot always be the min-phase. Similarly, the last
crossing (termed the third-cross) of the modulating wave
Tga , gb, gc Ts Tga, gb, gc (15)
cannot always be the max-phase. Thus, a single offset
time is not sufficient to centre the middle inverter
As described above, the effective time implies the switching vectors, in a multilevel PWM scheme during a
applied time of a certain active vector. Therefore, with sampling period Ts.
the effective vector concept, the actual switching time The proposed algorithm determines the offset time for the
can be obtained directly from the stationary frame PWM generation in the linear modulation region by using
reference voltage without sector identification, effective the concept of imaginary switching times. The proposed
time calculation and recombination. generalized PWM algorithm presents a simple way to
To implement the novel space vector PWM, only a 3- determine the time instants at which the three reference
element simple sorting algorithm is needed. Therefore, phases cross the triangular carriers. These time instants
the calculation efforts of the proposed PWM method is are sorted to find the offset voltage to be added to the
greatly reduced as compared with the conventional space reference phase voltages for SVPWM generation for
vector PWM method. multilevel inverters for the entire linear modulation range,
so that the middle inverter switching vectors are centered
3. Topology of n-level Diode-Clamped (during a sampling interval), as in the case of the
Multilevel Inverter conventional two-level SVPWM scheme.
An inverter which is capable of three-level or more is For an n-level inverter, the instantaneous imaginary
termed as Multilevel Inverter. The topology of n-level switching times are calculated as follows:
diode clamped multilevel inverter is as shown in Figure. Ts
Tas Van (16)
2. In this circuit, the dc-bus voltage will be split into Vdc /(n 1)
suitable number of levels according to the number of
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ICGST-ACSE Journal, ISSN 1687-4811, Volume 12, Issue 2, Delaware, USA, October 2012
Cn
Cn-1
C4
C3
C2 C3
V0
C2
C1
C2
C1
C1
2 level line
C1
C2
3 level line
4 level line
5 level line C1
n level line
Then time equivalents of the modified phase voltage Tc cross when n is odd, can be determined for a n-level
magnitudes can be defined as inverter as:
*
Tas Tas Toffset1 (20) *
Ta _ cross Tas (( I a (n 1) / 2) * Ts (23)
*
Tbs Tbs Toffset1 (21) *
Tb _ cross I bs (( I b (n 1) / 2) * Ts (24)
Tcs* Tcs Toffset1 (22) *
Tc _ cross Tcs (( I c (n 1) / 2) * Ts (25)
The triangular carriers and the modulating waves, for an When n is even, the time durations, Ta cross , Tb cross
n-level PWM scheme are shown in Figure. 3a, for n is
odd, and in Figure. 3b, for n is even. The (n-1) triangular and Tc cross , can be determined for a n-level inverter as:
carriers are compared with reference phase voltages as Ta _ cross Ts / 2 Tas
*
(( I a (n / 2)) * Ts ) (26)
shown in Figures. 3a and 3b. A carrier index, I, is defined
to designate the carrier regions in which the reference Tb _ cross Ts / 2 Tbs
*
(( I b (n / 2)) * Ts ) (27)
phase voltages lie during the sampling interval under
consideration. During a sampling interval, the carrier Tc _ cross Ts / 2 Tcs* (( I c (n / 2)) * Ts ) (28)
indices, Ia, Ib and Ic (which can be from 1 to n-1), for a, b in the proposed generalized PWM algorithm, the
and c phases, respectively, are determined depending on Ta cross , Tb cross and Tc cross are used to centre the
the carrier region in which the respective phase voltage
middle switching vectors as in the case of two-level
lies. Then the time durations, Ta cross , Tb cross and inverters in each sampling time interval. The time-
duration, at which the reference phases cross the
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triangular carriers for the first time, second time and third By adding the time, Toffset 2 to T first _ cross ,
time are defined as T first _ cross , Tsec ond _ cross and
Tsec ond _ cross and Tthird _ cross gives the inverter leg
Tthird _ cross respectively, in a sampling time interval Ts.
switching times Tga , Tgb and Tgc for phases a, b and c,
these can be calculated from (29).
T first _ cross min T x _ cross
respectively as (34)-(36).
Tga Ta _ cross Toffset 2 (34)
Tsec ond _ cross mid T x _ cross (29)
Tgb Tb _ cross Toffset 2 (35)
Tthird _ cross max T x _ cross ; x a, b, c
Tgc Tc _ cross Toffset 2 (36)
A B C Vdc
1 2
5. Results and Discussion
2 To validate the proposed generalized scalar PWM
algorithm, several numerical simulation studies have
been carried out and results are presented. The details of
the induction motor, which is used for simulation studies
are as follows:
0
A 3-phase, 4 pole, 4kW, 1200rpm induction motor with
parameters of Rs = 1.57Ω, Rr = 1.21Ω, Ls = Lr = 0.17H,
Lm = 0.165H and J = 0.089Kg.m2.
The steady state simulation results for 2-, 3-, 5-, and 7-
(n-2) level inverter fed DTC-IM drive are shown from Figure.
4 to Figure. 19. From the simulation results it can be
(n-1) Vdc
2
observed that as the number of levels increases the
(a) harmonic distortion will be decreased. Also, it can be
A B C concluded that the proposed PWM algorithm is efficient
Vdc with reduced complexity. The total harmonic distortion
1 2 (THD) values of line currents and voltages are given in
Table-1.
2 TABLE I
COMPARISON OF THD IN LINE CURRENT FOR VARIOUS LEVELS
Level % THD in line
current % THD in line voltage
0
2 level 9.84 75.96
3 level 4.06 38.10
5 level 2.23 17.25
7 level 1.37 12.17
(n-2)
(n-1) Vdc
2
(b)
Figure. 3 Triangular carrier and reference signals (a) n-level PWM
scheme where n is even (b) n-level PWM scheme where n is even
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6. Conclusion
A simple and novel generalized SVPWM algorithm is
presented for an n-level inverter fed direct torque
controlled induction motor drive. The proposed algorithm
has been developed by using the concept of imaginary
switching times, which are proportional to the sampled
reference phase voltages only. Hence, the complexity
involved id less when compared with the classical PWM
Figure. 15 Harmonic Spectrum of line voltage for 5-level SVPWM algorithms. To validate the proposed algorithm, the
based DTC along with THD simulation studies have been carried out and results are
presented. From the simulation results, it can be
concluded that the proposed algorithm gives good
performance with reduced complexity. Moreover, as the
number of levels increases, the harmonic distortion of
line current and voltages also decreases.
7. References
[1] F. Blaschke “The principle of field orientation as
applied to the new transvector closed loop control
system for rotating-field machines," Siemens
Review, 1972, pp 217-220.
[2] Isao Takahashi and Toshihiko Noguchi, “A new
quick-response and high-efficiency control strategy
of an induction motor,” IEEE Trans. Ind. Applicat.,
vol. IA-22, no.5, Sep/Oct 1986, pp. 820-827.
[3] Domenico Casadei, Francesco Profumo, Giovanni
Serra, and Angelo Tani, “FOC and DTC: Two
Figure. 16 Simulation results of 7-level SVPWM based DTC: steady- Viable Schemes for Induction Motors Torque
state plots of speed, torque, currents and flux at 1200 rpm
Control” IEEE Trans. Power Electron., vol. 17, no.5,
Sep, 2002, pp. 779-787.
[4] Domenico Casadei, Francesco Profumo, Giovanni
Serra, and Angelo Tani, “FOC and DTC: Two
Viable Schemes for Induction Motors Torque
Control” IEEE Trans. Power Electron., vol. 17, no.5,
Sep, 2002, pp. 779-787.
[5] Joachim Holtz, “Pulsewidth modulation – A survey”
IEEE Trans. Ind. Electron.., vol. 39, no. 5, Dec 1992,
pp. 410-420.
Figure. 17 Simulation results of 7-level SVPWM based DTC: steady [6] Heinz Willi Vander Broeck, Hnas-Christoph
state plots of phase and line voltages
Skudelny and Georg Viktor Stanke, “Analysis and
realization of a pulsewidth modulator based on
voltage space vectors” IEEE Trans. Ind. Applicat.,
vol. 24, no. 1, Jan/Feb 1988, pp. 142-150.
[7] Ahmet M. Hava, Russel J. Kerkman and Thomas A.
Lipo, “Simple analytical and graphical methods for
carrier-based PWM-VSI drives” IEEE Trans. Power
Electron., vol. 14, no. 1, Jan 1999, pp. 49-61.
Figure. 18 Harmonic Spectrum of line current for 7-level SVPWM
based DTC along with THD [8] T. Brahmananda Reddy, J. Amarnath and D.
Subbarayudu, “Direct torque control of induction
motor based on Hybrid PWM method for reduced
ripple: A sliding mode control approach” ACSE
Journal Vol.(6) Issue(4) Dec.2006,pp.23-30.
[9] Lixin Tang and M.F. Rahman, “A new direct torque
control strategy for flux and torque ripple reduction
for induction motors drive by using space vector
modulation” in Conf. Rec. of IEEE-PESC, 2001,
Figure. 19 Harmonic Spectrum of line voltage for 7-level SVPWM pp.1440-1445.
based DTC along with THD
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[10] Nabae, A., Takahashi, I., and Akagi, H, "A neutral- Biographies
point clamped PWM inverter’, IEEE-Trans. Ind.
Chalasani Hari Krishna was born in 1982.
Appl., 1981, 17, (5), pp.518-523. He graduated from Jawaharlal Nehre
[11] Jose Rodriguez, Jih-Sheng Lai, Fang Zheng Peng: Technological University, Hyderabad in the
year 2003. He received M.E degree from
‘Multilevel Inverters: A Survey of Topologies, Satyabama University, Chennai in the year
Control, and Applications’, IEEE Trans. On Ind. 2005. He presently Associate Professor in
Elec., Vol. 49, No. 4, Aug. 2002. the Department of Electrical and Electronics
Engineering at Mother Teresa Institute of
[12] Abdul Rahiman Beig, G. Narayana, V.T. Science and Technology, India. His research
Ranganathan, “Modified SVPWM Algorithm for area includes DTC and Drives.
Three Level VSI With Synchronized and
Symmetrical Waveforms”, IEEE Trans. Ind. Elect.,
Dr. T. Brahmananda Reddy was bornin
Vol. 54, No. 1, Feb. 2007, pp 486-494. 1979. He graduated from Sri Krishna
[13] Joohn-Sheok Kim and Seung-Ki Sul, “A novel Devaraya University, Anantapur in the year
voltage modulation technique of the space vector 2001. He received M.E degree from
Osmania University, Hyderabad, India in the
PWM” in Proc. IPEC, Yokohama, Japan, 1995, pp. year 2003 and Ph.D from J.N.T.University,
742-747. Hyderabad in the year 2009. He is
presently Associate Professor in the
[14] Dae-Woong Chung, Joohn-Sheok Kim and Seung-Ki Electrical and Electronics Engineering
Sul, “Unified voltage modulation technique for real- Department, G. Pulla Reddy Engineering
College, Kurnool, India. He presented more
time three-phase power conversion” IEEE Trans. than 90 research papers in various national and international
Ind. Applicat., vol. 34, no. 2, Mar/Apr 1998, pp. conferences and journals. His research areas include PWM techniques,
DC to AC converters and control of electrical drives
374-380.
[15] R.S. Kanchan, M.R. Baiju, K.K. Mohapatra, P.P.
Ouseph and K. Gopakumar, "Space vector PWM Dr. J. Amarnath graduated from Osmania
University in the year 1982, M.E from
signal generation for multilevel inverters using only Andhra University in the year 1984 and
the sampled amplitudes of reference phase voltages" Ph.D from J.N.T.University, Hyderabad in
the year 2001.He is presently Professor and
IEE Proc.-Electr. Power Appl., vol. 152, No. 2, pp. Head of the Electrical and Electronics
297-309, March, 2005. Engineering Department, JNTU College of
Engineering, Hyderabad and also he is the
Chairman, Board of studies in Electrical
and Electronics Engineering, JNTU
College of Engineering, Hyderabad. He presented more than 100
research papers in various national and international conferences and
journals. His research areas include Gas Insulated Substations, High
Voltage Engineering, Power Systems and Electrical Drives.
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Elles représentent, respectivement, les énergies corre- Réduire le canal revient à trouver un filtre tel que sa
spondant à Cwall et Cwin où : séquence de sortie ait la même variance et le même
kurtosis maximum en valeur absolue qu’à l’entrée du
hTwall hwall = f T CTwall Cf = f T Af (10) filtre. Le filtre optimal sera celui qui maximisera la
quantité donnée par l’équation (19). Le délai de syn-
hTwin hwin = f T CTwin Cwin f = f T Bf (11)
chronisation sera la valeur de l’indice qui correspondra
La résolution de l’équation (8) mène au TEQ qui à ce filtre, tel que:
donne la solution du problème de vecteurs propres
généralisé [10], nous avons par conséquent : k = arg {max(gn )} (18)
n
Bf = λAf (12)
4.2 Calcul du pas de convergence par
où λ est la valeur propre généralisée correspondant kurtosis
au vecteur propre généralisé f, qui est la solution de
l’équation (12). Le kurtosis normalisé d’une variable aléatoire s ayant
comme valeur moyenne s̄ est défini par le rapport du
(√ )−1 (√ )−1
moment d’ordre quatre η4 au carré du moment d’ordre
C= BT A B (13)
deux η22 tous deux centrés. Les HOS (Higher Order
Statistics) définissent le kurtosis comme suit [LAC 97]:
L’inverse de la matrice A est retrouvé par factorisation
de Cholesky. Les TEQ sont alors donnés par : η4
κ4 (s) = (19)
(√ )−1 η22
f= BT q (14)
où, si est E l’opérateur espérance mathématique:
où q est le vecteur propre correspondant à la valeur { }
2
η2 = E (s − s̄) (20)
propre λ. Il est montré aussi [8] que l’algorithme
converge globalement si q = qmin est le vecteur pro- { }
4
pre minimal correspondant à la valeur propre mini- η4 = E (s − s̄) (21)
male λmin . C’est ainsi que le filtre TEQ optimal
L’excès (kurtosis standard) est défini par l’équation
fopt est retrouvé [3]. L’expression du SNR réduit opti-
(19) moins trois. Il s’annule lorsqu’il s’agit d’une dis-
mal (Shortening SNR ou SSNR) est donnée par :
tribution normale [3, 5]. D’ou tout l’intérêt à intro-
( ) ( )
T
fopt Bfopt 1 duire ce coefficient. En effet, sachant que le bruit ad-
SSN Ropt = 10 log T = 10 log ditif est dans la plupart des cas de type Gaussien, il
fopt Afopt λmin
est bien connu que les statistiques d’ordre supérieur ne
SSN Ropt = −10 log (λmin ) (15) sont pas affectées par le bruit. Nous proposons dans
ce papier une méthode itérative pour le calcul de µ. En
En somme, l’algorithme optimal utilise la matrice C, effet, le pas de convergence divisé par le kurtosis nor-
dont les éléments sont calculés à partir de Hwall et malisé donné par l’équation (19) de la séquence reçue à
Hwin . Le SSNR optimal est retrouvé par calcul direct l’entrée de l’égaliseur permet de tenir compte à chaque
des valeurs propres minimales de la matrice C. Les itération de la séquence à l’entrée de l’égaliseur r(i).
coefficients du TEQ optimal sont finalement calculés Ainsi, le pas de convergence du nouvel algorithme est
par transformation linéaire du vecteur propre unitaire calculé à partir d’un µ0 divisé à chaque itération par
associé à la valeur propre minimale. le kurtosis de sorte à avoir:
µ0
µi+1 = (22)
4 Modification de l’algorithme κ4 (r(i))
Par ce procédé, la mise à jour du pas de convergence
4.1 Le filtre optimal dépend des données reçues (c’est à dire des conditions
Cette procédure débute à partir de tous les filtres ré- de transmission du canal). Deplus, nous utilisons
duits fn ayant été trouvés à partir de l’équation (14), la fonction de densité de probabilité Gamma connue
utilisant l’algorithme du MSSNR [8]. Nous proposons dans la littérature pour la détermination du pas de
de choisir le filtre SCE (Shortened Channel Equalizer) convergence. Les résultats obtenus vont maintenant
optimal, non pas en comparant les énergies de tous les être discutés dans la partie consacrée aux simulations.
filtres trouvés tels que abordés par Martin et al. dans
[7], mais plutôt en calculant le kurtosis de chaque fil-
tre. Nous avons ainsi : 5 Simulations
yn = h ∗ fn (16) Les données que nous utilisons lors de la simulation
sont les huit CSA loop (Carrier Serving Area) [7], util-
gn = κ4 (yn) (17) isées dans le standard ADSL. Nous utilisons le CSA1
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1 x 10
6
0.5
2
Adaptée
1 MERRY Optimal
MAX SSNR
0 0
0 100 200 300 400 500 600 700 800 900 1000
−0.5
4
débit binaire (bps)
ADAPTEE et KURTOSIS
1 MERRY OPTIMAL
1 MAX SSNR
0
0 100 200 300 400 500 600 700 800 900 1000
indice symbole
Amplitudes normalisées
0.5
−0.5
Il est à remarquer que les délais optimaux sont
différents de ceux retrouvés dans la littérature [6].
−1
0 50 100 150 200
Nombre de coefficients
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