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Analog and Digital Systems Design Laboratory Semester 3

Course Code BECL305 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2 SEE Marks 50
Credits 01 Total 100
Exam Hours 3
Examination type (SEE) Practical
Course objectives:
This laboratory course enables students to
 Understand the electronic circuit schematic and its working
 Realize and test amplifier and oscillator circuits for the given specifications
 Realize the opamp circuits for the applications such as DAC, implement mathematical functions and precision rectifiers.
 Study the static characteristics of SCR and test the RC triggering circuit.
 Design and test the combinational and sequential logic circuits for their functionalities.
 Use the suitable ICs based on the specifications and functions.
Sl.NO Experiments (All the experiments has to be conducted using discrete components)
1 Design and set up the BJT common emitter voltage amplifier with and without feedback and determine the gain-
bandwidth product, input and output impedances.
2
Design and set-up BJT/FET i) Colpitts Oscillator, ii) Crystal Oscillator

3
Design and set up the circuits using opamp: i) Adder, ii) Integrator, iii) Differentiator and iv) Comparator

4 Design 4-bit R – 2R Op-Amp Digital to Analog Converter (i) for a 4-bit binary input using toggle switches (ii) by
generating digital inputs using mod-16
5 Design and implement (a) Half Adder & Full Adder using basic gates and NAND gates, (b) Half subtractor&
Full subtractor using NAND gates, (c) 4-variable function using IC74151(8:1MUX).
6 Realize (i) Binary to Gray code conversion & vice-versa (IC74139), (ii) BCD to Excess-3 code conversion and
vice versa
7 a) Realize using NAND Gates: i) Master-Slave JK Flip-Flop, ii) D Flip-Flop and iii) T Flip-Flop b) Realize the
shift registers using IC7474/7495: (i) SISO (ii) SIPO (iii) PISO (iv) PIPO (v) Ring counter and (vi) Johnson
counter.
8 Realize a) Design Mod – N Synchronous Up Counter & Down Counter using 7476 JK Flip-flop b) Mod-N
Counter using IC7490 / 7476 c) Synchronous counter using IC74192
Demonstration Experiments ( For CIE )
9 Design and Test the second order Active Filters and plot the frequency response,
i) Low pass Filter
ii) High pass Filter

10 Design and test the following using 555 timer

i) MonostableMultivibraator
ii) AstableMultivibrator
11 Design and Test a Regulated Power supply

12 Design and test an audio amplifier by connecting a microphone input and observe the output using a loud
speaker.
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Course outcomes (Course Skill Set):

At the end of the course the student will be able to:
1. Design and analyze the BJT/FET amplifier and oscillator circuits.
2. Design and test Opamp circuits to realize the mathematical computations, DAC and precision rectifiers.
3. Design and test the combinational logic circuits for the given specifications.
4. Test the sequential logic circuits for the given functionality.
5. Demonstrate the basic circuit experiments using 555 timer.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%. The minimum
passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the SEE minimum passing mark is
35% of the maximum marks (18 out of 50 marks). A student shall be deemed to have satisfied the academic requirements
and earned the credits allotted to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in
the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation (CIE):

CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment is to be evaluated for conduction with an observation sheet and record write-up. Rubrics for the
evaluation of the journal/write-up for hardware/software experiments are designed by the faculty who is handling
the laboratory session and are made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be evaluated
for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments listed in the syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry a
weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE marks scored by
the student.

Semester End Evaluation (SEE):

 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by the
Head of the Institute.
 The examination schedule and names of examiners are informed to the university before the conduction of the
examination. These practical examinations are to be conducted between the schedule mentioned in the academic
calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be strictly
adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be decided jointly by
examiners.
 Students can pick one question (experiment) from the questions lot prepared by the examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in -60%, Viva-
voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored marks shall be scaled
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down to 50 marks (however, based on course type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are to be made zero.
The minimum duration of SEE is 02 hours

Suggested Learning Resources:

1. David A Bell, “Fundamentals of Electronic Devices and Circuits Lab Manual”, 5th Edition, 2009, Oxford
University Press.
2. Albert Malvino, David J Bates, Electronic Principles, 7th Edition, McGraw Hill Education, 2017.
3. Fundamentals of Logic Design, Charles H Roth Jr., Larry L Kinney, Cengage Learning, 7th Edition.
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Computer Organization and Architecture Semester 3

Course Code BEC306C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 3
Examination type (SEE) Theory
Course objectives: This course will enable students to:
• Explain the basic sub systems of a computer, their organization, structure and
operation.
• Illustrate the concept of programs as sequences of machine instructions.
• Demonstrate different ways of communicating with I/O devices
• Describe memory hierarchy and concept of virtual memory.
• Illustrate organization of simple pipelined processor and other computing systems.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
These are sample Strategies, which teacher can use to accelerate the attainment of the various
course outcomes.
 Lecture method (L) does not mean only traditional lecture method, but different type of
teaching methods may be adopted to develop the outcomes.
 Encourage collaborative (Group) Learning in the class.
 Ask at least three HOTS(Higher order Thinking)questions in the class, which
promotes critical thinking.
 Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyze information rather
than simply recall it.
 Topics will be introduced in a multiple representation.
 Show the different ways to solve the same problem and encourage the students to
come up with their own creative ways to solve them.
 Discuss how every concept can be applied to the real world-and when that's possible,
it helps improve the students' understanding.
 Adopt Flipped class technique by sharing the materials/Sample Videos prior to the class
and have discussions on the topic in the succeeding classes.

Module-1
Basic Structure of Computers: Computer Types, Functional Units, Basic Operational
Concepts, Bus Structures, Software, Performance -Processor Clock, Basic Performance
Equation(upto1.6.2ofChap1ofText).
Machine Instructions and Programs: Numbers, Arithmetic Operations and Characters, IEEE
standard for Floating point Numbers, Memory Location and Addresses, Memory Operations,
Instructions and Instruction Sequencing (up to 2.4.6 of Chap 2 and 6.7.1 of Chap 6 of Text).
Module-2
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Addressing Modes, Assembly Language, Basic Input and Output Operations, Stacks and
Queues, Subroutines, Additional Instructions (from2.4.7ofChap2, except 2.9.3, 2.11 & 2.12 of
Text).
Module-3
Input/ Output Organization: Accessing I/O Devices, Interrupts -Interrupt Hardware, Enabling
and Disabling Interrupts, Handling Multiple Devices,
Controlling Device Requests, Direct Memory Access
(upto4.2.4and4.4except4.4.1ofChap4ofText).

Module-4
Memory System: Basic Concepts, Semiconductor RAM Memories-Internal organization of
memory chips, Static memories, Asynchronous DRAMS, Read Only Memories, Cash
Memories, Virtual Memories, Secondary Storage- Magnetic Hard Disks
(5.1,5.2,5.2.1,5.2.2,5.2.3,5.3,5.5(except 5.5.1 to 5.5.4), 5.7 (except5.7.1), 5.9, 5.9.1 of Chap 5
of Text).
Module-5
Basic Processing Unit: Some Fundamental Concepts, Execution of a Complete Instruction,
Multiple Bus Organization, Hardwired Control, Microprogrammed Control (up to 7.5 except
7.5.1 to7.5.6 of Chap 7 of Text).

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :

1. Explain the basic organization of a computer system.
2. Describe the addressing modes, instruction formats and program control statement.
3. Explain different ways of accessing an input/ output device including interrupts.
4. Illustrate the organization of different types of semiconductor and other secondary
storage memories.
5. Illustrate simple processor organization based on hard wired control and micro-
programmed control.
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Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam
(SEE) is 50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks
out of 50) and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50
marks). The student is declared as a pass in the course if he/she secures a minimum of 40% (40
marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE
(Semester End Examination) taken together.

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments shall
be planned properly by the course teacher. The teacher should not conduct two assignments at
the end of the semester if two assignments are planned. Each assignment shall be conducted
for 25 marks. (If two assignments are conducted then the sum of the two assignments shall be
scaled down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests
and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with
a maximum of 3 sub-questions), should have a mix of topics under that module.
Suggested Learning Resources:
Book
1. Carl Hamacher, Zvonko Vranesic, Safwat Zaky: Computer Organization, 5thEdition,Tata
McGrawHill,2002.

ReferenceBooks:
2. David A. Patterson, John L. Hennessy: Computer Organization and Design-The Hardware/
Software InterfaceARM Edition, 4th Edition, Elsevier,2009.
3. William Stallings: Computer Organization &Architecture,7th Edition, PHI, 2006.
4. Vincent P. Heuring & Harry F. Jordan: Computer Systems Design and Architecture, 2nd
Edition, Pearson Education, 2004.
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Web links and Video Lectures (e-Resources):

 .

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

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