EDC Lab 9

Department of Electrical Engineering
Faculty Member: Qazi Waqas Mohiuddin Dated: 22nd April, 2024
Semester: 4th Section: BEE-14 A
EE215: ELECTRONIC DEVICES AND CIRCUITS
Lab 09: MOSFET operation and IV characteristics
PLO4/CLO4 PLO5/CLO PLO8/CLO6 PLO9/CLO7

5
Name Reg. No Viva /Quiz Analysis Modern Ethics and Individual

/ Lab of data Tool Safety and
Performan in Lab Usage Teamwork
5 marks
ce Report
5 marks 5 marks
5 marks 5 marks
Muhammad Haris 417629
Aown Aamir 413513
Aneeq ur Rehman 418794
Lab 09: MOSFET operation and IV characteristics
EE215: Electronic Devices and Circuits Page 1

Objective:
 To gain working knowledge of an n-Channel Metal Oxide Semiconductor Field effect
Transistor (MOSFET) in Common-source configuration by studying I-V characteristics
EQUIPMENT REQUIRED:
The following components and test equipment is required.
 MOSFET 2N7000
 Multimeter
 Resistors
 DC Power Supply
The Experiment:
The experiment is broken down into two exercises. The first exercise involves the simulation of
the circuit on PSpice using OrCAD-Capture module. The second one involves the practical setup
of the circuit and making required measurements, tabulation, and its analysis.
Theory:
MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a type of transistor that is
commonly used in electronic circuits as a switch or an amplifier. It is made up of three layers: a
source, a gate, and a drain. The gate is separated from the other two layers by a thin layer of
insulating material called the gate oxide.
When a voltage is applied to the gate, an electric
field is created between the gate and the source,
which controls the flow of current between the
source and the drain. MOSFET operates in three
different regions: the cutoff region, the saturation
region, and the linear or triode region.
In the cutoff region, the MOSFET is effectively
turned off, and there is no current flowing
between the source and the drain. In the
saturation region, the MOSFET is fully turned on,
and there is a maximum current flowing between
the source and the drain. In the linear or triode
region, the MOSFET is partially turned on, and
the current flowing between the source and the drain is proportional to the voltage applied to the
gate.
EXERSCISE

A suggested circuit for determining the behavior of a MOSFET is shown in fig no. 1.
Fig no. 1
Simulation:
 Create the circuit shown in Figure 1 in PSpice.
 Use an Mbreak N3 part for the FET.
 Right click on FET and select “Edit PSpice model”.
 Set the parameter as follows:
.model Mbreakn NMOS KP=35m W=200u L=100u VTO=2.1
 Create a new simulation profile and set the analysis type as DC Sweep.
 Set the “primary sweep” to sweep V2 in fig 1, linearly from 0 to 10 V with a 0.01V
increment.
 Select a secondary sweep and sweep V1 from 1.5 to 3.5V with a 0.1V increment.
 Run the simulation.
 Obtain the transfer curve of the circuit simulated in fig 1 i.e. Plot Id versus Vds
IMPLEMENTATION

1) Construct the circuit above. Use the multi-meter to measure the drain current, Id and to
measure VDS and VGS. Use the DC power supply for VGG and for VDD.
2) Set VGG to 0V and VDD to 5V and measure VDS and ID.
3) Slowly increase VGG until the transistor just begins to conduct current as evidence by
small drop in VDS. Record the value of VGS as gate threshold voltage, Vth
Vth= 1.86
4) Adjust VGG to increase VGS by 0.2V above the threshold. Readjust VDD to return VDS
to 5V and then measure the drain current Id. Record the value of VGS in the first column
of table 1 and record value of Id in second column (the VDS=5V column)

5) Continue to increase VGS in steps of 0.2V while maintaining VDS at 5V. Measure the
drain current at each step. Record the values of VGS and Id in table 1.
6) Complete the entries in table 1 by adjusting VDD and VGG to obtain various required
VDS and VGS values, then measuring ID at each value.
7) Plot the data for each value of VGS to obtain ID vs VDS curve.
OUTPUT / DRAIN CHARACTERISTICS
VGS = 0V VGS = 1 VGS = 1.5 VGS = 2 VGS = 2.5
VDS (V) ID (mA) VDS (V) ID (mA) VDS (V) ID (mA) VDS (V) ID (mA) VDS (V) ID (mA)
0 0 0 0 0 0 0 0 0 0
1 0 1 0 1 0.142 1 3.3 1 5.9
2 0 2 0 2 0.150 2 3.96 2 6.8
3 0 3 0 3 0.156 3 4.1 3 18
4 0 4 0 4 0.163 4 4.3 4 34.1
5 0 5 0 5 0.172 5 4.4 5 46.5
6 0 6 0 6 0.180 6 4.56 6 55
7 0 7 0 7 0.190 7 4.76 7 64.8
8 0 8 0 8 0.215 8 4.9 8 72.2

Simulation:

Conclusion:
In this lab we studied about the MOSFETS in detail, we discuss about their IV characteristics.
Overall, we learnt a lot from this lab and looking forward to learn more and apply it into our
pratical knowledge.

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Department of Electrical Engineering

Faculty Member: Qazi Waqas Mohiuddin Dated: 22nd April, 2024

Semester: 4th Section: BEE-14 A

EE215: ELECTRONIC DEVICES AND CIRCUITS

Lab 09: MOSFET operation and IV characteristics

PLO4/CLO4 PLO5/CLO PLO8/CLO6 PLO9/CLO7

Name Reg. No Viva /Quiz Analysis Modern Ethics and Individual

Muhammad Haris 417629

Aown Aamir 413513

Aneeq ur Rehman 418794

Lab 09: MOSFET operation and IV characteristics

EE215: Electronic Devices and Circuits Page 1

EE215: Electronic Devices and Circuits Page 2

 Create the circuit shown in Figure 1 in PSpice.

 Use an Mbreak N3 part for the FET.

 Right click on FET and select “Edit PSpice model”.

 Set the parameter as follows:

.model Mbreakn NMOS KP=35m W=200u L=100u VTO=2.1

 Run the simulation.

EE215: Electronic Devices and Circuits Page 3

2) Set VGG to 0V and VDD to 5V and measure VDS and ID.

EE215: Electronic Devices and Circuits Page 4

OUTPUT / DRAIN CHARACTERISTICS

VGS = 0V VGS = 1 VGS = 1.5 VGS = 2 VGS = 2.5

1 0 1 0 1 0.142 1 3.3 1 5.9

2 0 2 0 2 0.150 2 3.96 2 6.8

4 0 4 0 4 0.163 4 4.3 4 34.1

5 0 5 0 5 0.172 5 4.4 5 46.5

7 0 7 0 7 0.190 7 4.76 7 64.8

8 0 8 0 8 0.215 8 4.9 8 72.2

EE215: Electronic Devices and Circuits Page 5

EE215: Electronic Devices and Circuits Page 6

EE215: Electronic Devices and Circuits Page 7

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