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HOW TO DRIVE MOSFETs AND IGBTs INTO

THE 21ST CENTURY


By
Mr. Abhijit D. Pathak and Mr. Ralph E. Locher,
IXYS Corporation
Santa Clara, CA 95054
ABSTRACT region on its Drain side to provide for conductivity
modulation of the Drain drift region so that on-state
As the industry pushes for higher power levels losses are reduced, especially when compared to an
and higher switching frequencies, power equally rated high voltage MOSFET. Advances and
supplies, which use MOSFETs/IGBTs for power breakthroughs continue to improve performances of
conversion, are being designed to their ultimate both devices. Lower parasitic capacitances, lower
attainable efficiency, smallest footprint, size and RDS(on), RGint, Qg, Rthjc and faster switching times
weight. The subject of driving MOSFETs/IGBTs are being achieved in newer MOSFETs. Third
to their highest possible frequencies at the generation IGBTs have lower forward voltage drop,
highest possible power levels, still providing lower gate Charge, lower trr of inverse parallel diode,
protection, is multi-dimensional and requires shorter and lesser tail current, lower tf, smaller Eon
knowledge of MOSFETs and IGBTs as well as and Eoff, improved current sharing amongst parallel
circuit theory and how it applies to this discipline. devices and better Rthjc.
Many topologies in high voltage converter,
inverter and matrix converter applications 1.2 POWER LOSSES IN DRIVERS AND DRIVEN
require special techniques to drive MOSFETs MOSFET/IGBT
and IGBTs. The paper deals with this subject
and explains with examples how to face the For determining the power loss in a Driver while
challenges of tomorrow today. driving a power MOSFET, the best way is to refer to
the Gate Charge Qg vs. VGS curve for different
1. INTRODUCTION
values of VDS(off).
Modern Power Electronics makes liberal use of
MOSFETs and IGBTs in many applications and, PGATE=VCC*Qg*fsw Eq. 1.1
if the present trend is any indication, future will
see more and more applications making use of Wherein, Vcc is the Driver’s supply voltage, Qg is
MOSFETs and IGBTs. Although sufficient the total Gate Charge of the MOSFET being driven
literature is available on characteristics of and fsw is the switching frequency. It is prudent then
MOSFETs and IGBTs, practical aspects of to choose a MOSFET with lower value of Qg and it
driving them in specific circuit configurations at is here that of low Gate Charge MOSFETs are
different power levels and at different preferred because they as well as the drivers incur
frequencies require that design engineers pay lower losses.
attention to a number of aspects.
As far as switching losses in a MOSFET are
1.1 MOSFET AND IGBT TECHNOLOGY concerned, there are some short time-intervals,
during which finite VDS and finite ID coexist, albeit
Due to the absence of minority carrier transport,
momentarily. When this happens during turn-on, the
MOSFETs can be switched at much higher
actual integration:
frequencies. The limit on this is imposed by two
factors: transit time of electrons across the drift ∫ VDS(t) ID(t) dt Eq. 1.2
region and the time required to charge and Is defined as Turn-On switching energy loss.
discharge the input Gate and ‘Miller’ Likewise, during turn-off, when finite values of ID and
capacitances. VDS coexist, integration of:
IGBT derives its advantages from MOSFET and ∫ VDS(t) ID(t) dt Eq.1.3
BJT. It operates as a MOSFET with an injecting
Is called Turn-off switching energy loss in a perform with the same driver ICs at 1MHz, 2 MHz
MOSFET. Amongst the responsible parameters and 4 MHz in resonant switching mode.
determining these switching energy losses, Ciss,
Coss and Crss affect the turn-on and turn-off Both, in hard switching and in resonant switching
modes, trying to achieve values of tr and tf less that
delays as well as turn-on and turn-off times.
what are assumed tend to generate higher electrical
noise and oscillations in drain current, while
For an IGBT, it would be similarly shown that:
increasing them will tend to reduce overall efficiency.
∫ VCE(t)IC(t)dt Eq. 1.4 One can appreciate that energy lost in gate drive
This equation represents switching energy loss. system, say, @ fsw =100 kHz for a 500 W SMPS, is
Needless to emphasize that the time interval for only 0.04% - a negligible value.
these integrals would be the appropriate time
during which finite values of ID and VDS or VCE Table: 2 and Table: 3 show how a full range of driver
and IC coexist in a MOSFET or IGBT ICs with peak current ratings from 2 Amps to 30
Amps can be used for a full range of MOSFETs with
respectively. Thus average switching energy lost
VDS rating of 60 Volts to 1000 Volts and ID rating of
in the device can be computed as follows:
24 Amps to 340 Amps at different fsw=50 KHz, 100
KHz, 200 KHz, 400KHz and 800 KHz. Please note
MOSFET: Ps = 1/2*VDS *ID *fsw*(ton+toff) Eq.1.5
that * indicates that the driver IC (in TO-263 and/or
IGBT: Ps = 1/2*VCE *IC *fsw*(ton+toff) Eq.1.6 TO-220 package) will need a heat sink. The
availability of a 30 Amp driver IC opens doors to
Main emphasis in modern Power Electronics is great many possibilities.
on reducing total losses dissipated in devices
and subsystems for achieving higher operating It is very important to understand that when 30
efficiency and more compact designs, reducing Amps peak current is required to drive a
volume and weight of resultant systems. Thus, MOSFET/IGBT, it is never prudent to parallel two 14
operation at higher and higher switching Amp driver ICs, as this tends to allow momentary
frequencies is now a necessity, and as a result, shoot through current from P-Channel MOSFET
switching losses predominate in power-loss- (Totem pole output stage) of one driver into N-
budget in semiconductor switches. Reducing Channel MOSFET (Totem pole output stage) of
switching losses then becomes the single most another driver due to mismatch in propagation
crucial goal. Keeping this goal in mind, drive delays between two drivers. Thus the importance of
circuits should be so designed as to yield ultra having a 30 Amps driver IC can’t be
fast rise (tr) and fall times (tf). Assuming sum of overemphasized.
tr and tf be no more than 2% of the PWM period
in hard switching applications, a Table:1 is 1.3 ADVANCES IN MOSFETs AND IGBTs
prepared of 1000 Volts rated MOSFETs of three
types: standard, Low Gate Charge types and F- Extending the discussion further, we know that
Class, which are optimised for megahertz advances in Power MOSFET technology are giving
switching. Table: 1 shows, for a given fsw, peak dividends in the form of lower RDS(on) (that gives
current required to drive it, recommended lower conduction losses), lower RGint (that improves
external gate resistor, total power loss in
switching speed), lower Qg (that improves dynamic
driver+gate resistor and the driver IC used - All
performance and requires less power from driver),
for SMPS designs of 500W, 1KW and 2 KW
lower transient thermal impedance (enabling higher
ratings. While standard MOSFETs are optimally
power dissipation) and lower Cissand lower gate to
usable up to about 400 kHz, Low Gate Charge
MOSFETs give adequate performance up to 800 drain feedback capacitance Crss and lower rise and
kHz in hard switching SMPS applications. fall times (enabling operation at still higher switching
frequency).
Designing above 800 kHz in hard switching
mode, the levels of RFI/EMI noise and switching Advances in IGBT technology centre around
losses are excessive and hence soft switching improving NPT technology by ‘soft punch through’
(resonant mode, in which sum of tr and tf should techniques, called the Third Generation NPT
be no more than 10% of the total one cycle Technology. The dividends from such advances are
PWM period) is preferred. The third section of multi-fold: lower cost, 20% lower on-state and 20%
rows in Table:1, shows how F-Class MOSFETs lower switching losses, better parallel current
sharing, lower thermal impedance, increased current still higher. It allows one to choose different
ruggedness to overloads, lower input Turn-On and Turn-Off times by choosing different
capacitance and faster yet smother turn-on and values of Rgon and Rgoff. It allows for incorporating –
turn-off waveforms. It looks like a true win-win ve bias for reasons explained above. A pair of 18 V
situation! Another path chosen by some Zener diodes with their cathodes connected together
manufacturers is Trench IGBTs, which also have protects the Gate-Emitter Junction of IGBT from
improved VCE(sat) and switching losses. voltage spikes.
2. TYPES OF DRIVERS 2.3 TECHNIQUES TO GENERATE –Ve BIAS
DURING TURN-OFF
2.1 IC DRIVERS
The importance of –ve bias during turn-off for
Although there are many ways to drive practically all semiconductor switches cannot be
MOSFET/IGBTs using hard-wired electronic overemphasized, as one may recall from the days of
circuits, IC Drivers offer convenience and bipolar transistors. -Ve bias helps to quickly remove
features that attract designers. The foremost any charge on the CGS and CGD in the case of
advantage is compactness. IC Drivers
MOSFETs and IGBTs, thus considerably
intrinsically offer lower propagation delay. As all
accelerating the turn-off mechanism.
important parameters are specified in an IC
Driver, designers need not go through time
It is important to understand that turn-on speed of a
consuming process of defining, designing and
MOSFET or IGBT can be increased only up to a
testing circuits to drive MOSFET/IGBTs. Another
level matched by the reverse recovery of rectifiers or
advantage is repeatability and predictability of
diodes in a power supply, because in an inductive
performance, which can’t be easily achieved in
clamped load (most common), turn-on of a MOSFET
hardwired driver circuits.
or IGBT coincides with turn-off (or reverse recovery
completion) of the rectifier diode. Any turn-on faster
2.2 TECHNIQUES AVAILABLE TO BOOST
than this does not help. Too fast a turn-on could also
CURRENT OUTPUTS
cause oscillation in the Drain or Collector current.
However, it is always beneficial to have a Driver with
Totem pole stage with N-Channel and P-
intrinsic low turn-on time and then be able to tailor
Channel MOSFETs can be used to boost the
this with a series gate resistor. Turn-off
output from an IC Driver. The disadvantage is
phenomenon, on the other hand, does not have to
that the signal is inverted and also there exists
wait for any other component in the subsystem. It is
momentary shoot through when common gate
here that any enhancement technique can best be
voltage is in transition.
utilized. Although many IC drivers themselves
feature extremely low turn-on and turn-off times,
Totem pole arrangement using matched NPN-
arrangement to provide –ve bias during turn-off
PNP transistors; on the other hand, offer many
helps still faster turn-off and prevents false turn on
advantages, while boosting the output currents
even in electrically noisy environment.
from IC Drivers. Shoot through phenomenon is
absent in this case. The pair of transistors
Fig.(10) demonstrates one way of generating –ve
protects each other’s base-emitter junctions and
bias during turn-off. Fig. (14) shows how to generate
handle current surges quite well. One such
–ve bias in a transformer coupled Drive circuit
arrangement is shown in Fig. (10). Here Q1 is a
arrangement. Here Zener diode can be chosen of
NPN transistor, while Q2 is a matched PNP
appropriate voltage for giving that much –ve bias
transistor with appropriate collector current
(plus one diode drop) during turn-off. Another unique
rating and switching speed to satisfy Drive
feature of circuit in Fig. (14) is its ability to maintain
requirement for the High Power IGBT. Another
exact pulse wave shape across Gate and source. In
feature added is –ve bias for guaranteed fast
Fig. (12) a method of using isolated DC to DC
switch-off even in electrically noisy environment.
converter with outputs of +15 and –5 V is used to
This is done, by utilizing power supply with +15
power IXD_414, while by connecting isolated ground
and –5 Volts output, whose common ground is
of this DC to DC Converter to the emitter of the IGBT
connected to the IGBT emitter.
being driven, –5 V of –ve bias during turn-off is
ensured.
The arrangement shown in Fig. (10) does a few
more things in addition to boosting the output
2.4 NEED FOR UNDERVOLTAGE discharged through this resistor and, depending on
PROTECTION the value of the connected resistor, soft turn-off of
any duration can be achieved. Another way, as
In Transfer Characteristics (ID vs. VGS) of a shown in the Fig. (2), is to use a signal MOSFET Q1
MOSFET, one can see that for values of VGS to pull down the Gate, when short circuit is detected.
The resistor in series with this signal MOSFET
below VGS(th), the drain current is negligible, but
determines the time duration of this soft turn-off. Soft
in this vicinity, the device is in its linear (Ohmic) turn-off helps protect IGBT/MOSFET from any
region and concurrent application of large values voltage transients generated due to L*dIC/dt (or
of VDS could cause considerable amount of
L*dID/dt) that could otherwise bring about avalanche
localized heating of the junction. In short, when
breakdown. The PC board layout and Bill of
a MOSFET is being used as a switch, any
Materials for this circuit are shown in Fig. (3).
operation in its linear region could cause
overheating or device failure. Bringing the
For an IGBT, Desat detection (Desat = Desaturation
MOSFET quickly into its saturation from its off-
of forward voltage drop) is a method used for short
state is the Driver’s job. And, if Vcc is below the
circuit/overload protection. When short
minimum required value, linear operation can
circuit/overload occurs, the forward voltage drop of
ensue to the detriment of MOSFET. I hasten to
the IGBT (VCE) rises to disproportionately high
add, however, that most PWM ICs, controller
ICs and microcomputer ICs have this protection values. One must ignore the initial turn-on rise in
feature built-in and, if sharing the same Vcc bus, VCE, when output from Driver has still not risen to
the Driver IC gets the benefit of this function high enough value. Nevertheless, when VCE rises to
being implemented elsewhere in the subsystem. a level of, say, 7 Volts, in presence of sufficient Gate
Nevertheless, Driver ICs having this feature is Drive voltage, it means the collector current IC has
an added benefit. The need of UV protection
risen to a disproportionately high value, signalling
applies equally well to IGBTs.
overload. When a voltage level higher than 6.5 Volts
is detected, Gate signal can be softly turned off,
2.5OVERLOAD/SHORT CIRCUIT ROTECTION
resulting into soft turn-off of the IGBT. Fig. (12)
shows how Desat feature can be wired into a total
Any operation of MOSFET/IGBT outside the
Driver Circuit, using also other features, such as
Safe Operating Area (SOA) could cause
Opto-isolation and –ve turn-off bias.
overheating and eventual device failure and
should be prevented by an electronic active
3. HIGH SIDE DRIVING TECHNIQUES
monitoring and corrective arrangement.
3.1 EMPLOYING CHARGE-PUMP AND
Load or current sensing could be done by either
BOOTSTRAP METHODS
a Hall Effect Sensor or by a Shunt resistor in
series with source/emitter terminal. The voltage
For driving the upper MOSFET/IGBT in a phase leg
picked up, which is proportional to current, is low
employed in a bridge topology, a buck converter or a
pass filtered and then compared to a preset
2-transitor forward converter, low side drivers cannot
limit. The comparator output could initiate turn-
be used directly. This is because the source/emitter
off of MOSFET/IGBT. A circuit to detect
of upper MOSFET/IGBT is not sitting at ground
overload/short circuit is shown in Fig. (12),
potential.
where the output FAULT will go low when it
occurs.
Fig. (5) shows how a charge pump creates a higher
Vcc to be used for the driver IC for the Upper
All IXDD series of Drivers have an ENABLE pin,
MOSFET/IGBT. Here the pair of N-Channel and P-
which, when driven low, say, by the FAULT
Channel MOSFETs acts as switches, alternately
output from this comparator, puts the final N-
connecting incoming supply voltage to output
Channel and P-channel MOSFETs of the IXDD
through capacitors and Schottky diodes, isolating it
Driver in its TRISTATE mode. This not only
and almost doubling it. Switching frequency in
stops any output from the Driver, but also
several hundred Kilohertz is used and, therefore, low
provides an environment for implementing soft
ripple isolated output voltage is available as DC
turn-off. There are two ways of doing this. Just
Supply for the Driver of Upper MOSFET/IGBT. Fig.
by connecting a resistor of appropriate value
(7) illustrates how one IXD_404 can be used as
from Gate to source/emitter, the CGS gets
charge pump, delivering 350 mA, and one IXD_408
as a Driver giving +/- 8 Amps, in conjunction with identical propagation delays for all signals so that
IXBD4410 and IXBD4411, for driving a phase their arrival time at the gate of IGBT bears the same
leg of two IXFX50N50 MOSFETs. Fig. (8) shows phase relationships with one another as when they
how a charge pump delivering as much as 500 originated in the DSP.
mA can be constructed using one IXD_404; and
by utilizing one IXD_414, one can boost the 3.3 USE OF TRANSFORMERS TO OBTAIN
output from IXBD4410 and IXBD4411 to +/- GALVANIC ISOLATION IN DRIVING UPPER
14Amps for driving Size 9 high power MOSFETs MOSFET/IGBT
and IGBTs or even MOSFET/IGBT module.
Another method is the Bootstrap Technique as Using transformers to achieve galvanic isolation is a
shown in Fig. (6). The basic bootstrap building frequently used technique. Depending on the range
elements are the level shift circuit, bootstrap of frequencies being handled and power rating
diode DB, level shift transistor Q1, bootstrap (voltage and current ratings and ratios), transformers
capacitor CB and IXD_408 or IXD_414. The can be designed to be quite efficient. The gate drive
bootstrap capacitor, IXD_408/IXD_414 driver transformer carries very small average power but
and the gate resistor are the floating, source- delivers high peak currents at turn-on and turn-off of
referenced parts of the bootstrap arrangement. MOSFET/IGBT.
The disadvantages of this technique are longer
turn-on and turn-off delays and 100% duty cycle While designing or choosing a Gate Drive
is not possible. Additionally the driver has to transformer, the following points should be kept in
overcome the load impedance and negative mind:
voltage present at the source of the device 1. Average power being handled by the transformer
during turn-off. should be used as a design guideline. Margin of
safety should be taken into account, keeping in
3.2 ACHIEVING GALVANIC ISOLATION BY mind maximum volt-second product and allowing
USING OPTO-COUPLERS TO DRIVE UPPER for worst-case transients with maximum duty ratio
MOSFET/IGBT and maximum input voltage possible.
2. Employing bifilar winding techniques to eliminate
For driving high side MOSFET/IGBT in any any net DC current in any winding. This is to avoid
topology, opto-couplers can be used with core saturation.
following advantages: 3. If operation in any one quadrant of B-H loop is
1. They can be used to give a very high isolation chosen, care should be taken for resetting the
voltage; 2500 to 5000 Volts of isolation is core.
achievable by use of properly certified opto-
couplers. Advantages of employing transformers for Gate
2. Signals from DC to several MHz can be Drive are:
handled by opto-couplers. 1. There is no need for any isolated DC-to-DC
3. They can be easily interfaced to Converter for driving an upper MOSFET/IGBT .
Microcomputers, DSPs or other controller ICs 2. There is practically no propagation delay in a
or any PWM IC. transformer to carry signals from primary side to
the secondary side.
One disadvantage is that the opto-coupler adds 3. Several thousand volts of isolation can be built in
its own propagation delay. Another between windings by proper design and layouts.
disadvantage of using an opto-coupler is that
separate isolated power supply is required to The disadvantages of using transformers for Gate
feed the output side of the opto-coupler and the Drive are:
driver connected to it. However, isolated DC-to- 1. They can be used only for time varying signals.
DC Converters with few thousand Volts of 2. It is difficult to implement DESAT protection
isolation are readily available. These can be feature.
used to supply isolated and regulated +ve 15 V
and –ve 5V to the output side of the opto- Two examples of gate Drive circuits, using
coupler and the Driver IC for driving Upper transformers follow. In Fig. (11), a phase shift
MOSFET/IGBT as is shown in Fig. (12) and Fig. controller outputs its signals to the IXD_404 Dual
(13). As can be seen, identical chain of opto- Drivers, which in-turn, feed the transformers. The
coupler, Driver and DC-to-DC Converters are secondary windings of these transformers are
used for even lower IGBTs. This is to guarantee coupled to the Gates of upper and lower MOSFETs
in an “H” Bridge topology. Fig. (14) shows Higher current MOSFET/IGBTs require higher drive
another transformer coupled Gate Drive circuit currents, especially for operating them at high
employing DC restore technique to maintain switching frequencies. For these applications, one
same wave shape of original signal with added can use IXD_408 or IXD_414, either in stand-alone
feature of -ve bias offered using a Zener in mode or in conjunction with IXBD4410 and
series with a fast diode across secondary. IXBD4411. It is easy to realize now that one can
easily get all the facilities of feature-rich IXBD4410
4.0 DESIRABLE SPECIFICATIONS AND and IXBD4411 and when higher drive current
FEATURES OF ANY LOW AND HIGH SIDE capability is called for, use them in conjunction with
DRIVER PAIRS, SUCH AS IXBD4410 AND IXD_408 or IXD_409 or IXD_414. In case of a low-
IXBD4411 side MOSFET/IGBT, it is simple to use IXD_408 or
IXD_414 alone. One such example is given in Fig.
1. Under voltage and over voltage lockout (7).
protection for Vcc;
2. dV/dt immunity of greater than ± 50 V/ns; For driving upper MOSFET/IGBT of a phase leg, one
3. Galvanic isolation of 1200 Volts (or greater) of the approaches is to employ a charge pump. Two
between low side and high side; such application circuit schematics are shown in Fig.
4. On-chip negative gate-drive supply to ensure (7) and Fig. (8). In Fig. (7) output from
MOSFET/IGBT turn-off even in electrically IXBD4410/4411 is boosted up to ± 8 Amps using
noisy environments; IXD_408 and the charge pump output is boosted to
5. CMOS/HCMOS compatible inputs with 350 mA, using one driver of IXD_404 for driving
hysteresis; IXFK48N50 (rated at Id=48 Amps and Vd = 500
6. < 20 ns rise and fall times with 1000 pf load Volts). In Fig. (8), the output from IXBD4410/4411 is
and <100 ns rise and fall times with 10000 pf boosted up to ±14 Amps by IXD_414 to drive a Size
load; 9 MOSFET IXFN80N50 (rated at Id = 80 Amps and
7. <100 ns of propagation delay; Vd = 500 Volts). IXD_404 can still adequately
8. >2 Ampere peak output Drive Capability; provide 500 mA for the charge pump circuit.
9. Automatic shutdown of output in response to
over current and/or short-circuit; 4.2 GENERAL REMARKS ABOUT MOSFET/IGBT
10. Protection against cross conduction between IC DRIVERS
upper and lower MOSFET/IGBT;
11. Logic compatible fault indication from both The most important strength of MOSFET/IGBT IC
low and high-side drivers. Drivers should be their ability to provide high
currents needed to adequately drive today’s and
A suggested wiring diagram, making use of such tomorrow’s large size MOSFETs and IGBTs.
a high/low side driver pair is shown in Fig. (4). Another important feature is that there should be no
This diagram is for a phase leg of MOSFETs or cross conduction in the output stage of the driver IC,
IGBTs. Likewise, the wiring diagram is to be thus saving transition power dissipation.
repeated for each phase leg and hence one
needs two such circuits for “H” Bridge and three In addition, all these Drivers incorporate a unique
such circuits for 3-Phase Bridge topologies facility to disable output by using the ENABLE pin.
With the exception of the IXD_408, the ENABLE pin
As can be seen in this schematic, to obtain is tied high internally. When this pin is driven LOW in
galvanic isolation, it uses one ferrite core response to detecting an abnormal load current, the
transformer for sending drive signals to Driver output enters its Tristate (High Impedance
IXBD4411 and another ferrite core transformer State) mode and a soft turn-off of MOSFET/IGBT
for receiving fault and status signals from can be achieved. This helps prevent damage that
IXBD4411. T1 represents both these could occur to the MOSFET/IGBT due to Ldi/dt over
transformers housed in one IC type package. To voltage transient, if it were to be switched off
avoid saturation, capacitors are placed in series abruptly, “L” representing total inductance in series
with each primary winding to which PWM pulse with Drain or Collector. A suggested circuit to
train is transmitted. 1200 Volts of isolation accomplish this soft turn off upon detecting overload
barrier is built in. Note the use of high voltage or short circuit is shown in Fig. (2). It is also possible
fast diode with required voltage rating to feed to do this by an independent short circuit/overload
Vcc to upper driver. detect circuit, which could be a part of the PWM or
other controller IC. All one needs to do is to take
output signal (FAULT) from such a circuit and helps achieve fast turn-on and turn-off times without
feed it into the ENABLE pin of Driver. A resistor creating oscillation in the Drain/Collector current.
RP connected across Gate and Source or Gate
and Emitter (as the case may be) would ensure Fig. (9) shows another arrangement and includes a
soft turn-off of the MOSFET/IGBT, turn-off time method for faster turn-off using a PNP transistor
being equal to RP(CGS +CGD) placed very close to the MOSFET Gate and Source.
It is a good practice to tie the ENABLE pin of drivers
to Vcc through a 10K resistor. This ensures that the
4.2.1 LOW CURRENT DUAL IC DRIVERS
driver always remains in its ENABLED mode except
when driven low due to a FAULT signal. Again, this
Fig. (11) shows an interesting application for a 4
FAULT signal puts these two drivers into their
Amp Dual driver IC in a Phase Shift PWM
TRISTATE output mode.
Controller application, in which galvanic isolation
is obtained by using Gate Drive Transformers.
Fig. (10) shows a method to boost output from driver
Note that this Controller operates at a fixed
IC to a much higher level for driving very high power
frequency. Turn-off enhancement is achieved by
IGBT module. Here the turn-on and turn-off times
using local PNP transistors in secondary of gate
can be varied by choosing different values of
drive transformer.
resistors: Rgon and Rgoff. To provide –ve bias of 5
For a vast number of low and medium current Volts, the IGBT emitter is grounded to the common
MOSFETs and IGBTs, 2 Amp to 4 Amp dual IC of +15V and –5V power supply, which feeds +15V
drivers provide a convenient tool and circuit and –5 v to the IXD_408. Notice that the incoming
simplicity, coupled with performance. signals must also be level shifted.

4.2.2 HIGH CURRENT IC DRIVERS Fig. (12) shows a high current driver IC driving one
IGBT of a Converter Brake Inverter (CBI) module.
These are eminently suitable for driving higher Here all protection features are incorporated. For
current MOSFETs and IGBTs and larger size High Temperature cut-off, a bridge circuit is used
MOSFET/IGBT Modules. Many circuit with the CBI module’s thermistor. Comparator U3
schematics applying these in various topologies compares voltage drop across the thermistor to the
are possible and some of these are shown in stable voltage from the Zener diode. P1 can be used
different figures. to preset the cut-off point at which the comparator’s
output goes low. This is fed into the DSP as
The 5 pin TO-263 surface mount version of OVERTEMP signal.
some IC drivers can be soldered directly on to a
copper pad on a printed circuit board for better Short circuit protection is provided by continuously
heat dissipation. It is possible then to use these monitoring the voltage drop across a SHUNT. Note
high current drivers for very high frequency that one end of SHUNT is connected to the power
switching application, driving high current supply ground GND1. The voltage picked up from
MOSFET modules for a high power this SHUNT is amplified by a low noise Op Amp and
converter/inverter. is then compared to the stable voltage from the
same Zener. When short circuit occurs, the
Fig. (1) shows a basic low side driver comparator output (FAULT) goes low. 1% metal film
configuration. C1 is used as a bypass capacitor resistors are used throughout in both these circuits
placed very close to pin No. 1 and 8 of the driver to ensure precision and stability. C3 and C4 help in
IC. Fig. (9) shows a method to separately control offering low pass filtering to avoid nuisance tripping.
the turn on and turn off times of MOSFET/IGBT.
Turn-on time can be adjusted by Rgon, while the Principle of DESAT sensing for detecting overload
turn-off time can be varied by Rgoff. Schotkky on an IGBT has been explained before in section 2.5
above. In the case of AC Motor Drive, each IGBT
diodes facilitate this, by virtue of their very low has to be protected from overload using separate
forward voltage drop and low trr. The 18V, DESAT sensing. Fig. (12) and Fig. (13) show the
400mW Zener diodes protect the Gate-Emitter connection for each IGBT. DESAT sensing is done
junction of the IGBT. A careful layout of the on the isolated side of each opto-coupler, while the
PCB, making shortest possible length between resultant FAULT signal is generated on the common
output pin and IGBT Gate, while providing input side with respect to GND1. Each FAULT signal
generous copper surface for a ground plane, is open collector type and hence can be tied
together with other FAULT signals from other the capacitor across the Vcc and ground pin of driver
opto-coupler or from other comparators. The IC from the bottom (solder side).
DSP will stop output drive signals when either
FAULT or OVERTEMP signal goes low. When Another very crucial point is proper grounding.
this happens, notice that IXD_414 offers a -ve Drivers need a very low impedance path for current
bias of -5V to guarantee turn-off conditions, return to ground, avoiding loops. The three paths for
even in presence of electrical noise. -5V is returning current to ground are: 1. Between driver IC
applied to gate of each IGBT during turn-off and the logic driving it; 2. between the driver IC and
even under normal operating conditions. After its own power supply; 3. between the driver IC and
fault is cleared, the DSP can issue a RESET the source/emitter of MOSFET/IGBT being driven.
signal for resuming normal operation. All these paths should be extremely short in length
to reduce inductance and be as wide as possible to
5.0 PRACTICAL CONSIDERATIONS reduce resistance. Also these ground paths should
be kept distinctly separate to avoid returning ground
When designing and building driver circuits for current from the load to affect the logic line driving
MOSFET/IGBT, several practical aspects have the driver IC. A good method is to dedicate one
to be taken care of to avoid unpleasant voltage copper plane in a multilayered PCB to provide a
spikes, oscillation or ringing and false turn-on. ground surface. All ground points in the circuit
More often than not, these are a result of should return to the same physical point to avoid
improper or inadequate power supply bypassing, generating differential ground potentials.
layout and mismatch of driver to the driven
MOSFET/IGBT. With desired rise and fall times in the range of 25 to
50 ns, extreme care is required to keep lengths of
As we understand now, turning MOSFET/IGBT current carrying conductors to the bare minimum.
on and off amounts to charging and discharging Since every inch of length adds approximately 20 nH
large capacitive loads. Suppose we are trying to of inductance, a di/dt of 240 Amps/microsecond
charge a capacitive load of 10,000 pF from 0 to (used in the example calculation for Eq. 5.1)
15 VDC (assuming we are turning on a generates a transient LdI/dt voltage of 4.8 volts per
MOSFET) in 25 ns, using a 14 amp ultra high inch of wire length, which subtracts from the driver’s
speed driver. output. The real effect will be a significant increase
in rise time for every tiny increase in conductor
I = VxC / t Eq. 5.1 length from output pin of driver to the Gate lead of
-12 -9
I = (15-0)x10000x10 / 25x10 = 6 A MOSFET/IGBT. For example, one extra inch of
conductor length could increase rise time from 20 ns
What this equation tells us is that current output to 70 ns, in an ultra high-speed gate drive circuit.
from driver is directly proportional to voltage Another detrimental effect of longer conductor length
is transmission line effect and resultant RFI/EMI.
swing and/or load capacitance and inversely
proportional to rise time. Actually the charging This inductance could also resonate with parasitic
current would not be steady, but would peak capacitances of MOSFET/IGBT, making it difficult to
obtain clean current waveforms at rise and fall.
around 9.6 Amps, well within the capability of 14
Amp driver. However, driver IC will have to draw
this current from its power supply in just 25 ns. It is important to also keep in mind the fact that
every MOSFET/IGBT has some inductance
The best way to guarantee this is by putting a
pair of by-pass capacitors (of at least 50 times depending on the package style and design. The
the load capacitance) of complementary lower this value, the better is the switching
performance, as this inductance is, in effect, in
impedance curves in parallel, very close to the
VCC pin of the driver IC. These capacitors series with the source/emitter and the resulting
should have the lowest possible ESR negative feedback increases switching times.
(Equivalent Series Resistance) and ESL
(Equivalent Series Inductance). One good While applying driver IC for any application, it is also
example of this is high quality surface mount necessary to compute power dissipated in the driver
for a worst-case scenario. The total power dissipated
type monolithic ceramic capacitors. Other
preferred type is SMD Tantalum. One must keep in the driver IC is a sum of the following:
the capacitor lead lengths to the bare minimum..
A smart way of accomplishing this is to solder 1. Capacitive load power dissipation;
2. Transition power dissipation;
3. Quiescent power dissipation. 640 nC. Substituting these values into Eq. 5.4 yields:
PD = 1.5 x 15 x 640 x 20,000 x 10-9
For all IXD_series of drivers, transition power 1.5 + 4.7
dissipation is absent due to a unique method PD = 46.45 mW
(Patent pending) to drive the output N-Channel
and P-Channel MOSFETs, practically
Assuming an ambient of 50 oC in the vicinity of
eliminating cross conduction.
IXD_409PI, the power dissipation capability of
As described under section 1.2, a IXD_409PI must be derated by 7.6mW/oC, which
MOSFET/IGBT driver incurs losses. Let us works out to be 190 mW. The maximum allowable
derive formulae to compute this power loss in a power dissipation at this temperature becomes 975-
driver: 190=785 mW. However, as calculated above, we will
be dissipating only 46.45 mW so we are well within
PD(on) = D x ROH x Vcc x Qg x fsw Eq. 5.2 the dissipation limit of 785 mW.
ROH + RGext + RGint
PD(off) =(1-D)xROLxVccxQgxfsw Eq.5.3 If one increases fsw to 500 kHz for a DC-to-DC
ROL + RGext+ RGint Converter application, keeping other parameters the
where: same as above, now the dissipation would be 1.16
ROH = Output resistance of driver @ output W, which exceeds the specification for IXD_409PI.
High So in this case, it is recommended to use either the
ROL = Output resistance of driver @ output IXD_409YI (TO-263 package) or IXD_409CI (TO-
Low 220) package. Both these packages can dissipate
fsw = Switching frequency about 17 W with proper heat sinking arrangement.
RGext = resistance kept externally in series The TO-263 is a surface mount package and can be
with soldered onto a large pad on a copper surface of a
Gate of MOSFET/IGBT PCB for achieving good heat transfer. For TO-220
RGint = Internal mesh resistance of MOSFET/ package, a heat sink can be used.
IGBT
D = Duty Cycle (value between 0.0 to 1.0) Let us take another example of a boost converter,
Qg= Gate Charge of MOSFET/IGBT using IXFK55N50 at VDS = 250 VDC and at ID =
27.5 Amps. Assuming fsw = 500 kHz, Vcc = 12 V.
Total loss PD = PD(on) + PD(off) From the curve of Gate Charge for IXFK55N50 in
the Data Sheet one can determine that Qg = 370 nC.
Note also that in general, RGint is small and can Let us set RGext = 1.0 Ohm. We use IXD_414YI or
be neglected and that ROH = ROL for all IXD_ IXD_414CI here, which can dissipate 12W. Here
drivers. Consequently, if the external turn-on typical value of ROH = ROL = 0.6 Ohm. Substituting
and turn-off gate resistors are identical, the total the above values in our equation, we compute the
driver power dissipation formula simplifies to: power dissipation to be:

PD=PD(on)+PD(off)=ROHxVccxQgxfsw Eq.5.4 PD = 0.6 x 12 x 370 x 500 kHz x 10-9


ROL + RGext 0.6 + 1.0 + 0.0
PD = 0.83 W.
Let us review with some examples: With adequate air circulation, one may just be able
Assume that we are driving an IXFN200N07 for to use the PDIP Package. However, it is
a Telecom power supply application or for a recommended to use TO-263 or TO-220 package
UPS/Inverter application at a switching for reliable performance.
frequency of 20 kHz. Furthermore, RGext = 4.7
Ohms and gate supply voltage is 15V. For the third example, considering driving a large
size MOSFET module VMO 580-02F at fsw = 250
On page two of the IXD_409 Data sheet, we kHz. Let Vcc = 10 V, ROH = ROL = 0.6 Ohm, RGext=
read the value of ROH = 1.5 Ohms ( Maximum). 0.0 Ohm. We read that Qg =2750 nC at Vcc = 10 V
For Qg, refer to Data Sheet of the IXFN200N07 off the VMO 580-02F data sheet. Now:
and go to Gate Charge vs. VGS curve and look PD = 0.6 x 10 x 2750 x 250kHz x 10-9
for value of Qg at Vcc = 15 V. You can read it as 0.6+ 0.0 + 0.0
PD = 6.86 W
IXD_414YI (TO-263) or IXD_414CI (TO-220) 8. High overall efficiency of gate drive is possible.
can easily drive this load provided adequate
heat sinking and proper airflow is maintained. The two disadvantages are:
Comments above for mounting TO-263 and/or 1. Gate drive transformers are not suitable for DC
TO-220 packages apply here as well. For and very low frequency signals.
derating use 0.1 W/oC. So for an ambient 2. It is difficult to implement overload/short circuit
protection for the upper MOSFET/IGBT.
temperature of 50 oC, it works out to be 2.5 W.
As the limit of IXD_414YI or IXD_414CI is 12 W,
As can be seen in Fig. (15), gate drive transformer’s
subtracting 2.5 W from this yields 9.5 W. So
primary is fed from the output of a Driver IC. For 1:1
6.86 W is still within limit. Thermal Impedance
transformer, the peak output current and voltage on
(Junction to Case) is 0.55oC/W for TO-263 and the secondary is the same as the Driver IC’s output
TO-220, hence a rise in case temperature values. As explained in section 5.0 before, knowing
should be within limit. If we increase Vcc to 15V, the switching frequency, rise and fall times desired,
conduction losses in MOSFET could reduce due gate resistor used, total gate charge for the
to lower RDS(on), but obtaining the same rise and MOSFET/IGBT and the voltage swing, one can
fall times will incur more power loss in driver due calculate the peak currents in the transformer
to increased Vcc and Qg. If that happens, primary and secondary. Calculating the average
approach described in Fig. (10) can be values for these currents will enable one to either
employed. Or possibility of using a 30 Amp design the gate drive transformer or to enable one to
driver can be investigated by power calculation select the appropriate commercially available gate
as shown above. drive transformers.

6.0 ISOLATED GATE DRIVE FOR Almost all possible configurations of bi-directional
MOSFET/IGBT switches employing IGBTs and FREDs (Fast
Recovery Epitaxial Diodes) are shown in Fig.(15).
Many applications of MOSFETs and IGBTs When connected in series with the IGBT, the FRED
require an isolated Gate Drive Circuit. For gives reverse blocking capability to the bi-directional
example in H-Bridge and 3 -Phase Bridge switch. When connected inversely across the IGBT,
inverters, the upper MOSFETs and IGBTs the FRED provides a path for the line current to flow
require an isolated gate drive, because the in the reverse direction. Both techniques prevent
Source/Emitter of upper MOSFETs/IGBTs are reverse voltage application to the emitter of IGBT.
not at the ground potential. Similarly in matrix
converters, all bi-directional switches require These bi-directional switches form nodes for matrix
isolated gate drive circuits. converters or for A.C. to D.C. converters. Driving
IGBTs in these bi-directional switches can be easily
Basically there are two popular techniques implemented using the gate drive transformers, as
available to implement isolated gate drive. shown in Fig. (15). As can be appreciated, R1, R2,
Fig.15 shows a method to implement an isolated R3 and R4 help wave shaping by facilitating core
gate drive, using Gate Drive Transformers. resetting. Z1, Z2, Z3 and Z4 protect the gate of IGBT
There are several advantages in using the gate from voltage spikes above 18.7 volts.
drive transformers:
1. If properly wound and built, they can give Another method uses opto-couplers, as illustrated in
adequate galvanic isolation. Fig. (16). As can be seen, opto-couplers need
2. Depending on the drive current and voltage isolated power supply. However, they facilitate D.C.
required, they give step-up or step-down to several Mbits/sec of pulse rate and do provide
facility. kilovolts of isolation. Keeping the same chain of
3. They are immune to dv/dt transients opto-coupler and Driver IC in each complementary
4. They experience no propagation delays. signal path will nullify the effect of slight propagation
5. Using modern high permeability cores, tiny delay through these opto-couplers and Driver ICs. It
Gate Drive Transformers are now available is assumed here that difference in propagation
that meet most stringent design specifications. delays between two same type opto-couplers is
6. There is no need to have an isolated power negligible.
supply.
7. Large duty cycle range of pulse widths is Opto-couplers have the following features:
possible, say, from 1% to 99%.
1.Adequate galvanic isolation is possible. Many dynamic processes involved in the working of
opto-couplers are U/L listed. MOSFET/IGBTs.
2.Most opto-couplers are compatible with
TTL/CMOS/HCMOS inputs. Their outputs Main emphasis in modern Power Electronics is to
depend on Vcc of isolated power supply. They reduce total losses dissipated in devices and
do need isolated power supply. subsystems for higher operating efficiency and
3.They are not immune to severe dv/dt achieving more compact designs, reducing volume
transients. and weight of resultant systems. Thus, operation at
4.Signals experience propagation delays higher and higher switching frequencies is now a
through opto-couplers. necessity, and as a result, switching losses
5.Large duty cycle range of pulse width is predominate in the power-loss-budget in
possible. semiconductor switches. Reducing switching losses
6.High overall efficiency of gate drive is possible. then becomes the single most crucial goal. Keeping
7.Overload and short circuit protection can be this goal in mind, the MOSFET/IGBT Drivers should
easily implemented using either DESAT be designed so as to yield ultra fast rise and fall
concept or current sense method. This is times, matching or exceeding that of the driven
explained in section 4.2.2, using Fig. (12) and MOSFET/IGBTs. Propagation delay time should be
Fig. (13). extremely low, facilitating implementation of fast
overload/short circuit protection. Most semiconductor
7. MATRIX CONVERTERS switches that can withstand momentary overloads
specify 10 us as the maximum allowable duration.
Matrix converters afford great ease and From the instance of sensing overload/short circuit
convenience in AC-AC conversion, without the to the removal of gate signals, time elapsed should
need for bulky energy storage components be less than 80% of the rated SCSOA time.
required in AC-DC-AC conversion. In addition,
they allow regenerative energy to be fed back to With the advent of IC Drivers for these fast
Mains and feature sinusoidal input and output MOSFET/IGBTs, the designer is relieved of the
currents and controllable input current tedious task of designing elaborate driver circuits.
displacement factor. Nevertheless, understanding these newer ICs, their
strengths and limitations, is of paramount
A basic 3 phase to 3 phase matrix converter importance. Different configurations for particular
uses nine bi-directional switches as shown in Fig topologies call for specific application knowledge.
(17). Several different configurations of Illustrations are the best way to explain theory and
achieving bi-directional switches using IGBTs applications of these Driver ICs.
and FREDs are shown in Fig.(15) and Fig.(16).
Each IGBT used in these bi-directional switches REFERENCES
will require isolated gate drive and it is here that
the real value and convenience of a gate drive 1. B. Jayant Baliga, “Power Semiconductor
transformer can be appreciated. It is difficult to Devices”, PWS Publishing Company, Boston,
imagine, use of opto-couplers, chiefly because MA (1996)
of the need for isolated power supply. 2. Ned Mohan, Tore M. Undeland, William P.
Robbins: “POWER ELECTRONICS: Converters,
Tiny gate drive transformers come really handy Applications and Design”, John Wiley & Sons,
in this application, with all its attendant New York (1994)
advantages as listed above. 3. Power Supply Design Seminar - 2001 series,
Unitrode Products from Texas Instruments.
8. CONCLUSION 4. Sam Ochi, “Driving your MOSFETs wild to obtain
greater efficiencies, power densities, and lower
With proliferating applications of modern power overall costs”, Power Electronics Europe, May-
electronics worldwide, faster, more efficient and June 2002
more compact MOSFETs and IGBTs are
replacing older solid state and mechanical
devices. The design of newer and more efficient
techniques to turn these solid state devices on
and off is a subject that requires thorough study
and understanding of the internal structure and
2000 he has been with IXYS Corporation as a
RECOMMENDED FURTHER READING Senior Applications Engineer. He has written a
number of Application Reports on the subject of
1. George J. Krausse, “Gate Driver Design for Power Electronics. He is with IXYS Corporation,
Switch-Mode Applications and the DE-SERIES 3540 Bassett Street, Santa Clara, CA 95054, U.S.A.
MOSFET Transistor”, Directed Energy,Inc. Email: a.pathak@ixys.net
Application Note available from
<www.directedenergy.com>.

DISCLAIMER

Although information furnished here is believed


to be accurate and reliable, authors assume no
responsibility for the consequences of its use;
nor for any infringement of patents or other
rights of third parties, which may result from its Mr. Ralph E. Locher earned his BS (Physics) from
use. Rensselaer, Troy, NY in 1961 and his MS (EE) from
Case-Western Reserve University, Cleveland, Ohio
AUTHORS BIOGRAPHIES in 1965. He worked for General Electric for many
years and was a contributing author of GE “SCR
Manual”. He has published many papers, while
working for Fairchild Electronics, National
Semiconductor, Power Integration, and IXYS
Corporation. He is currently the Director of
Applications Engineering at IXYS Corporation, Santa
Clara, CA. 95054, USA. Email: r.locher@ixys.net

Mr. Abhijit D. Pathak received his B. E.


(Electrical Engineering) from M. S. University,
Baroda, India in 1966. He obtained his MS (EE)
degree from University of Rhode Island,
Kingston, R. I., U.S.A. in 1971. From 1968 to
1973 he worked in USA in the areas of
development of D.C. Drives, high frequency high
Voltage Inverters, precision instrumentation and
measurement systems and their applications in
industry. In 1973, he returned to India and joined
Indian Space Research Organization (Govt. of
India) as a Senior Scientist/Engineer. At I.S.R.O.
he project engineered development of a number
of large electronic systems for the first time in
the country under sponsorship of Dept. of
Electronics, Govt. of India. He wrote a number of
technical papers, while at I.S.R.O.
Subsequently, in 1981, he started working in
private sector and developed a number of
industrial systems, including AC Variable
Frequency Drives, UPS Systems, Inverters,
Temperature Controllers, I/P (Current to
Pressure) Converters and Float-cum-boost
chargers. He also taught Final Year Degree
program at the University level for four years as
a Visiting Professor in the Department of
Instrumentation & Controls in India. Since May
Table: 1
Driving Sta nda rd IXYS MOSFETs

fPWM = 100KHz fPWM = 200KHz fPWM =400KHz


Peak
Standard Qg in Ig in Rg in Total Pg Gate Peak Ig in Rg in Total Pg Gate Peak Ig in Rg in Total Pg Gate Rcm d Pw r

Mosfet nC Am p Ohm W Drvr Am p Ohm W Drvr Am p Ohm W Drvr Out


IXFH6N100 88 0.9 11.4 0.1 Dx402 1.8 5.7 0.3 Dx404 3.5 2.8 0.5 Dx404 500W
IXFH12N100 122 1.2 8.2 0.2 Dx402 2.4 4.1 0.4 Dx404 4.9 2 0.7 DD408 1KW
IXTK21N100 250 2.5 4 0.4 Dx404 5 2 0.8 DD408 10 1 1.5 Dx414* 2KW

Driving Q-Cla ss MOSFETs

fPWM = 200KHz fPWM = 400KHz fPWM =800KHz


Peak
Q-Class Qg in Ig in Rg in Total Pg Gate Peak Ig in Rg in Total Pg Gate Peak Ig in Rg in Total Pg Gate Rcm d Pw r

Mosfet nC Am p Ohm W Drvr Am p Ohm W Drvr Am p Ohm W Drvr Out


IXFH6N100Q 48 0.96 10.4 0.1 Dx402 1.9 5.2 0.28 Dx402 3.84 2.6 0.57 Dx404 500W
IXFH12N100Q 90 1.8 5.6 0.3 Dx404 3.6 2.8 0.5 DD408 7.2 1.4 1.1 Dx409* 1KW
IXFH21N100Q 170 3.4 2.9 0.5 Dx408* 6.8 1.5 1 Dx409* 13.6 0.7 2 Dx414* 2KW

Driving F-Cla ss MOSFETs

fPWM = 1MHz fPWM =2MHz fPWM =4MHz


Peak
Q-Class Qg in Ig in Rg in Total Pg Gate Peak Ig in Rg in Total Pg Gate Peak Ig in Rg in Total Pg Gate Rcm d Pw r

Mosfet nC Am p Ohm W Drvr Am p Ohm W Drvr Am p Ohm W Drvr Out


IXFH6N100F 54 1.08 9.3 0.8 Dx402 2.16 4.6 1.6 DD408* 4.32 2.3 3.2 DD408* 500W
IXFH12N100F 77 1.54 6.5 1.2 DD408* 3.08 3.2 2.3 DD408* 6.16 1.6 4.6 Dx409* 1KW
IXFK21N100F 160 3.2 3.1 2.4 DD408* 6.4 1.6 4.8 Dx409* 12.8 0.8 9.6 Dx414* 2KW
Table: 2
Gate Driver Selection Table for HiPerFETs tr + tf in % of tPWM = ~ 1 %
Power Discretes/N-channel Power *Note:Gate Drivers Dx409* and Dx414* require heat sinks. All others without (*) don't require them.
Rg listed below are max. acceptable values for application; lower Rg values may be used.
HiPerFET Power MOSFETS

fPWM= 50 KHz fPWM= 100 KHz fPWM= 200 KHz fPWM= 400 KHz fPWM= 800 KHz
Device VDSS ID RDS(on) QG(on)
Ig Rg Pg Gate Ig Rg Pg Gate Ig Rg Pg Gate Ig Rg Pg Gate Ig Rg Pg Gate
Type Max . P eak M ax M ax D riv e r P eak M ax M ax D riv e r P eak M ax M ax D riv e r P eak M ax M ax D riv e r P eak M ax M ax D riv e r

V Amps Ohms nC A m ps O hm s Wa t t s F m ly A m ps O hm s Wa t t s F m ly A m ps O hm s Wa t t s F m ly A m ps O hm s Wa t t s F m ly A m ps O hm s Wa t t s F m ly

IXFR180N06 60 180* 0.005 420 2.1 5 0.32 Dx404 4.2 2.4 0.63 Dx409 8.4 1.2 1.26 Dx414* 16.8 0.6 2.52 Dx430* 33.6 0.3 5.04 Dx430*
IXFN340N06 60 340* 0.003 600 3 3 0.45 Dx404 6 1.7 0.9 Dx409 12 0.8 1.8 Dx414* 24.0 0.4 3.6 Dx430* 48 0.2 7.2 Dx430*
IXFH76N07-11 70 76 0.011 240 1.2 8 0.18 Dx402 2.4 4.2 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430*
IXFH76N07-12 70 76 0.012 240 1.2 8 0.18 Dx402 2.4 4.2 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430*
IXFK180N07 70 180* 0.006 420 2.1 5 0.32 Dx404 4.2 2.4 0.63 Dx409 8.4 1.2 1.26 Dx414* 16.8 0.6 2.52 Dx430* 33.6 0.3 5.04 Dx430*
IXFK180N07 70 180* 0.006 420 2.1 5 0.32 Dx404 4.2 2.4 0.63 Dx409 8.4 1.2 1.26 Dx414* 16.8 0.6 2.52 Dx430* 33.6 0.3 5.04 Dx430*
IXFK180N07 70 180* 0.006 420 2.1 5 0.32 Dx404 4.2 2.4 0.63 Dx409 8.4 1.2 1.26 Dx414* 16.8 0.6 2.52 Dx430* 33.6 0.3 5.04 Dx430*
IXFN180N07 70 180* 0.007 480 2.4 4 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430* 38.4 0.3 5.76 Dx430*
IXFR180N07 70 180* 0.006 420 2.1 5 0.32 Dx404 4.2 2.4 0.63 Dx409 8.4 1.2 1.26 Dx414* 16.8 0.6 2.52 Dx430* 33.6 0.3 5.04 Dx430*
IXFX180N07 70 180* 0.006 420 2.1 5 0.32 Dx404 4.2 2.4 0.63 Dx409 8.4 1.2 1.26 Dx414* 16.8 0.6 2.52 Dx430* 33.6 0.3 5.04 Dx430*
IXFN200N07 70 200* 0.006 480 2.4 4 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430* 38.4 0.3 5.76 Dx430*
IXFN280N07 70 280* 0.006 420 2.1 5 0.32 Dx404 4.2 2.4 0.63 Dx409 8.4 1.2 1.26 Dx414* 16.8 0.6 2.52 Dx430* 33.6 0.3 5.04 Dx430*
IXFN340N07 70 340* 0.004 600 3 3 0.45 Dx404 6 1.7 0.9 Dx409 12 0.8 1.8 Dx414* 24.0 0.4 3.6 Dx430* 48 0.2 7.2 Dx430*
IXFR180N085 85 180* 0.007 320 1.6 6 0.24 Dx404 3.2 3.1 0.48 Dx404 6.4 1.6 0.96 Dx409* 12.8 0.8 1.92 Dx414* 25.6 0.4 3.84 Dx430*
IXFX180N085 85 180* 0.007 320 1.6 6 0.24 Dx404 3.2 3.1 0.48 Dx404 6.4 1.6 0.96 Dx409* 12.8 0.8 1.92 Dx414* 25.6 0.4 3.84 Dx430*
IXFH280N095 85 280* 0.0044 600 3 3 0.45 Dx404 6 1.7 0.9 Dx409 12 0.8 1.8 Dx414* 24.0 0.4 3.6 Dx430* 48 0.2 7.2 Dx430*
IXFE180N10 100 180* 0.008 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFK180N10 100 180* 0.008 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFN180N10 100 180* 0.008 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFR180N10 100 180* 0.008 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFX180N10 100 180* 0.008 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFN230N10 100 230* 0.006 390 1.95 5 0.29 Dx404 3.9 2.6 0.585 Dx404 7.8 1.3 1.17 Dx409* 15.6 0.6 2.34 Dx430* 31.2 0.3 4.68 Dx430*
IXFC80N10 100 80* 0.0125 230 1.15 9 0.17 Dx402 2.3 4.3 0.345 Dx404 4.6 2.2 0.69 Dx409 9.2 1.1 1.38 Dx414* 18.4 0.5 2.76 Dx430*
IXFC80N10 100 80* 0.0125 230 1.15 9 0.17 Dx402 2.3 4.3 0.345 Dx404 4.6 2.2 0.69 Dx409 9.2 1.1 1.38 Dx414* 18.4 0.5 2.76 Dx430*
IXFC80N10 100 80* 0.0125 230 1.15 9 0.17 Dx402 2.3 4.3 0.345 Dx404 4.6 2.2 0.69 Dx409 9.2 1.1 1.38 Dx414* 18.4 0.5 2.76 Dx430*
IXFH80N10 100 80* 0.0125 230 1.15 9 0.17 Dx402 2.3 4.3 0.345 Dx404 4.6 2.2 0.69 Dx409 9.2 1.1 1.38 Dx414* 18.4 0.5 2.76 Dx430*
IXFH80N10 100 80* 0.0125 230 1.15 9 0.17 Dx402 2.3 4.3 0.345 Dx404 4.6 2.2 0.69 Dx409 9.2 1.1 1.38 Dx414* 18.4 0.5 2.76 Dx430*
IXFT80N10 100 80* 0.0125 230 1.15 9 0.17 Dx402 2.3 4.3 0.345 Dx404 4.6 2.2 0.69 Dx409 9.2 1.1 1.38 Dx414* 18.4 0.5 2.76 Dx430*
IXFT80N10 100 80* 0.0125 230 1.15 9 0.17 Dx402 2.3 4.3 0.345 Dx404 4.6 2.2 0.69 Dx409 9.2 1.1 1.38 Dx414* 18.4 0.5 2.76 Dx430*
IXFT80N10 100 80* 0.0125 230 1.15 9 0.17 Dx402 2.3 4.3 0.345 Dx404 4.6 2.2 0.69 Dx409 9.2 1.1 1.38 Dx414* 18.4 0.5 2.76 Dx430*
IXFT80N10 100 80* 0.0125 230 1.15 9 0.17 Dx402 2.3 4.3 0.345 Dx404 4.6 2.2 0.69 Dx409 9.2 1.1 1.38 Dx414* 18.4 0.5 2.76 Dx430*
IXFR150N15 150 105* 0.0125 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFK150N15 150 150* 0.0125 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFN150N15 150 150* 0.0125 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFX150N15 150 150* 0.0125 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFH74N20 200 74 0.03 280 1.4 7 0.21 Dx402 2.8 3.6 0.42 Dx404 5.6 1.8 0.84 Dx409* 11.2 0.9 1.68 Dx414* 22.4 0.4 3.36 Dx430*
IXFT74N20 200 74 0.03 280 1.4 7 0.21 Dx402 2.8 3.6 0.42 Dx404 5.6 1.8 0.84 Dx409* 11.2 0.9 1.68 Dx414* 22.4 0.4 3.36 Dx430*
IXFK80N20 200 80 0.03 280 1.4 7 0.21 Dx402 2.8 3.6 0.42 Dx404 5.6 1.8 0.84 Dx409* 11.2 0.9 1.68 Dx414* 22.4 0.4 3.36 Dx430*
IXFR120N20 200 105 0.017 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFK120N20 200 120 0.017 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFN120N20 200 120 0.017 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFX120N20 200 120 0.017 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFN180N20 200 180 0.01 380 1.9 5 0.29 Dx404 3.8 2.6 0.57 Dx404 7.6 1.3 1.14 Dx409* 15.2 0.7 2.28 Dx430* 30.4 0.3 4.56 Dx430*
IXFR100N25 250 87 0.027 300 1.5 7 0.23 Dx402 3 3.3 0.45 Dx404 6 1.7 0.9 Dx409* 12.0 0.8 1.8 Dx414* 24 0.4 3.6 Dx430*
IXFK100N25 250 100 0.027 300 1.5 7 0.23 Dx402 3 3.3 0.45 Dx404 6 1.7 0.9 Dx409* 12.0 0.8 1.8 Dx414* 24 0.4 3.6 Dx430*
IXFN100N25 250 100 0.027 300 1.5 7 0.23 Dx402 3 3.3 0.45 Dx404 6 1.7 0.9 Dx409* 12.0 0.8 1.8 Dx414* 24 0.4 3.6 Dx430*
IXFX100N25 250 100 0.027 300 1.5 7 0.23 Dx402 3 3.3 0.45 Dx404 6 1.7 0.9 Dx409* 12.0 0.8 1.8 Dx414* 24 0.4 3.6 Dx430*
IXFK73N30 300 73 0.045 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFN73N30 300 73 0.045 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFR90N30 300 75 0.033 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFK90N30 300 90 0.033 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFN90N30 300 90 0.033 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFX90N30 300 90 0.033 360 1.8 6 0.27 Dx404 3.6 2.8 0.54 Dx404 7.2 1.4 1.08 Dx409* 14.4 0.7 2.16 Dx430* 28.8 0.3 4.32 Dx430*
IXFN130N30 300 130 0.018 380 1.9 5 0.29 Dx404 3.8 2.6 0.57 Dx404 7.6 1.3 1.14 Dx409* 15.2 0.7 2.28 Dx430* 30.4 0.3 4.56 Dx430*
IXFH30N50 500 30 0.16 227 1.135 9 0.17 Dx402 2.27 4.4 0.341 Dx404 4.54 2.2 0.681 Dx409 9.1 1.1 1.362 Dx414* 18.16 0.6 2.724 Dx430*
IXFT30N50 500 30 0.16 227 1.135 9 0.17 Dx402 2.27 4.4 0.341 Dx404 4.54 2.2 0.681 Dx409 9.1 1.1 1.362 Dx414* 18.16 0.6 2.724 Dx430*
IXFH32N50 500 32 0.15 227 1.135 9 0.17 Dx402 2.27 4.4 0.341 Dx404 4.54 2.2 0.681 Dx409 9.1 1.1 1.362 Dx414* 18.16 0.6 2.724 Dx430*
IXFT32N50 500 32 0.15 227 1.135 9 0.17 Dx402 2.27 4.4 0.341 Dx404 4.54 2.2 0.681 Dx409 9.1 1.1 1.362 Dx414* 18.16 0.6 2.724 Dx430*
IXFK33N50 500 33 0.16 227 1.135 9 0.17 Dx402 2.27 4.4 0.341 Dx404 4.54 2.2 0.681 Dx409 9.1 1.1 1.362 Dx414* 18.16 0.6 2.724 Dx430*
IXFK35N50 500 35 0.15 227 1.135 9 0.17 Dx402 2.27 4.4 0.341 Dx404 4.54 2.2 0.681 Dx409 9.1 1.1 1.362 Dx414* 18.16 0.6 2.724 Dx430*
IXFE48N50D2** 500 42 0.1 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
Table: 3
Gate Driver Selection Table for HiPerFETs tr + tf in % of tPWM = ~ 1 %
Power Discretes/N-channel Power *Note:Gate Drivers Dx409* and Dx414* require heat sinks. All others without (*) don't require them.
Rg listed below are max. acceptable values for application; lower Rg values may be used.
HiPerFET Power MOSFETS

fPWM= 50 KHz fPWM= 100 KHz fPWM= 200 KHz fPWM= 400 KHz fPWM= 800 KHz
Device VDSS ID RDS(on) QG(on)
Ig Rg Pg Gate Ig Rg Pg Gate Ig Rg Pg Gate Ig Rg Pg Gate Ig Rg Pg Gate
Type Max . P eak M ax M ax D rive r P eak M ax M ax D rive r P e ak M ax M ax D rive r P eak M ax M ax D rive r P eak M ax M ax D rive r

V Amps Ohms nC A m ps O hm s Wa t t s F m ly A m ps O hm s Wa t t s F m ly A m ps O hm s Wa t t s F m ly A m ps O hm s Wa t t s F m ly A m ps O hm s Wat t s F m ly

IXFR50N50 500 43 0.1 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFK44N50~ 500 44 0.12 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFN44N50~ 500 44 0.12 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFN44N50U2** 500 44 0.12 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFN44N50U3** 500 44 0.12 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFK48N50 500 48 0.1 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFN48N50 500 48 0.1 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFN48N50U2** 500 48 0.1 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFN48N50U3** 500 48 0.1 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFR55N50 500 48 0.08 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFK50N50 500 50 0.1 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFN50N50 500 50 0.1 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFX50N50 500 50 0.1 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFE50N50 500 52 0.1 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFK55N50 500 55 0.08 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFN55N50 500 55 0.08 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFX55N50 500 55 0.08 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFE80N50 500 71 0.05 380 1.9 5 0.29 Dx404 3.8 2.6 0.57 Dx404 7.6 1.3 1.14 Dx409* 15.2 0.7 2.28 Dx430* 30.4 0.3 4.56 Dx430*
IXFN75N50 500 75 0.055 380 1.9 5 0.29 Dx404 3.8 2.6 0.57 Dx404 7.6 1.3 1.14 Dx409* 15.2 0.7 2.28 Dx430* 30.4 0.3 4.56 Dx430*
IXFN80N50 500 80 0.05 380 1.9 5 0.29 Dx404 3.8 2.6 0.57 Dx404 7.6 1.3 1.14 Dx409* 15.2 0.7 2.28 Dx430* 30.4 0.3 4.56 Dx430*
IXFK48N55 550 48 0.11 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFN48N55 550 48 0.11 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFX48N55 550 48 0.11 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFK32N60~ 600 32 0.25 325 1.625 6 0.24 Dx402 3.25 3.1 0.488 Dx404 6.5 1.5 0.975 Dx409* 13.0 0.8 1.95 Dx414* 26 0.4 3.9 Dx430*
IXFN32N60~ 600 32 0.25 325 1.625 6 0.24 Dx402 3.25 3.1 0.488 Dx404 6.5 1.5 0.975 Dx409* 13.0 0.8 1.95 Dx414* 26 0.4 3.9 Dx430*
IXFK36N60 600 36 0.18 325 1.625 6 0.24 Dx402 3.25 3.1 0.488 Dx404 6.5 1.5 0.975 Dx409* 13.0 0.8 1.95 Dx414* 26 0.4 3.9 Dx430*
IXFN36N60 600 36 0.18 325 1.625 6 0.24 Dx402 3.25 3.1 0.488 Dx404 6.5 1.5 0.975 Dx409* 13.0 0.8 1.95 Dx414* 26 0.4 3.9 Dx430*
IXFR44N60 600 38 0.13 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFE44N60 600 40 0.13 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFK44N60 600 44 0.13 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFN44N60 600 44 0.13 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFX44N60 600 44 0.13 330 1.65 6 0.25 Dx402 3.3 3.0 0.495 Dx404 6.6 1.5 0.99 Dx409* 13.2 0.8 1.98 Dx414* 26.4 0.4 3.96 Dx430*
IXFN60N60 600 60 0.08 380 1.9 5 0.29 Dx402 3.8 2.6 0.57 Dx404 7.6 1.3 1.14 Dx409* 15.2 0.7 2.28 Dx430* 30.4 0.3 4.56 Dx430*
IXFK27N80 800 27 0.32 350 1.75 6 0.26 Dx404 3.5 2.9 0.525 Dx404 7 1.4 1.05 Dx409* 14.0 0.7 2.1 Dx430* 28 0.4 4.2 Dx430*
IXFN27N80 800 27 0.32 350 1.75 6 0.26 Dx402 3.5 2.9 0.525 Dx402 7 1.4 1.05 Dx409* 14.0 0.7 2.1 Dx430* 28 0.4 4.2 Dx430*
IXFR34N80 800 28 0.24 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFK34N80 800 34 0.24 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFN34N80 800 34 0.24 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFX34N80 800 34 0.24 270 1.35 7 0.20 Dx402 2.7 3.7 0.405 Dx404 5.4 1.9 0.81 Dx409* 10.8 0.9 1.62 Dx414* 21.6 0.5 3.24 Dx430*
IXFN44N80 800 44 0.145 380 1.9 5 0.29 Dx404 3.8 2.6 0.57 Dx404 7.6 1.3 1.14 Dx409* 15.2 0.7 2.28 Dx430* 30.4 0.3 4.56 Dx430*
IXFK25N90 900 25 0.33 240 1.2 8 0.18 Dx402 2.4 4.2 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430*
IXFN25N90 900 25 0.33 240 1.2 8 0.18 Dx402 2.4 4.2 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430*
IXFX25N90 900 25 0.33 240 1.2 8 0.18 Dx402 2.4 4.2 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430*
IXFK26N90 900 26 0.3 240 1.2 8 0.18 Dx402 2.4 4.2 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430*
IXFN26N90 900 26 0.3 240 1.2 8 0.18 Dx402 2.4 4.2 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430*
IXFX26N90 900 26 0.3 240 1.2 8 0.18 Dx402 2.4 4.2 0.36 Dx404 4.8 2.1 0.72 Dx409 9.6 1.0 1.44 Dx414* 19.2 0.5 2.88 Dx430*
IXFN39N90 900 39 0.22 390 1.95 5 0.29 Dx404 3.9 2.6 0.585 Dx404 7.8 1.3 1.17 Dx409* 15.6 0.6 2.34 Dx430* 31.2 0.3 4.68 Dx430*
IXFH14N100 1000 14 0.75 220 1.1 9 0.17 Dx402 2.2 4.5 0.33 Dx404 4.4 2.3 0.66 Dx409 8.8 1.1 1.32 Dx414* 17.6 0.6 2.64 Dx430*
IXFT14N100 1000 14 0.75 220 1.1 9 0.17 Dx402 2.2 4.5 0.33 Dx404 4.4 2.3 0.66 Dx409 8.8 1.1 1.32 Dx414* 17.6 0.6 2.64 Dx430*
IXFX14N100 1000 14 0.75 220 1.1 9 0.17 Dx402 2.2 4.5 0.33 Dx404 4.4 2.3 0.66 Dx409 8.8 1.1 1.32 Dx414* 17.6 0.6 2.64 Dx430*
IXFH15N100 1000 15 0.7 220 1.1 9 0.17 Dx402 2.2 4.5 0.33 Dx404 4.4 2.3 0.66 Dx409 8.8 1.1 1.32 Dx414* 17.6 0.6 2.64 Dx430*
IXFT15N100 1000 15 0.7 220 1.1 9 0.17 Dx402 2.2 4.5 0.33 Dx404 4.4 2.3 0.66 Dx409 8.8 1.1 1.32 Dx414* 17.6 0.6 2.64 Dx430*
IXFX15N100 1000 15 0.7 220 1.1 9 0.17 Dx402 2.2 4.5 0.33 Dx404 4.4 2.3 0.66 Dx409 8.8 1.1 1.32 Dx414* 17.6 0.6 2.64 Dx430*
IXFF24N100 1000 22 0.39 250 1.25 8 0.19 Dx402 2.5 4.0 0.375 Dx404 5 2.0 0.75 Dx409 10.0 1.0 1.5 Dx414* 20 0.5 3 Dx430*
IXFR24N100 1000 22 0.39 250 1.25 8 0.19 Dx402 2.5 4.0 0.375 Dx404 5 2.0 0.75 Dx409 10.0 1.0 1.5 Dx414* 20 0.5 3 Dx430*
IXFE24N100 1000 23 0.39 250 1.25 8 0.19 Dx402 2.5 4.0 0.375 Dx404 5 2.0 0.75 Dx409 10.0 1.0 1.5 Dx414* 20 0.5 3 Dx430*
IXFN23N100 1000 23 0.43 250 1.25 8 0.19 Dx402 2.5 4.0 0.375 Dx404 5 2.0 0.75 Dx409 10.0 1.0 1.5 Dx414* 20 0.5 3 Dx430*
IXFK24N100 1000 24 0.39 250 1.25 8 0.19 Dx402 2.5 4.0 0.375 Dx404 5 2.0 0.75 Dx409 10.0 1.0 1.5 Dx414* 20 0.5 3 Dx430*
IXFN24N100 1000 24 0.39 250 1.25 8 0.19 Dx402 2.5 4.0 0.375 Dx404 5 2.0 0.75 Dx409 10.0 1.0 1.5 Dx414* 20 0.5 3 Dx430*
IXFX24N100 1000 24 0.39 250 1.25 8 0.19 Dx402 2.5 4.0 0.375 Dx404 5 2.0 0.75 Dx409 10.0 1.0 1.5 Dx414* 20 0.5 3 Dx430*
H.V.DC
L
+15VDC O
A
D

1 8 D1 C
V 2 7 CS
R1 IC2 G
INPUT 3 6 RG Q
C1 4 5
TIME Rp ZD1 E RS
ZD2

C1,C3 : 22 MFD, 25VDC Tantalum capacitors


C2 : 2200 MFD, 35VDC Electrolytic capacitors
T1 : 220 VAC to 15-0-15 VAC, 15VA control transformer
or 110VAC TO 15-0-15 VAC, 15 VA Control Transformer.
Q : IXLF19N250A
D2 IC1 : 7815 Regulator
+15VDC IC2 : IXDN409 or IXDN414
IC1
D1 : IN5817
+ C2
C3 D2,D3 : IN4002
C.T. ZD1,ZD2 : 18V, 400MW ZENERS
RG1 : 3.3 ohms to 27 ohms
depending on Turn-ON speed
T1 Rp : 2K2, ¼ W, 5%
D3
Cs, Rs : Snubber network to reduce IGBT switching
losses. Value depends upon fsw. Suggest:
Cs=0.1 MFD, Rs=10 to 33 ohms
R1 : 10K, ¼ w
Fig. (1) Circuit schematic showing how to use IXDN409 or IXDN414 to drive an IGBT

Vcc : 3V to 25VDC VDC


Ld=10mH
1 I 8
I/P X +
2 D 7 C9 Rd=0.1 Ohm
D R7
3 4 6
1 MOSFET
4 4 5 MODULE
R6 VMO580-02F

R5 U4 U5
U5 R9 Rs=0.005 Ohm
C7 Q1
U2 +15V
Ls=20nH
R4 5
(Representing
2 + stray inductance)
U3 C4
U5 U2 C3 - 4

1 3
LM-317
T1 D1 1 3 2 R2 R3
M 7815 +15V TO
A + C1 + 2 + ALL ICs R1
I
N C2 C2
S Z1 P2
P1
D2

Fig. (2). Evaluation circuit to test IXDD408 and IXDD414 for soft turn off.
Fig. (3) Photographic +ve and -ve and component layout with silk sceen diagram for Circuit of Fig.(2).
Bill of Materials for Fig.(2)
Resistors: Capacitors: Diodes: ICs:

R1: 240 C1: 1000µF;35VWDC D1: 1N4002 or BA 159 U1: IXDD408PI or


R2: 560 C2: 22µF, 63 VWDC D2: 1N4002 or BA 159 IXDD414PI
R3: 10K C3: 1pF, silver dipped mica U2: CD4001
R4: 5K C4: 100pF silver dipped mica Zener Diodes: U3: LM339
R5: 1Meg C5: 0.1µF, 35WDC Tantalum 1. Z1: 1N821 U4: CD4011
R6: 1K5 C6: 0.1µF, 35VWDC Tantalum Voltage Regulators: U5: CD4049
R7: Rg-T.B.D. C7: 1pF silver dipped mica 1. 7815 U6: IXDD408YI or
R8: 1Meg C8: 0.1µF, 35VWDC Tantalum 2. LM317T IXDD414YI
C9: 0.1µF, 35VWDC Tantalum Note: Either use U1
Trimmers: Transistors: or U6, but not both.
C10: 0.1µF, 35VWDC Tantalum
1. Q1: 2N7000
P1: 5K, 3006P Bourns or Spectrol
P2: 1K, 3006P Bourns or Spectrol
Fig.(4) A circuit schematic showing how to drive upper and lower MOSFETs in a
phase leg topology using a Low and High side driver pair.
SD2 2xVcc -VSD2
+
+
C2
-
Vcc
+
ON

Q1 SD1
18V
OFF Zener
t - +

ON C1
Q2

OFF
t
-
f sw ~
~ 400 KHz

Fig. (5) Basic Charge Pump Doubler

Vcc = +15V

DB V DC ~
~ 500VDC
R5

R2 +
1 I I
R1 CB 8 C2
P1 R4 X X
2 D D 7 Rgext Q4
C1 D or D
V 4 4 L
3 6
R3 0 1
4 8 4 5 CF L
15V D2
D1 O
A
Q1 D
t
0
I/P

Rgext: 1.0 Ohm to 4.7 Ohm


DB : DSEP9-06CR CF : GE A28F5601
D1 : DSEC60-12A 0.1MFD,1000 Volts
D2 : 1N5817 R1 : 1K
C1 : 20MFD,25V R2 : 10K
C2 : 20MFD,1000 Volts,CSI 10DC0020 R3 : 2K
CB : 10MFD,25VDC R4 : 10K
P1 : 5K Trim pot R5 : 1 Ohm
L : 5µH,DALE IH-5

Fig. (6) Basic bootstrap gate drive technique


Fig.(7) Boosting output gate drive to +/-8 A and charge pump output to 350mA for 400kHz switching of
size 9 devices with the IXBD4410/4411 gate driver chip set.

Fig.(8) Boosting output gate drive to +/-14 A and charge pump output to 500mA for 400kHz switching
of size 9 devices with the IXBD4410/4411 gate driver chip set.
H.V.DC
Vcc H.V.DC Vcc
L
O
L A
O + D
A CF D
1 I I D 1 I I
V 8 + 8
I/P X X CF X X
D D D Rgon D D
2 7 I/P 2 7 Rgon
D or D D or D
3 4 4 6 3 4 4 6 Q2
D Rg off
t 0 1 0 1
4 8 4 5 4 8 4 5
Z1 Z1

Z2 Z2

Fig (9) Turn-off enhancement methods.

+Vcc=+15V

+
CF Q1 LOAD H.V.DC
1 I
V 8 Rg on
I/P X
+15V 2 D 7 Rb
D IGBT
3 4 6
0.0V t
0
4 Rg off
-5V 8 5 Z1 1. Z1,Z2 : 18V,400mW
Q2 Zener diodes
VEE = -5V Z2 2. D : 1N5821
3. Q1 : D44VH10
4. Q2 : D45VH10
5. Rb : 10 Ohms,1/4w,1%

Fig. (10). Technique to boost current output and provide -ve bias to achieve faster turn off for high power MOSFET and IGBT Modules
CF Vcc=16VDC
+
~ 300 to 375 V.D.C.
D.C. SUPPLY ~
R5
+VE
I R6
1 8
X T1 D1 M1 M2 D2 T2
A 2 D 7
D R1 Z1 Z3 R2
3 4 6 Q1 Q2
0 Z2 T3 Z4
Phase B 4 4 5
Shift R G1 R G2
Resonant LOAD
R7
Controller
IC R8
U1 1 I
8
X D4 M4 M3 D3
C 2 D 7
D R4 Z7 Z5 R3
3 4 6 Q4 Q3
0 Z8 Z6
D 4 4 5
R G4 D.C.SUPPLY R G3
COMMON

Fig. (11) Transformer coupled Gate Drive arrangement for "H" Bridge in a Phase Shift PWM Controller at fixed Switching frequency.

SUGGESTED PARTS:
1. U1 : T.I. UC 3875
2. T1,T2 : Coilcraft Part No. SD250-3 or Vanguard Pulse Transformer Part No: GD 203
3. Q1,Q2,Q3,Q4 : 2N2905A
4. D1,D2,D3,D4 : DSEP8-02A IXYS HiPerFRED
5. T3 : OUTPUT Transformer
6. CF : 22MFD,35 VWDC Tantalum Capacitor
7. R1,R2,R3,R4 : 560 Ohms, ¼ w,1% Metal film
8. M1,M2,M3,M4 : IXFN55N50 IXYS HiPerFET or IXFN80N50 IXYS HiPerFET
9. Z1,Z2,...Z8 : 18V, 400mW Zener diodes.
10. RG1,RG2,RG3,RG4 : 3.3 Ohms, ¼ w, 1% Metal Film resistors.
11. R5,R6,R7,R8 : 10K, ¼ w, 5%
GND1 +5.0V
+5.0 V +5.0 V

ISOLATED
GND1 DC TO DC
CONVERTER
T1 Vin+
1 16 +15V COM -5V
SineWave VE
HCPL-316J
PWM
T2 Vin- + +
Signals 2 15 VLED2+
C1 C2
for T3
3-Phase 3 14 DESAT
Inverter T4 Vcc1
IXDD414PI
GND1 4
TMS320F2407A

T5 13 U2
Vcc2

GROUND

ENABLE
T6 RESET 5 12
Dynamic Vc
R5 RD

O/P
Vcc
T7

I/P
Brake FAULT
6 11
RESET VOUT
FAULT + 7 10
VLED1 VEE
U1 OVERTEMP U6
- 8
VLED1
9
R6
VEE
-5V
GND1
IXYS's (CBI)
CONVERTER LF -
R1
BRAKE
INVERTER Rg U3
Dd
MODULE +
21 22
R4
T1 T3 T5 8
D11 D13 D15 D15 D1 D3 D5
18 20 R2
16 N
1 2 3 CF 7 T
15 C
17 19 9
D12 D14 D16 Z1
D2 D4 D6
14 12 13
11
T2 T4 T6 R3
23 24

R13 C4 +5V
GND1 SHUNT
R12
R7 - R9 R10
- R11
FAULT
U4 U5
C3
+ +
R8 P1

Fig. (12) 3-Phase AC Motor drive schematic showing how IXYS CBI (Converter-Brake-Inverter)
Module can be driven by IXDD414 using opto-couplers.
All protection features are incorporated.
LF
21 22

+5V +5V +5V

D11 D13 D15

DC to DC T1 DC to DC T3 DC to DC T5
DYNAMIC
BRAKE +15V -5V Rg +15V -5V Rg +15V -5V Rg
16 18 20
REGISTOR
3ø MAINS D1 D3 D5
IXDD414 IXDD414 IXDD414
FU 7
Dd Dd Dd
U 1 15 17 19
F DESAT F DESAT F DESAT
FV
V 2 R HCPL316J R HCPL316J R HCPL316J
+ CF RD RD RD
3 Phase A.C.
T1 T3 T5
FW MOTOR
W 3 6
MCB M
5
4
+5V +5V +5V +5V
D12 D14 D16

DC to DC T7 DC to DC T2 DC to DC T4 DC to DC T6
+15V -5V +15V +15V +15V
Rg 14
-5V Rg
11
-5V Rg
12
-5V Rg
13
D2 D4 D6
IXDD414 IXDD414 IXDD414 IXDD414
Dd Dd Dd
10
F F DESAT F DESAT F DESAT
R HCPL316J R HCPL316J RD R HCPL316J RD R HCPL316J RD
T7 T2 T4 T6

23 24
SHUNT T1 T2 T3 T4 T5 T6 T7 R F OVERTEMP
GND1
+5V
TMS320F2407A DSP CHIP

NOTES: 1. ALL F = FAULT SIGNALS ARE TIED TOGETHER (BEING OPEN COLLECTOR) AND FED INTO TMS320F2407A DSP CHIP.
2. ALL R = RESET SIGNALS ARE TIED TOGETHER AND FED TO HCPL-316J.
3. OVERTEMP AND OVERLOAD/SHORT CIRCUIT FAULT SIGNALS ARE GENERATED AS PER FIG(16)
OVERTEMP IS ALSO FED IN TMS320F2407A DSP CHIP .

FIG(13) IXYS CONVERTER, BRAKE INVERTER (CBI) MODULE BEING DRIVEN BY IXDD414 WITH
OPTO-COUPLER AND DESAT, OVERTEMP AND SHORT CIRCUIT/OVERLOAD PROTECTIONS.
Bill of Materials for Fig. (12) and
Fig. (13)

R1, R3, R5, R10, R11: 10K, 1/4W, 1% MFR


R2: 560 Ohms, 1/4W, 1% MFR
R4: 2.2 Meg, 1/4W, 5%
R6: 100 Ohms,1/4 W,1% MFR
R7: 20K, 1/4W, 1% MFR
R8, R9: 61.9K, 1/4W, 1% MFR
R12, R13: 1.24K, 1/4W, 1% MFR
Rg: T.B.D. based on ton and toff & size of IGBT
RD:100 Ohms,1/4 w, 5%
P1: 10K, multi turn trimpot, Bourns 3006P or
Spectrol
C3, C4: 33 pf, silver dipped mica
Dd: General Semiconductor make,
Type: RGP02-20E, 0.5 A, 2000 V, trr: 300 ns
Z1: Zener LM336, 2.5 Volt
U3, U5 : LM339 Comparator
U4 : LM-101 Op Amp
SHUNT : 75 mV @ full load current
LF: Gapped D C Choke for filtering rectified
power
CF: Electrolytic Filter Capacitor with very low
ESR & ESL and screw type terminals to
handle high ripple current. Voltage rating is
determined by DC Voltage plus AC ripple
Voltage
CBI Module: IXYS Corporation Type Nos:
MUBW 50-12A8 or any MUBW module from
CBI 1, CBI 2 or CBI 3 series, depending on
Motor H.P. rating.
U1: Texas Instrument’s TMS320F2407A,
FLASH programmable Digital Signal
Processor with embedded software for AC
Drive, using brake feature.
IXDD414 Driver chip: 7 are required to
implement the AC Drive, using Brake
feature.
HCPL316J (Opto-coupler): 7 are required to
implement the AC Drive With Brake feature.
Isolated DC-to-DC Converter: 7 are required
with specified isolation.
Vcc
V H.V.D.C.
1 I I
8
I/P X X
2 D D 7
H RH D OR D R1 C1 T1 C2 C2 T2
t + 3 4 4 6
CF 0 1 Q1 Q2
Z1 Z1
4 8 4 5 D1 Rp Rp
D2 D2
T3

LOAD

C2 C2

Q4 Q3
Z1 Z1
Rp Rp
Vcc D2 D2
V

1 I I
8
I/P X X
2 D D 7 H.V.D.C.
L RH D OR D R1 C1 COMMON
t 3 4 4 6
+
CF 0 1
4 8 4 5 D1

FIG(14) A Transformer coupled Gate Drive circuit employing D.C. restore


technique and showing how to generate -ve bias during turn-off.
H. V. AC H. V. AC
INPUT C1 INPUT
E1

T1 T1
G1 G1

C1 E1,E2
C2

T2 T2
+15VDC G2 G2

R5
E2
H. V. AC C2 H. V. AC
V R6 INPUT INPUT
1 I 8
X
D T1 G1 C1
A H. V. AC
I/P 2 D 7 INPUT
t
4
V Z3 E2
0 6 T1
250KHz > fsw > 10KHz 3 + R1 R3
4
P C1 Z4
I G1 G2
I/P B 4 5
E1
t
T2
E1
H. V. AC
T2 INPUT C2
G2

R1,R2,R3,R4: 2K2,1/4w,5% Z1
R5,R6:10K,1/4w,5% R2 R4
C1:47MFD,35WVDC Tantalum Capacitor
T1,T2: Coilcraft Gate Drive Xformer SD250-1 or Vanguard P/N:GD203 Z2 H. V. AC T1 H. V. AC
Z1,Z2,Z3,Z4: 18V,400mw Zener Diodes INPUT
E2 INPUT

E1
G1
Fig (15) A Simple scheme to drive Bi-directional switches, using gate drive transformers
to ensure galvanic isolation.

H. V. AC H. V. AC
Vcc +5V
U1 INPUT C1 INPUT
U3
R1 + E1
C1 1 8 1 8
C2 - I
A R3 X T1 T1
2 7
2 D 7 G1 G1
N
DATA 4 R G1
INPUT G1
TTL or 6 3 0 6 E1,E2
LSTTL 3 9 C1
P C2
4 4 5 R5 Z1
5 I
T2 T2
Z2 G2 G2
+15VDC
E1
OUT +
Isolated C3 E2
- H. V. AC
INPUT DC to DC C2 H. V. AC
Converter + INPUT INPUT
C4
OUT -
-5VDC C1 H. V. AC
Vcc INPUT
U2 U4 E2
T1
+
1 8 C2 8
C1 R2 - I
B R4 X
2 7 G1 G2
2 D 7
N
DATA 4 R G2
INPUT LSTTL or T2
TTL 6 3 0 6 G2 E1
3 9
P H. V. AC
4 4 5 R6 Z3 INPUT
5 I C2
Z4
+15VDC
E2
OUT +
Isolated C3 U1,U2: HCPL2201 opto-coupler
- C1: 100Pf ceramic H. V. AC T1 H. V. AC
INPUT DC to DC INPUT
+ R1,R2: 1K,1/4W,5% INPUT
Converter C4 C2: 10MFD,35vdc Tantalum
OUT - C3,C4: 47MFD,35VDC Tantalum
R3,R4: 10K,1/4W,5% E1
-5VDC RG1,RG2: 1 ohm to 10 ohm depending on
IGBT & risetime desired G1
Z1,Z2,Z3,Z4: 18V,400mw zener diodes
R5,R6: 2K2,2W,5%

Fig.(16) A Scheme of driving Bi-directional switches with built-in galvanic isolation, using opto-couplers.
V Rg on V
Rg on

+
+15V Rg off - +15V Rg off
Cg s
Cg s
t t
TURN-ON PULSE TURN-OFF PULSE

Rg on i on
V Rg on
V

+
Rg off -
Rg off
+15V i off Cg s +15V Cg s
Rsc O/L
R sc O/L
Sensing
t
t
TURN-OFF PULSE TURN-ON PULSE

Fig.(17) Basic circuit showing use of pulse transformer to give isolation for upper
MOSFET/IGBT in a phase leg configuration

R
LF

S7 S4 S1
CF CF

LF S

CF
S8 S5 S2

LF T

S9 S6 S3

3 phase
LOAD

Fig.(18) Basic 3 phase to 3 phase matrix converter employing nine Bi-directional switches

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