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    20881a04k3 HSVD Aat-1

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    hi.hello.dearrr
    HIGH SPEED VLSI DESIGN ASSESSMENT

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    20881a04k3 HSVD Aat-1

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    hi.hello.dearrr
    2 views7 pages
    HIGH SPEED VLSI DESIGN ASSESSMENT

    Original Title

    20881A04K3_HSVD_AAT-1

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    HIGH SPEED VLSI DESIGN ASSESSMENT

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    2 views7 pages

    20881a04k3 HSVD Aat-1

    Uploaded by

    hi.hello.dearrr
    HIGH SPEED VLSI DESIGN ASSESSMENT

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    You are on page 1of 7

    a0381ADHK3

    ANT-1 HyhGpedvVIST

    ¬CE-D

    Brty explaio the Catcade Nen."Threshold Logte CeNTL)


    Dcvs Leqte th reat sketch9
    ans In 0cVSL logte Constdexable pouots is Congun ed n cross
    ove Cuxsant tle sottcktng the certents of crcutt
    DSL geduced acttve poucen"Consunpdion b nducdrg vlage
    solng. cNTL further tmproves t.
    Functfon
    True & complerent ogte (ps prevded to Devs -tree
    ef NFET devi es
    Load ctrcuit Conststs ot -4 devtee Jatehes
    sNFETS a t u act to lrnit upper end f Jogfe voltase sain
    ’NFETS 5 6 -ye
    ve feedback to tees by
    inereat.
    -tbhedr on retdaree
    resstance as the tre bchargus , bmitin the loue
    end of the lote voltage
    etng
    a Copacitos esed'to shurt te tect of
    -e
    58 6 devi ces and moderate -ve feedback.
    thfs style has no distioc
    ’The -transhex functton aszociated wth -this
    "break"
    levels.
    t'a lojte -tredold, bt pruduces Joglly sabd adpu
    claracteristcs Wkaknes
    -’ Sepeoate natl. level trterlace
    ’Louopouer ’>Conporfsed peryoman ce
    ’Heavy load ditve cagality
    cortert -5Substantta aea trorease
    nofse ->huntt Capactyrs redel
    N Cassde Non thesoll
    DCVS Tree Pnpds
    Nu

    TOL CR

    a. Bald the Sing Restored Pas Gute legjfe of Nan.cloctd


    pass -Gte tarntlte ard explain about t?
    andA runber of pass qde bayed uge

    Pass gate -trees, Strntlaxto cPL.


    *T mprove CPL POP ,,it ts eplaced by sutog estoved
    pass qate loqtc
    Coupled devices veplaced ith 4 devfce cross
    Coupled Latch.
    Functton
    +Logtcad topuds B ard B
    # dotves NFETS in PrLbhres, leadtq

    *The Latch omed by I, 2,3 &4 Horms Sutrg ¢ the cet


    levela.
    * Ater the -tree has Hlpe tte Jatch tt
    odpats to lauo levels
    KNOR

    Pass

    Gale Logfe Seplerertdten


    df xoR'
    A A A
    A

    Charactertste8
    shurthr
    >Less delay Vta danse -a mp actiom
    ’More logfe depth posst ble
    Weakneses '
    Lontted ch datve estrtets doads
    ’potental for high cross-oves cusoant
    ’ Thade-ot ¢ dite rength posgrorce
    rmurt be
    Cemparad to cpL,the logle trees NFET devtes
    +Cpoxad
    Sabsart dyJauha the aslby to firplerert any blan the
    bgte
    * SRPL
    ich ts
    Hurcttontn a-tree
    Jotch
    3. Dortno
    dth neot

    fo Sernt Synchonous
    wtll detect thetr

    elk

    SRCMO
    doutoo
    clated
    funelton
    delapd
    ’ Let A,B,C ahe loeo doqte trpuds, -tber NFETs 4,2 83
    ase all o t
    NI,N2 Nu Yemaln
    bgh logteal 1p is couplkd to a' -then i fall,
    Assame a
    Sequertt onesters , Nu goe loo -to prechasge
    hasge node
    ’Afer a
    NI back to Vad

    ’ The ctscutt vetung to ts etng state, NI ts pecharged,


    prcap OFF.
    2.60

    (20 1130

    chatactertstres;
    Shrergthar Weaknes

    dclock oveheod ’Loo nofse Sinerunty


    ’Evaluate clock ace avdtde! Difat -fsl
    ’Addeicra cevtce ount
    as a ave or bubble Tathet than
    as a level.
    F Oaltke other styls, the of styes cutpat valuEs ae avail oble
    for only a Imted dot'on.
    these desqs extrenely at a donse, but aio qate
    ctcat to -ttme
    Dyate Domfno circuit SensttRvitres Jelay vodors
    Arante domfno ogte Capoctanle
    explain about H
    ans
    ByparfcIacking
    LeFF
    Vt,
    Subshroje
    Senstutty
    Qomino
    QominoCrcut
    Tracki Ioterconnet
    testance
    Crcuit lensttvtteg TolkSupp
    etanc
    Vantation
    Vastatton
    VasctttonF
    l¸r LogteNofke
    NateeDelayNofse leropesotusQ
    Vt Leakaf terconned
    Suppy
    LEFFWEFF NP
    V
    T atarn -the bet pedoance orm a dyparte
    the god ts -to dtscharge the dynante node Ni dortro cvaut
    a

    as -pot a
    Pesslale ther do ve -the Syoal to he net ckt
    & then
    rvesder.
    thrush the
    -te destqo pareders
    Ste cf the NFET stack he &uutlehch poot af he
    tte op hot
    and he SfZe o
    the pFET keepee.
    The PFET
    pechaxe detee has te to do wth the
    Petomance of the ctrcuit.
    Le Z
    Tox
    VeHase O7. Re
    Tespeatue

    VT
    Peststance
    Capocttance
    5 10 20 24

    Delay Voslatfond a dynamte domtno CMos chrat


    ofth process
    Process &envtrooment
    the Stze cf NFETS ofll fncreasg tbe Speed
    * Increafng
    ef the pasteulas Cireut
    Stzed to quickly drtve
    be
    he NEET stack Should be
    the p foyestea
    ex fst wtth tths
    Too Separate sust ch poirnts exist
    non
    Wtth the Sctteh po't a the of the
    the nvextoy Varciatfon
    Speed a a functton be the
    0t PS much more Senslttve.
    Hocevex Leos ts drl the rnost stertlfcart Contibo
    to Psce s8
    Vaiation
    abut a
    Sgma change ofl
    S-6 petormance dian ce.
    + Tov.
    Tox, Vor &empeatute all ettet ethecre the
    Qe stll contributfons

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