IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO.

6, DECEMBER 2007 3323

Input-Admittance Calculation and Shaping for

Controlled Voltage-Source Converters
Lennart Harnefors, Senior Member, IEEE, Massimo Bongiorno, Student Member, IEEE,
and Stefan Lundberg, Member, IEEE

Abstract—A controlled power electronic converter can cause Whatever the cause of instability, it is clear that if the
local instabilities when interacting with other dynamic subsystems converter acts as a passive system [11], [12], i.e., the differential
in a power system. Oscillations at a certain frequency cannot, how- input admittance (henceforth called just the input admittance,
ever, build up if the converter differential input admittance has a
positive conductance (real part) at that frequency, since power is for simplicity) has nonnegative conductance (i.e., nonnegative
then dissipated. In this paper, input-admittance expressions for a real part) for all frequencies, then it cannot generate insta-
voltage-source converter are derived. It is seen how the admittance bilities. While this is rarely the case, instabilities tend not to
can be shaped in order to get a positive real part in the desired occur if the conductance is positive in a neighborhood of each
frequency regions by adjusting the controller parameters. critical resonance, which was shown for torsional resonances
Index Terms—Converter control, dissipativeness, grid interac- in [10].
tion, oscillations, passivity, stability. However, a very simple converter model was considered in
[10]: the current control loop only. The contributions of this
I. I NTRODUCTION paper are closed-loop stability analysis of the converter–grid
interaction using impedance and admittance matrices; expres-
C ONTROLLED power electronic converters are increas-
ingly being used in power systems, e.g., distributed gen-
eration, high-voltage dc (HVDC) transmissions, flexible ac
sions for the elements of the VSC input-admittance matrix, in
which also the direct-voltage and alternating-voltage control
transmission system devices, and back-to-back inverter drives. loops, the phase-locked loop (PLL) used for synchronization,
While some of these offer better controllability and improve- and the dead time (computational and switching time delay) are
ment of global power-system stability, there is also an increased modeled; controller design recommendations; and verification
risk for local instabilities, which start as parasitic small-signal of the theory using a grid model as well as experiments.
oscillations. Among such, we find the subsynchronous torsional While converter–grid interaction and stability (for VSCs as
oscillations potentially caused by HVDC terminals [1], [2], well as diode and thyristor converters) have been considered
instabilities in dc power systems [3], dc-link instabilities of in several papers, particularly those cited above, this paper is
inverter drives [4], and oscillations due to converter interactions believed to be the first to tackle the problem using the converter
in single-phase rail networks [5]–[7] as well as in three-phase input admittance for three-phase systems. (References [5] and
networks [8], [9]. [7] consider input admittances or impedances for single-phase
One cause for instability is constant-power control [4]. Sup- systems.) The main benefit of the method lies in its gener-
pose that in a dc system the input power P = vi to a converter ality: any grid impedance—symmetric or unsymmetric—can
is controlled to a constant value. For perturbations ∆i about the be modeled, while a modification of the VSC control system
mean current i0 and similarly for the voltage, we have simply implies finding another input-admittance matrix.
This paper is organized as follows: In Section II, the system

 model is reviewed. In Section III, the control system is designed
P P ∆i
v = v0 + ∆v = ≈ 1− (1) and analyzed, where we obtain expressions for the elements
i0 + ∆i i0 i0
of the input-admittance matrix. In Section IV, this matrix is
analyzed numerically and analytically. It is seen how the input
so the converter acts as a differential negative resistance −P/i20 admittance can be shaped by suitably selecting the controller
for a positive input power. Another cause for instability is, in parameters. This allows the negative conductance region to be
some cases, the dynamics of the ac control loop together with reduced as specified (although sometimes at the expense of
the pulsewidth modulator (PWM) in a voltage-source converter dynamic performance). Finally, in Section V, the closed-loop
(VSC) [2], [10]. system formed through interconnection with the grid is studied,
and the results are verified experimentally.
Manuscript received November 8, 2006; revised June 18, 2007. This work
was supported in part by High Voltage Valley.
L. Harnefors is with ABB Power Systems, 771 80 Ludvika, Sweden, and II. S YSTEM M ODEL
also with Chalmers University of Technology, 412 96 Göteborg, Sweden
(e-mail: lennart.harnefors@se.abb.com). As shown in [13], complex space vectors—denoted with
M. Bongiorno and S. Lundberg are with Chalmers University of Tech- boldface letters—e.g., v = vd + jvq and i = id + jiq for volt-
nology, 412 96 Göteborg, Sweden (e-mail: massimo.bongiorno@chalmers.se;
stefan.lundberg@chalmers.se). age and current, respectively, and complex transfer functions,
Digital Object Identifier 10.1109/TIE.2007.904022 e.g., the input admittance Y(s) = Yd (s) + jYq (s), giving

0278-0046/$25.00 © 2007 IEEE

3324 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

yields the following relation between vectors in the grid and

converter dq frames:

Ec = e−j∆θ E, ∆θ = θ − θ1 . (3)

The error angle ∆θ is zero in the steady state but must be taken
into account in order to include the PLL dynamics in the system
model.

Fig. 1. VSC main circuit diagram and control system.

B. Converter–Grid Interconnection and Stability Analysis
If the outer loops (PLL, DVC, and AVC) are disregarded, a
i = Y(s)v,1 are convenient for the modeling of symmetric
symmetric model is obtained (as shown in Section III) as
three-phase systems, which have balanced phase impedances.
However, for unsymmetric systems, it is necessary to use
the corresponding real space vectors—denoted with italic i = Gci (s)iref + Yi (s)E (4)
letters—e.g., v = [vd , vq ]T ↔ v and i = [id , iq ]T ↔ i. Their
relation is described by an input-admittance matrix where iref = iref
d + jiq
ref
is the ac reference vector, while
Gci (s) and Yi (s) are the ideal (in the sense that the outer
 
Ydd (s) Yqd (s) loops are disregarded) closed-loop transfer function and input
i = Y (s)v, Y (s) = (2) admittance, respectively. E can be eliminated by using the
Ydq (s) Yqq (s)
relation E = vs − Z(s)i for the grid model, giving
where, unlike in [13], a positive sign of element (1, 2) is chosen 1
for convenience. [For a symmetric system, Ydd (s) = Yqq (s) = i= [Gci (s)iref + Yi (s)vs ] (5)
1 + Yi (s)Z(s)
Yd (s), and Ydq (s) = −Yqd (s) = Yq (s).] We shall use complex
notation to the extent possible, and apply real vectors and where Gc (s) = Gci (s)/[1 + Yi (s)Z(s)] is the full closed-
transfer matrices only when necessary. loop system. For very strong grids, Z(s) ≈ 0 ⇒ Gc (s) ≈
Gci (s).
If the outer loops are taken into account, the system becomes
A. Configuration
nonlinear but can be linearized by considering perturbation
Consider Fig. 1. The quantities on the three-phase side are quantities. An unsymmetric model results, so real vectors and
expressed in grid dq frame, which is defined by the angle θ1 , transfer matrices must be used, while the matrix inverse re-
where dθ1 /dt = ω1 is the angular synchronous frequency. E, places division by
i, v, and vs are the space vectors for the point-of-common-
coupling (PCC) voltage, the converter input current, the con- ∆i = [I + Y (s)Z(s)]−1 Y (s)∆vs (6)
verter voltage, and the source voltage, respectively. The latter,
together with the impedance Z(s), serves as the grid model. where Y (s) is the full VSC input-admittance matrix (see the
A purely inductive converter input filter with inductance L is next section), and Z(s) ↔ Z(s). Stability can be analyzed by
assumed. On the dc side, Cdc is the dc capacitance, vdc is the either calculating the poles of the closed-loop system [I +
direct voltage, while i1 and i2 are the input and output (load) Y (s)Z(s)]−1 or applying the multivariable Nyquist criterion to
currents, respectively. the open-loop transfer matrix Y (s)Z(s) [13].
The ac controller (ACC) has three inputs in addition to the However, a system cannot cause buildup of oscillation at a
measured quantities E and i, i.e., the outputs iref ref certain frequency if it dissipates active power at that frequency.
d and iq of
the direct-voltage controller (DVC) and the alternating-voltage Consequently, stability can generally be guaranteed by making
controller (AVC), respectively, as well as the transformation sure that the VSC dissipates power at critical frequencies,
angle θ from the PLL. This angle defines the converter dq particularly poorly damped resonances [10]. Therefore, most of
frame, which in the steady state coincides with the grid dq the remainder of this paper is devoted to deriving and studying
frame. Vectors in the converter dq frame will be denoted the input-admittance matrix.
with the superscript c. The output is the reference vref to
the PWM. III. C ONTROL S YSTEM D ESIGN AND A NALYSIS
The transformations from the grid and converter dq frames
to the stationary αβ frame, e.g., for the PCC voltage, are given A. Controller Design Principle
by Es = ejθ1 E, and Es = ejθ Ec , respectively. Eliminating Es In all control loops except that for the alternating voltage, the
controlled process will be found to have integrator character-
istics: G(s) = k/s. A disturbance d adds at the process input.
1 The Laplace variable s shall be interpreted as the derivative operator s = The disturbance is assumed measurable and can be canceled by
d/dt, where appropriate. feedforward, as shown in Fig. 2.
HARNEFORS et al.: INPUT-ADMITTANCE CALCULATION AND SHAPING FOR CONTROLLED VSCs 3325

simple expressions, the dead time will be neglected, except in

Section IV-B. For Td = 0, we obtain [cf. (4)]

kp s + ki s2
ic = iref + Ec .
Ls2 + kp s + ki 2
(Ls + kp s + ki ) (s + αf )
     
Gci (s) Yi (s)
Fig. 2. Closed-loop system with process G(s), controller F (s), and feedfor- (11)
ward filter H(s).
Gci (s) and Yi (s) are, respectively, identical to Gc (s) and
Gdy (s) in (7) with k = 1/L. Hence, kp = αc L, where αc is
With a proportional-plus-integral (PI) controller F (s) = the current-control-loop bandwidth, can be selected [10], [15].
kp + ki /s and a first-order low-pass feedforward filter H(s) = A small ki can be employed, as the primary function of the
αf /(s + αf ), the transfer functions from reference r to output integral part is to remove the steady-state impact of mismatch
y (the closed-loop transfer function) and from d to y are between actual and model inductances (leading to imperfect
decoupling of the d and q axes) and voltage drop across the
k(kp s + ki ) filter resistance (which is neglected in the model). The design
Gc (s) =
s2 + kkp s + kki method in [15] recommends selecting ki as the product of
ks2 αc and the filter resistance, which should give a sufficiently
Gdy (s) = . (7) small gain. With kp = αc L and ki ≈ 0, we obtain in real space-
(s2 + kkp s + kki ) (s + αf )
vector form
Because of the integrator process characteristics and perfect
   
steady-state feedforward [i.e., H(0) = 1], zero steady-state c gc (s) 0 yi (s) 0
control error and perfect steady-state load-disturbance rejection i = i + Ec (12)
0 gc (s) ref 0 yi (s)
[i.e., Gc (0) = 1 and Gdy (0) = 0] are obtained even with pure P      
Gc (s) Yi (s)
control (ki = 0). The integral part—if used—may be given just
a trimming function that removes steady-state errors resulting
from imperfections. Such will be exemplified in the following.
where gc (s) = αc /(s + αc ), and yi (s) = s/[L(s + αc )
This allows selecting a small ki while letting kp = α/k to give
(s + αf )].
the bandwidth α in the closed-loop system.
2) Parameters: Modern transistor PWM converters often
employ switching frequencies of 1 kHz and above [14], which
B. AC Control Loop enables current response in the millisecond range. A higher an-
gular switching frequency ωsw allows higher bandwidth of the
The ac dynamics in the grid dq frame is given by current control loop. In [15], αc ≤ 0.2ωsw was recommended.
For ωsw /2π = 1 kHz and a 50-Hz base frequency, this yields
di αc ≤ 4 per unit (p.u.).
L + jω1 Li = E − v. (8)
dt The input-filter inductance L should be selected inversely
proportional to ωsw to give adequate suppression of switching
Transformation to the converter dq frame, following (3), yields: harmonics. Thus, αc L tends to be an invariant of ωsw , and
typically, αc L is in the range of 1 p.u. (For αc = 4 p.u., αc L =
1 p.u. yields L = 0.25 p.u., which is reasonable [14].)
dic
L + j(ω1 + ∆ω)Lic = Ec − vc (9) Let us consider the impact of an alternating-voltage distur-
dt bance. The current response to a step disturbance ∆Ec in the
grid voltage is, for t ≥ 0, given by
where ∆ω = d∆θ/dt is normally much smaller than ω1 and
can be neglected.
1) Controller Design: A PI current controller with PCC ∆Ec ∆Ec
∆ic = L−1 Yi (s) = (e−αf t − e−αc t )
voltage feedforward and cancellation of the dq cross coupling s (αc − αf )L
is considered [14] as (13)


ki αf where L−1 indicates the inverse Laplace transform. Relative
c
vref = − kp + (iref − ic ) − jω1 Lic + Ec . step responses are depicted for three values of αf in Fig. 3.
s s + αf
(10) As seen, a large αf is required to give fast rejection with a
small |∆ic |max . This is important in order to avoid overcur-
(As iref is always expressed in the converter dq frame, it is rent tripping should grid disturbances (such as voltage swells
not denoted by a superscript.) If the controller computational and sags) occur when the converter is operating at or near
delay and the PWM switching are modeled as a dead time Td , the rated current. We shall return to the selection of αf in
then vc = e−sTd vref
c
. However, in order to allow reasonably Section IV-D.
3326 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

Fig. 3. Disturbance rejection. Relative step responses |∆ic /∆Ec | for αc = 4 p.u. (solid), L = 0.25 p.u. (dashed), and αf = {40, 4, 0.4} p.u. (dashed dotted).

C. Direct-Voltage Control Loop voltage modulus, also filtered through Hdc (s) (to reject high-
frequency disturbances) as
1) Input Power: To analyze the direct-voltage control loop,
linearized expressions for the input power to the VSC are Pref
required. The PCC voltage is considered as the phase reference, iref
d = , Ef = Hdc (s)|E|. (18)
Ef
i.e., E is real in the steady state. Introducing steady-state and
perturbation components as in (1), we get E = E0 + ∆Ed + ref
3) Analysis: Assuming constant vdc 0
= vdc and PL = P0 ,
j∆Eq , and i = i0d + ∆id + j(i0q + ∆iq ). Assuming power- (17) and (18) are linearized as ∆Pref = −vdc0
Fdc (s)∆vdc ,
invariant space-vector scaling [13] or p.u. quantities, the giving
instantaneous active and reactive powers flowing into the con-
verter are, respectively, given by ∆Pref P0
∆iref
d = − 2 Hdc (s)∆Ed
E0 E0
P = Re{Ei∗ } ≈ E0 i0d + i0d ∆Ed + i0q ∆Eq + E0 ∆id (14)
    0
vdc P0
P0 ∆P =− Fdc (s)∆vdc − 2 Hdc (s)∆Ed (19)
Q = Im{Ei∗ } ≈ −E0 i0q + i0d ∆Eq − i0q ∆Ed − E0 ∆iq . (15) E0 E0
     
Q0 ∆Q and using (12) as

Opposite to a field-oriented ac drive [14], id and iq are 0

vdc
the active- and reactive-power-producing current components, ∆id = − gc (s)Fdc (s)∆vdc
E0
respectively.  
2) Controller Design: Assuming a lossless converter and P0
+ yi (s) − 2 gc (s)Hdc (s) ∆Ed . (20)
that the ac control loop is much faster than the direct-voltage E0
control loop, the active input power is also the power to the
dc link, which gives i1 = P/vdc . Expressed in the energy Equation (20) is then substituted in (14) and the resulting ex-
2
Cdc vdc /2 stored in the dc capacitor, the dc-link dynamics are pression for ∆P in (16). With i0d = P0 /E0 , and i0q = −Q0 /E0 ,
given by we obtain

1 dv 2 E02 yi (s) + P0 − P0 gc (s)Hdc (s) ∆Ed − Q0 ∆Eq

0 d∆vdc ∆vdc = .
Cdc dc = P − PL ⇒ Cdc vdc = ∆P − ∆PL 0 [sC
E0 vdc dc + gc (s)Fdc (s)]
2 dt dt
(16) (21)
where PL = vdc i2 is the load power.
Substitution of (21) back in (19) results in
If the DVC were to operate directly on the error vdcref
− vdc ,
the closed-loop dynamics would be dependent on the operating q
d = −Gdc (s)∆Ed + Gdc (s)∆Eq
∆iref d
0 (22)
point vdc . This inconvenience is avoided by selecting the DVC
as a PI controller operating instead on the error [(vdc ) −
ref 2
2 where
vdc ]/2 [16] with feedforward of the load power (if available for
measurement) through a low-pass filter Hdc (s). With the active 
power reference Pref as the controller output, we get yi (s) + P0
E02
− P0
g (s)Hdc (s)
E02 c
Fdc (s) P0 Hdc (s)
Gddc (s) = +

 ref 2 sCdc + gc (s)Fdc (s) E02
kid (vdc ) − vdc2
Pref = kpd + + Hdc (s)PL . (17) Q0 Fdc (s)
s 2 Gqdc (s) = . (23)
   E02 [sCdc + gc (s)Fdc (s)]
Fdc (s)

In order to reduce the impact of PCC voltage variations on 4) Parameters: Assuming that the load-power feedforward
the direct voltage, Pref is then divided by the measured PCC can be used, the integral part may, also in this case, be given just
HARNEFORS et al.: INPUT-ADMITTANCE CALCULATION AND SHAPING FOR CONTROLLED VSCs 3327

a trimming function to compensate for imperfections. As the For ω1 = ω10 , (31) can be put in transfer-function form as
ac control loop should be much faster than the direct-voltage
control loop, the bandwidth αd of the latter should, as a rule of FPLL (s)
∆θ = Im{∆E}. (32)
thumb, be selected as αd ≤ 0.1αc , i.e., a time-scale separation s + E0 FPLL (s)
  
of at least one decade. With a small kid , the characteristic GPLL (s)
polynomial of (21) is s + kpd /Cdc for gc (s) ≈ 1, which gives
the choice kpd = αd Cdc . 2) Parameters: As Im{∆E} = 0 in the steady state, pure
It is also reasonable to let the low-pass filter Hdc (s) have P control, i.e., FPLL (s) = kpp , is sufficient to force ∆θ to zero
bandwidth αd as when ω1 = ω10 . The purpose of the integral part is to remove
αd the quasi-steady-state phase error that otherwise would appear
Hdc (s) = . (24) when the synchronous frequency deviates from its nominal
s + αd
value. (As ω1 is not directly measurable, feedforward cannot
D. Alternating-Voltage Control Loop be used in this case.) Again, the integral gain kip can be small.
By selecting kpp = αp /E0 , the synchronization loop is given
This loop is used in static-synchronous-compensator (STAT-
the bandwidth αp as
COM) operation [17]. The idea is to reduce the reactive power
at the PCC [i.e., make iq < 0, cf. (15)] when the PCC voltage αp /E0
modulus exceeds its reference Eref . A PI AVC is considered as GPLL (s) = (33)
s + αp
kia
q = Fac (s) (Eref − |E|) ,
iref Fac (s) = kpa + (25) where αp must be relatively small in order for the PCC voltage
s
harmonics (if present) to be sufficiently rejected [16]. A similar
which is linearized as ∆irefq = −Fac (s)∆Ed . Together with
selection as for αd is suggested: αp ≤ 0.1αc .
(22), this can be expressed in real vector form as 3) Analysis: From (29) and (32), it follows that:
 
−Gddc (s) Gqdc (s) ∆Ec = ∆E − jE0 ∆θ = ∆E − jE0 GPLL (s)Im{∆E} (34)
∆iref = ∆E. (26)
−Fac (s) 0
  
GEi (s)
which in real vector form is given as
 
1 0
As selection of the controller parameters must depend on the ∆E c = ∆E. (35)
grid impedance, no design recommendation for kpa is given, 0 1 − E0 GPLL (s)
  
whereas kia ≈ 0 is assumed, similar to the other loops. GsPLL (s)

E. Synchronization Loop (PLL) For the converter input current, the relation i = ej∆θ ic [cf. (3)]
is linearized as
1) Design: The PLL acts as a closed control loop—the syn-
chronization loop—which drives the q part of the PCC voltage ∆i = ∆ic + ji0 ∆θ = ∆ic + ji0 GPLL (s)Im{∆E}. (36)
in the converter dq frame to zero. Assuming that a second-order
PLL [18] is used, an instantaneous frequency deviation ∆ω is Its real equivalent is, with i0d = P0 /E0 and i0q = −Q0 /E0 ,
first formed as the output of a PI controller, i.e., given by


kip  
∆ω = kpp + Im{Ec } (27) c 0 (Q0 /E0 )GPLL (s)
s ∆i = ∆i + ∆E. (37)
   0 (P0 /E0 )GPLL (s)
FPLL (s)
  
Gp
PLL
(s)

to which the nominal angular synchronous frequency ω10 (2π

times 50 or 60 Hz) is added and integrated into the transforma- F. Input Admittance
tion angle Equations (12), (26), (35), and (37) form the linearized
dθ system depicted in Fig. 4, whose input-admittance matrix is
= ω10 + ∆ω = ω10 + FPLL (s)Im{Ec }. (28)
dt
Y (s) = Yi (s)GsPLL (s) + Gc (s)GEi (s) + GpPLL (s) (38)
From (3), we have
and whose components are given by
Ec = e−j∆θ E ≈ (1 − j∆θ)(E0 + ∆E)
≈ E0 + ∆E − jE0 ∆θ (29) Ydd (s) = yi (s) − gc (s)Gddc (s)
⇒ Im{E } = Im{∆E} − E0 ∆θ
c
(30) Q0
Yqd (s) = gc (s)Gqdc (s) + GPLL (s)
E0
which gives with ∆θ = θ − θ1 (where, recall, dθ1 /dt = ω1 ) Ydq (s) = − gc (s)Fac (s)
d∆θ P0
= ω10 − ω1 + FPLL (s) (Im{∆E} − E0 ∆θ) . (31) Yqq (s) = yi (s) [1 − E0 GPLL (s)] + GPLL (s). (39)
dt E0
3328 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

The dead time should normally only be a fraction q < 1 of the

switching period, i.e.,

2πq
Td = . (43)
ωsw
Hence, for switching frequencies in the kilohertz range, Td <
1 ms is reasonable to assume. Suppose that Td = 0.5 ms; with a
Fig. 4. Block diagram of linearized VSC control system.
base frequency of 50 Hz, Td = 0.16 p.u. is obtained. As Fig. 5
shows, this results in a negative conductance frequency region
For the parameters suggested, these expressions simplify to
between approximately 9 and 30 p.u. In this region, the inher-
s2 ent damping of passive loads in a power system is normally
Ydd (s) = sufficient to prevent instability [19]. However, problems may
L (s2 + αc s + αc αd ) (s + αf )
possibly arise in smaller isolated grids with several controlled
P0 αc αd (2s + αd ) power electronic converters and few passive loads if care is not
−
E02 (s2 + αc s + αc αd ) (s + αd ) taken in the design. This has already been acknowledged for
  single-phase traction grids [6], [7].
Q0 αc αd αp
Yqd (s) = 2 2 + An approximate analytic expression for the lower boundary
E0 s + αc s + αc αd s + αp frequency ωxt of the negative conductance region can be de-
kpa αc rived assuming that |ω| {ω1 , αf }, which gives
Ydq (s) = −
s + αc
1
s2 P0 αp Yi (jω) ≈ . (44)
Yqq (s) = + (40) L (jω + αc e−jωTd )
L(s + αc )(s + αf )(s + αp ) E02 s + αp
Solving the positive root of Re{Yi (jω)} = 0 results in
which will be considered in the next section.
π ωsw
ωxt = = {(43)} = . (45)
2Td 4q
IV. P ROPERTIES OF THE I NPUT A DMITTANCE
For Td = 0.16 p.u., this yields ωxt = 10 p.u., which shows a
In all numerical evaluations in this section, L = 0.25 p.u., reasonably good agreement with Fig. 5.
αc = 4 p.u., and E0 = 1 p.u. are used. Since the outer loops have impact primarily at lower frequen-
cies, where the impact of the dead time is negligible, we shall
A. AC Control Loop Only (Ideal Case) henceforth neglect Td .

For a symmetric system, it is intuitively clear (and easy

to show) that power is dissipated at an angular frequency ω C. Power Dissipation of Unsymmetric Systems
if and only if the input admittance has a positive real part, To allow assessing the impact of outer loops, a criterion for
i.e., Re{Y(±jω)} > 0 (positive and negative signs to account the power dissipation of unsymmetric systems is needed.
for positive and negative sequences). A symmetric system is Considering each component of v and i as a complex phasor
obtained only when the outer loops have negligible dynamics. of angular frequency ω, from standard jω calculation, we
The negative conductance region of the ideal input admittance have v = Y (jω)i. The active input power is given as P =
Yi (s) in (11) is |ω| < ωxi , where, for kp = αc L [10], we have Re{vd i∗d + vq i∗q }, assuming again power-invariant space-vector
 scaling or p.u. quantities. This can also be expressed as P =
αf ki (1/2)(v H i + iH v), where the superscript H indicates trans-
ωxi = . (41)
(αc + αf )L pose and complex conjugate (Hermitian conjugate). However

Since the proposed controller design is based on using a v H i + iH v = v H Y (jω) + Y H (jω) v (46)
small—or zeroed—integral gain, we note that a nonnegative
conductance in the ideal case can be obtained for all frequen- where the right-hand side is a quadratic form with the matrix
cies; the system is passive.  
H a c∗
Y (jω) + Y (jω) = (47)
c b
B. Impact of Dead Time
whose elements are
If Td is taken into account, the expression for the ideal input
∗
admittance of (11) is generalized to a = Ydd (jω) + Ydd (jω) = 2Re {Ydd (jω)}
∗
s + αf (1 − e−sTd ) b = Yqq (jω) + Yqq (jω) = 2Re {Yqq (jω)}
Yi (s) = . (42) ∗
L [s + αc e d + jω1 (1 − e−sTd )] (s + αf )
−sT c = Ydq (jω) + Yqd (jω). (48)
HARNEFORS et al.: INPUT-ADMITTANCE CALCULATION AND SHAPING FOR CONTROLLED VSCs 3329

Fig. 5. Impact of dead time. Re{Yi (jω)} for Td = 0.16 p.u. (solid) and αf = {4, 0.1} p.u. (dashed).

Fig. 6. Impact of the direct-voltage control loop. Re{Ydd (jω)} for αf = {40, 4, 0.1} p.u., αd = {0.4, 0.4, 0.1} p.u. (solid, dashed, and dashed dotted,
respectively), and (a) P0 = 1 p.u., (b) P0 = 0, and (c) P0 = −1 p.u.

When Y (jω) + Y H (jω) > 0 (i.e., the matrix is positive defi- be small (never larger than 0.1αc , at the very least), which is in
nite), (46) is positive, and active power is dissipated [11]. This conflict with the desire to use a large αf to avoid overcurrent
holds if and only if both eigenvalues λ1,2 [Y (jω) + Y H (jω)] tripping when rapid changes in the PCC voltage occur (see
are positive. The characteristic polynomial is given by Section II-B).
One remedy is to use a small αf during normal mode of op-
det λI − Y (jω) − Y H (jω) = (λ − a)(λ − b) − |c|2 . (49) eration. If a sudden grid disturbance occurs—which can be de-
tected by monitoring E and i and using a suitable criterion—the
When c = 0, which is obtained for kpa = Q0 = 0, the cri-
control system switches to transient mode of operation, where
terion for power dissipation simplifies to a > 0 and b > 0,
αf is increased to αf ≥ αc . When a new steady state is
i.e., Re{Ydd (jω)} > 0 and Re{Yqq (jω)} > 0. Except for
attained, αf is reset to its normal small value. As transient
STATCOM operation, this is a realistic assumption, since VSCs
disturbances—e.g., resulting from faults—are normally cleared
are often operated with unity power factor. Therefore, we shall
within a few seconds at most, there is not enough time to build
assume kpa = Q0 = 0 except in Section IV-F.
up a subsynchronous oscillation of critically large amplitude,
which often takes tens of seconds [19].
D. Impact of the Direct-Voltage Control Loop A useful expression for the upper boundary frequency ωxd
For Q0 = 0, the DVC affects only Ydd (s). Fig. 6 shows of the negative conductance region can be obtained only for
curves for rectifier, zero-power, and inverter operation, and P0 = 0 as
three different sets of controller parameters. For inverter op- 
eration (i.e., −1 ≤ P0 < 0 p.u.), it is relatively easy to obtain ωxd =
αc αd αf
. (50)
Re{Ydd (jω)} ≥ 0 for all frequencies. αc + αf
Poorly damped resonances down to about 10 Hz may ex-
ist [19]. Hence, it may in some cases be desired to have This does not represent a worst-case scenario, but it is seen by
Re{Ydd (jω)} > 0 from frequencies as low as 0.1–0.2 p.u. and comparing Figs. 6(b) and (c) that the ωxd ’s for P0 = 0 and P0 =
up. To achieve this for rectifier operation, both αf and αd must 1 p.u. are at least in the same order of magnitude.
3330 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

Fig. 7. Impact of the synchronization loop (PLL). Re{Yqq (jω)} for αf = {40, 4, 0.1} p.u., αp = {0.4, 0.4, 0.1} p.u. (solid, dashed, and dashed dotted,
respectively), and (a) P0 = 1 p.u., (b) P0 = 0, and (c) P0 = −1 p.u.

Fig. 8. STATCOM operation with kpa = 1 p.u. (solid), Q0 = αd = αp = 0 p.u. (dashed), and αf = {40, 4, 0.1} p.u. (dashed dotted).

E. Impact of the Synchronization Loop (PLL) An expression for the upper boundary frequency ωxa of the
negative conductance region (in which λ2 < 0) is found by
As Fig. 7 shows, the situation is, in this case, similar to
approximating ω 2  αc2 as
Fig. 6 concerning αp vis-a-vis αd , but opposite concerning P0 :
the PLL has a negative impact mainly in the inverter mode. 
kpa L
Both αf and αp must be kept small in order to avoid that ωxa = αc αf . (53)
Re{Yqq (jω)} < 0 for most subsynchronous frequencies. 2(αc + αf ) − kpa αc2 L
Again, a useful expression for the upper boundary frequency
An approximate agreement with Fig. 8 can be verified. Once
ωxp of the negative conductance region can be obtained only
again, a small αf is required to obtain a narrow negative
for P0 = 0, i.e.,
conductance region.
 Q0 > 0 and/or nonnegligible (but still reasonably small) αd
αc αf αp
ωxp = . (51) and αp all enlarge the negative conductance region (although
αc + αf + αp
not significantly in absolute terms). Letting Q0 < 0 has the
opposite effect.
F. Impact of the Alternating-Voltage Control Loop (STATCOM
Operation With P0 = 0) V. C ONVERTER –G RID I NTERCONNECTION AND S TABILITY
Since Y (s) is not diagonal for STATCOM operation, analysis A. Methodology for Identification of Critical Resonances and
in this case requires solving the eigenvalues λ1,2 from (49). A Controller Design
reasonably simple expression can be obtained for the special
Closed-loop current control of a grid-connected VSC has
case of Q0 = 0 and negligible αd and αp , i.e.,
the effect of shifting the locations of the poles (eigenvalues)
of the ac network in a similar fashion as closed-loop current
2(αc + αf )ω 2 k α
λ1,2 =   ±  pa c . (52) control of a field-oriented induction motor (IM) changes the
2 2 2
(ω + αc ) ω + αf L 2 ω 2 + αc2 IM’s electrical dynamics [14]. The direct-voltage control and
HARNEFORS et al.: INPUT-ADMITTANCE CALCULATION AND SHAPING FOR CONTROLLED VSCs 3331

jω1 )L, the poles of 1/[1 + Yi (s)Z(s)] are located at s =

{−j1.4, −j, −j0.59}. With control, for ki = 0, we obtain

s = {−3.6 − j2.6, −3.1 + j2.2, −0.00080 − j1.4,

−0.00020 − j0.65}. (55)

The pole at s = −j is shifted significantly, but the other two

Fig. 9. Network configuration. just slightly. (A fourth pole is added due to the dynamics
of the PCC voltage feedforward filter.) There are two critical
resonances, one of which is subsynchronous. There is a risk
synchronization loops are relatively slow, while ki should be
for destabilizing this resonance if ωxi ≥ 0.65 p.u. Letting ki =
small, so the closed-loop poles obtained for {αd , αp , ki } = 0
0.17 p.u. yields ωxi = 0.65 p.u.; the poles are then
can be assumed to shift just slightly for moderate
{αd , αp , ki } > 0 (with αc and αf unchanged, and kpa = 0). s = {−3.5 − j2.6, −3.0 + j2.2, −0.00065 − j1.4,
Hence, the control performance can be evaluated using
Gc (s) = Gci (s)/[1 + Yi (s)Z(s)], see (5). 0.0000039 − j0.65, −0.18 − j0.00060}. (56)
However, there is yet a risk that poorly damped resonances
Note that the poles, as predicted, shift only slightly when an
may become unstable, i.e., poles with a small real part are
integral action is included (while a fifth pole is added). The
moved into the right half of the s plane. This yields the
fourth pole is now indeed unstable, but with a very small real
following methodology (which is tested in Section V-B):
part. This indicates that stability should be regained if ki is
1) Find a grid model and determine the grid impedance Z(s) decreased, which is easily verified.
(note: in synchronous coordinates). For an increase of the integral gain to ki = 1 p.u., ωxi =
2) Select αc and αf ; then, find the poles of 1/[1 + 1.6 p.u. is obtained. The poles are then
Yi (s)Z(s)] for Yi (s) = s/[L(s + αc )(s + αf )]. (A
symbolic manipulation program such as MAPLE is useful s = {−3.0 − j2.6, −2.4 + j2.3, 0.00026 − j1.4,
for this task.)
3) Identify critical resonances, i.e., poles with small real 0.00038 − j0.65, −1.3 − j0.062}. (57)
part and relatively small imaginary part (low resonant Both the third and fourth poles are now unstable, but the real
frequency). parts are small and tend not to increase as ki is increased
4) Select αd and αp using the theory of the previous section further. This indicates that just a small resistance, in this case
such that positive conductance of the full input admit- r = 0.0003 p.u., is sufficient to make the system stable. Hence,
tance Y (s) is obtained at the critical resonances. (If series resonances should normally not be troublesome.
necessary, modify αf and repeat from step 2.) 2) Very Weak Grid, Parallel Resonance: A large grid in-
The methodology does not apply to STATCOM operation, since ductance in series with a capacitance, e.g., L1 = 0, L2 =
kpa may be large enough to cause significant pole shifting. 1 p.u., and C = 0.5
Studies of this are left to future research. √ p.u., is considered, which yields a parallel
resonance at 1/ L2 C = 1.4 p.u. in stationary coordinates,
as seen from the PCC. Without control, the poles are s =
B. Case-Study Analysis {−j4.5, j2.5, −j}; with control, for ki = 0, they are shifted to

In the system depicted in Fig. 9, a series-compensated line is s = {−4.7 − j3.2, −5.1 + j3.0, −0.21 − j2.1,
connected to the PCC, while the rest of the grid, for simplicity,
−0.0077 + j0.35}. (58)
is modeled as an infinite source in series with an inductance.
Including a series resistance r in the resonant circuit, the grid There is now a critical resonance at 0.35 p.u. Letting ki =
impedance is 0.049 p.u. yields ωxi = 0.35 p.u., and the poles
 
1 s = {−4.6 − j3.2, −5.1 + j3.0, −0.21 − j2.1,
Z(s) = r + (s + jω1 )L1 + (s + jω1 )L2 .
(s + jω1 )C
(54) 0.00014 + j0.35, −0.0493 − j0.00098}. (59)

To easily illustrate the phenomena appearing, we in the theo- (For a smaller ki , the system remains stable.) This time, ki
retical analyses consider only the ac control loop, i.e., Yi (s) must be kept small even for a fairly large series resistance. For
for various ki . (The impact of the outer loops will be studied example, it can be verified that ki = 0.072 p.u. is sufficient to
experimentally.) In all cases, L = 0.2 p.u., and αc = αf = give an unstable system with r = 0.01 p.u. Hence, instabilities
5 p.u. Unless noted otherwise, r = 0. may be hard to prevent for very weak grids with a parallel
1) Full Model: The parameters are L1 = L2 = 0.2 p.u. resonance of fairly low frequency.
and C = 20 √ p.u., i.e., the resonance is, in stationary coor- 3) Series Resonance Connected Radially to VSC: L2 = ∞
dinates, 1/ L1 C = 0.5 p.u. This is reasonable; series com- in Fig. 9 is now considered, while L = L1 = 0.2 p.u. and
pensation is normally made such that the resonance becomes C = 20 p.u., which give poles at s = {−j0.65, −j1.4} without
subsynchronous [19]. Without control, i.e., Yi (s) = 1/(s + control. Closed-loop ac control has in this configuration the
3332 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

Fig. 10. Impact of the ACC integral part.

somewhat surprising effect of creating a critical resonance at chronous frequency is 50 Hz, the switching frequency is 5 kHz,
the synchronous frequency. For ki = 0, we have and the nominal direct voltage is 350 V, while the ACC parame-
ters are set to αc = αf = 2000 rad/s.
s = {−2.7 − j2.8, −2.3 + j2.3, −0.0036 − j0.99}. (60) 1) Impact of the ACC Integral Part: From (41), it is found
that ωxi = 314 rad/s for ki = 1800 Ω/s. In this experiment,
Consequently, the system should remain stable unless ki is large ki is varied while αp = 6.3 rad/s (yielding negligible impact
enough to make ωxi = 1 p.u. (or higher), which in this case of the PLL). The direct-voltage control loop is disabled, and
requires ki = 0.04 p.u. The poles are then a constant direct voltage is supplied from an external source,
while iref
d = 10 A is selected. Fig. 10 shows that an instability
s = {−2.5 − j2.8, −2.0 + j2.3, 0.000069 − j0.99, occurs according to theory. Building up the amplitude of the
oscillation takes several seconds.
−0.43 − j0.0076}. (61) 2) Impact of the DVC: A load resistor of 100 Ω is connected
in parallel with the dc capacitor, which results in an active
Also in this case, a fairly large series resistance, i.e., r ≥ current of i0d = 10.6 A and gives P0 = 1.3 kW. The ACC
0.04 p.u., is required to achieve stability. integral gain is zeroed, while αp = 6.3 rad/s is kept. By trial
Of interest is that the critical resonance remains at the and error, it is found that ωxd = 314 rad/s for αd = 45 rad/s.
synchronous frequency even when the LC resonance is much However, due to the damping of the load resistor and possibly
higher than 1 p.u. or the circuit reduces to just a capacitance also the series resistance in the ac circuit, the system is stable
(in series with the VSC filter inductance). Letting L1 = 0 but even for αd = 60 rad/s but turns unstable if αd is stepped to a
keeping all other parameters, the following poles are obtained: higher value, as shown in Fig. 11.
3) Impact of the PLL: The DVC is again disabled, and
s = {−4.7 − j0.47, −4.8 + j0.46, 0.000069 − j0.99, d = −10 A is used. Equation (51) predicts that ωxp =
iref
314 p.u. for αp = 100 rad/s. As seen in Fig. 12, oscillations
−0.44 + j0.0021}. (62) commence when αp is set to 110 rad/s. (Since ki = 0, there is
a steady-state current control error.)

C. Experimental Verification
VI. C ONCLUSION
In the experimental setup, a VSC with nominal root mean
square phase voltage 69 V (yielding E0 = 120 V for power- In this paper, expressions for the elements of the input-
invariant space-vector scaling) is used. A radial connection admittance matrix Y (s) of a controlled VSC have been derived.
with the circuit parameters L1 = 0, L2 = ∞, C = 4.0 mF, L = For a certain grid impedance matrix Z(s), the stability of the
9.0 mH, r = 56 mΩ, and Cdc = 6.6 mF is studied. The syn- resulting closed-loop system (6) can be assessed. This can
HARNEFORS et al.: INPUT-ADMITTANCE CALCULATION AND SHAPING FOR CONTROLLED VSCs 3333

Fig. 11. Impact of the DVC.

Fig. 12. Impact of the PLL.

be directly applied to VSC controller design, e.g., using the A step-by-step design methodology based on this finding,
multivariable Nyquist criterion [13]. including identification of critical (poorly damped, low-
If Y (s) and Z(s) are both passive, i.e., have positive conduc- frequency) resonances, was presented. The following qualita-
tance properties for all frequencies, the closed-loop system is tive controller design recommendations [which are quantified
guaranteed to be stable. While a controlled VSC will generally by (41), (50), and (51)] should be observed if there are critical
not act as a passive system, it was shown that if Y (s) has resonances (electrical and/or torsional) present:
positive conductance properties at critical grid resonances, the
converter–grid interconnection will generally be stable (one • Use a very low integral gain ki (or no integral part at all)
possible exception is monotonic instabilities, i.e., nonoscillative in the ACC. The integral part should have only a trimming
modes with real positive poles [20]). function.
3334 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

• Do not select the bandwidths αd and αp of the direct- [11] J. C. Willems, “Dissipative dynamical systems, Part I: General theory,”
voltage control and synchronization (PLL) loops larger Arch. Ration. Mech. Anal., vol. 45, no. 5, pp. 321–351, Jan. 1972.
[12] J. C. Willems, “Dissipative dynamical systems, Part II: Linear systems
than necessary; 0.1αc is the upper limit for both. with quadratic supply rates,” Arch. Ration. Mech. Anal., vol. 45, no. 5,
• Select the bandwidth αf of the PCC voltage feedforward pp. 352–393, Jan. 1972.
filter in the ACC fairly low (αf ≤ 0.1αc ) for normal [13] L. Harnefors, “Modeling of three-phase dynamic systems using complex
transfer functions and transfer matrices,” IEEE Trans. Ind. Electron.,
mode of operation but equal to αc or larger for short-term vol. 54, no. 4, pp. 2239–2248, Aug. 2007.
transient-mode operation. [14] B. K. Bose, Power Electronics and Variable Frequency Drives. New
York: IEEE Press, 1997.
[15] L. Harnefors and H.-P. Nee, “Model-based current control of ac drives
Scenarios where the theory should find application using the internal model control method,” IEEE Trans. Ind. Appl., vol. 34,
include—but are not limited to—the following: no. 1, pp. 133–141, Jan./Feb. 1998.
[16] R. Ottersten, “On control of back-to-back converters and sensorless in-
• VSC HVDC terminals and other high-power VSCs duction machine drives,” Ph.D. dissertation, Dept. Elect. Power Eng.,
electrically close to synchronous generators with subsyn- Chalmers Univ. Technol., Göteborg, Sweden, 2003.
chronous torsional resonances. Extending the results of [17] A. Jain, K. Joshi, A. Behal, and N. Mohan, “Voltage regulation with
STATCOMs: Modeling, control and results,” IEEE Trans. Power Del.,
Harnefors [10], if Y (s) has positive conductance proper- vol. 21, no. 2, pp. 726–735, Apr. 2006.
ties in a neighborhood of each torsional resonance, there [18] G.-C. Hsieh and J. C. Hung, “Phase-locked loop techniques—A survey,”
should be little risk for destabilization. IEEE Trans. Ind. Electron., vol. 43, no. 6, pp. 609–615, Dec. 1996.
[19] P. M. Anderson, B. L. Agrawal, and J. E. Van Ness, Subsynchronous
• In this paper, very weak grids were modeled as a low Resonance in Power Systems. New York: IEEE Press, 1990.
parallel LC resonance, which was found to be the most [20] A. Tabesh and R. Iravani, “On the application of the complex torque
serious case in Section V-B. Extension to more elaborate coefficients method to the analysis of torsional dynamics,” IEEE Trans.
Energy Convers., vol. 20, no. 2, pp. 268–275, Jun. 2005.
grid models can be made by considering a different Z(s).
• Isolated grids with several controlled converters and few
passive loads, e.g., offshore wind farms with solely full-
converter wind-turbine generators. Because a negative Lennart Harnefors (S’93–M’97–SM’07 ) was born
conductance region for higher frequencies—cf. (43)—was in Eskilstuna, Sweden, in 1968. He received the
M.Sc., Licentiate, and Ph.D. degrees from the Royal
found to appear when the dead time is nonnegligible, Institute of Technology, Stockholm, Sweden, in
stability problems involving high-frequency oscillations 1993, 1995, and 1997, respectively, all in electri-
may occur. cal engineering, and the Docent (D.Sc.) degree in
industrial automation from Lund University, Lund,
Future research may be directed to the further investigation Sweden, in 2000.
of STATCOM operation, inclusion of more elaborate dc-link From 1994 to 2005, he was with Mälardalen Uni-
versity, Västerås, Sweden, where he was appointed
models (to account for the source or load to which the dc link as a Professor of electrical engineering in 2001. He
is connected), and the possible closed-loop impact of switching is currently with ABB Power Systems, Ludvika, Sweden. Since 2001, he has
harmonics [6]. also been a part-time Visiting Professor of electrical drives with Chalmers
University of Technology, Göteborg, Sweden. His research interests include
applied signal processing and control, in particular, control of power electronic
R EFERENCES systems and ac drives.
Prof. Harnefors is an Associate Editor of the IEEE TRANSACTIONS ON
[1] M. P. Bahrman, E. V. Larsen, H. S. Patel, and R. J. Piwko, “Ex-
INDUSTRIAL ELECTRONICS. He was the recipient of the 2000 ABB Gunnar
perience with HVDC-turbine-generator torsional interaction at Square
Engström Energy Award and the 2002 IEEE TRANSACTIONS ON INDUSTRIAL
Butte,” IEEE Trans. Power App. Syst., vol. PAS-99, no. 3, pp. 966–975,
ELECTRONICS Best Paper Award.
May 1980.
[2] E. Larsen and I. McIntyre, “Subsynchronous torsional interaction with
voltage-source converter HVDC systems—Reference-frame study,” GE
Power Syst. Energy Consulting, 2001. Final Report.
[3] S. D. Sudhoff, S. F. Glover, P. T. Lamm, D. H. Schmucker, and Massimo Bongiorno (S’02) received the M.Sc. de-
D. E. Delisle, “Admittance space stability analysis of power electronic gree in electrical engineering from the University
systems,” IEEE Trans. Aerosp. Electron. Syst., vol. 36, no. 3, pp. 965– of Palermo, Palermo, Italy, in April 2002 and the
973, Jul. 2000. Lic.Eng. and Ph.D. degrees from Chalmers Univer-
[4] K. Pietiläinen, L. Harnefors, A. Petersson, and H.-P. Nee, “DC-link stabi- sity of Technology, Göteborg, Sweden, in December
lization and voltage sag ride-through of inverter drives,” IEEE Trans. Ind. 2004 and September 2007, respectively. He is cur-
Electron., vol. 53, no. 4, pp. 1261–1268, Jun. 2006. rently part-time with Chalmers Unversity of Tech-
[5] A. Paice and M. Meyer, “Rail network modelling and stability: The input nology and part-time with Gothia Power, Göteborg.
admittance criterion,” in Proc. 14th Int. Symp. Math. Theory Netw. Syst., His interests include application of power elec-
Perpignan, France, Jun. 2000. CD-ROM. tronics in power systems and power quality.
[6] E. Möllerstedt and B. Bernhardsson, “Out of control because of
harmonics—An analysis of the harmonic response of an inverter loco-
motive,” IEEE Control Syst. Mag., vol. 20, no. 4, pp. 70–81, Aug. 2000.
[7] M. Jansson, A. Danielsson, J. Galić, K. Pietiläinen, and L. Harnefors,
Stefan Lundberg (S’04–M’06) was born in
“Stable and passive traction drives,” in Proc. IEEE Nordic Power and Ind.
Göteborg, Sweden, in 1976. He received the Ph.D.
Electron. Conf., Trondheim, Norway, 2004. CD-ROM.
degree in electrical engineering from Chalmers
[8] A. Emadi, “Modeling of power electronic loads in ac distribution systems
University of Technology, Göteborg, Sweden,
using the generalized state-space averaging method,” IEEE Trans. Ind.
in 2007.
Electron., vol. 51, no. 5, pp. 992–1000, Oct. 2004.
He is with the Department of Energy and Envi-
[9] M. Belkhayat, “Stability criteria for ac power systems with regulated
ronment, Division of Electric Power Engineering,
loads,” Ph.D. dissertation, Purdue Univ., West Lafayette, IN, Dec. 1997.
Chalmers University of Technology. His main area
[10] L. Harnefors, “Analysis of subsynchronous torsional interaction with
of interest is control and modeling of wind parks.
power electronic converters,” IEEE Trans. Power Syst., vol. 22, no. 1,
pp. 305–313, Feb. 2007.