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15 views

Master (2)

Uploaded by

Ravi Kumar ae20d006
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Vedang Bahuguna

CS22B091 | IIT Madras

EDUCATION RR RELEVANT COURSES


● B.Tech in Computer Science And Engineering- CGPA 9.6/10
● Programming and Data Structures (Theory
link and Lab)
● Class XII CBSE (2022), Army Public School - 98.8% link ● Design and Analysis of Algorithms
● Class X ICSE (2020), Vibgyor High School - 98.8% link ● Object Oriented and Algorithms Lab
● Foundations of Computer System And
Design
● Computer Organization And Architecture
SCHOLASTIC ACHIEVEMENTS ● Probability, Statistics and Stochastic
Processes
● Institute Rank 1 after the first semester with perfect CGPA of 10 ● Graph Theory
● Amongst the top 3.82% of the country in the prestigious KVPY ● Discrete Mathematics and Multivariable
Calculus.
(Kishore Vaigyanik Protsahan Yojana) examination in 2022.
● Compiler Design**
link ● Operating System**
● Rank 1 in ICSE Board Examinations (Class 10) in the school. ● Paradigms of Programming**
link link2
● Rank 1 in CBSE XII Board Examinations in the city of Pune. link
LANGUAGES AND SOFTWARE
link2
● Scored above MAS and amongst the top candidates in IOQC - ● C and C++
Indian Olympiad Qualifiers in Chemistry, in the year 2022. ● x86 Assembly used for RISCV
● Linux
link ● Java
● Rated 1450 in Codeforces and 1690 in Codechef, and amongst ● Python
the top coders in the 2022 batch. link link2
● Global Rank 296 in Starters 138 and 224 in Starters 139.link
● Global rank 781 in Codeforces Round 950. link link2 EXTRA-CURRICULARS

● C.S.E PLACEMENT COORDINATOR


PROJECTS
Successfully organized and managed the
● 8-BIT CPU (CS2300) entire internship drive for the pre-final year
students of the CSE department.
Course Project Under Prof. Ayon Chakraborty. Implemented an 8- Preparing for the upcoming placement
bit CPU, integrated with a basic ALU, supporting basic arithmetic season for 90+ final year students.
(addition, subtraction) and other functionalities such as left shift,
● PROFESSIONAL CRICKET
right shift, comparisons, OR, XOR, and NOT. A software controller
integrated with an EEPROM and a down-counter was also used for Vice-Captained the victorious under 15
instruction decoding and parsing. and under 17 teams at district and state

● HARDWARE MULTIPLIER level in the state of Maharashtra. link


Implemented a multiplier using multiple D-Flip Flops, adders and
a clock on a breadboard. It primarily served the purpose of a 4-bit
multiplier and was also used for delaying clock pulses, when
integrated with the larger ALU.

● 5-STAGE SCALAR PIPELINE (CS2600)

Course Project Under Prof. Chester Rebeiro. Coded in C++, the


pipeline comprised the following stages : Instruction Fetch,
Instruction Decode, Execution, Data Access and Write Back.

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